Adjustable Support For Device Under Test Patents (Class 324/750.19)
  • Patent number: 9488541
    Abstract: According to one embodiment, a pressure sensor includes: a base body; a sensor section; and a processing circuit. The sensor section includes: a transducing thin film; a first strain sensing element; and a second strain sensing element. The transducing thin film has a film surface and is flexible. The processing circuit is configured to output as an output signal at least one of a first signal obtained from the first strain sensing element upon application of external pressure to the transducing thin film and a second signal obtained from the second strain sensing element upon application of the external pressure to the transducing thin film.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: November 8, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Fukuzawa, Masatoshi Sakurai, Masayuki Kii, Yoshihiko Fuji, Michiko Hara, Yoshihiro Higashi, Kenji Otsu, Akiko Yuzawa, Kazuaki Okamoto
  • Patent number: 9435858
    Abstract: Focusing optical systems and methods for testing semiconductors are disclosed herein. The methods include receiving an image of a probe through a single optical path of a microscope, substantially focusing the microscope on the probe, and determining a vertical height adjustment between the probe and a device under test based upon the focusing.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: September 6, 2016
    Assignee: CASCADE MICROTECH, INC.
    Inventors: Peter Andrews, David Hess
  • Patent number: 9423421
    Abstract: A testing head for a test equipment of electronic devices of the type includes a plurality of contact probes inserted into guide holes which are realized in at least an upper guide and a lower guide separated one another by an air zone. Each of such contact probes include at least a probe body having a substantially rectangular section and a projecting arm from the probe body which ends with a probe tip for contacting one of a plurality of contact pads of a device to be tested. The projecting arm projects outside the probe body so as to have a lug with respect to both faces of the probe body which converge in an edge in order to define a probe tip offset and external with respect to the probe body.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: August 23, 2016
    Assignee: Technoprobe S.p.A.
    Inventor: Stefano Lazzari
  • Patent number: 9417285
    Abstract: A device for testing a bottom package of an integrated fan-out (InFO) Package-on-Package (PoP) comprises a bottom fixture having a space to accommodate the bottom package during testing and a detachable top cover, configured for conducting at least one test of the bottom package, wherein one or both of the bottom fixture and the top cover have a plurality of probing contacts for testing of the bottom package and wherein the device can be opened for placement of the bottom package under testing, and the cover is attachable to the bottom fixture for conducting the testing.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: August 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mill-Jer Wang, Ching-Nen Peng, Hung-Chih Lin, Hao Chen
  • Patent number: 9368232
    Abstract: In a particular embodiment, a method includes controlling a temperature within a chamber while applying a magnetic field. A device including a memory array is located in the chamber. The method includes applying a magnetic field to the memory array and testing the memory array during application of the magnetic field to the memory array at a target temperature.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: June 14, 2016
    Assignee: Qualcomm Incorporated
    Inventors: Kangho Lee, Wah Nam Hsu, Xiao Lu, Seung H. Kang
  • Patent number: 9366696
    Abstract: An apparatus for testing of a plurality of electronic devices on a flexible substrate is described. The apparatus includes at least two rollers configured for guiding the flexible substrate into a testing area along transport direction, at least one prober configured for electrically contacting one or more of the electronic devices, at least one probing support configured for supporting a portion of the flexible substrate during electrical contact with the at least one prober, and a test device for functional testing of one or more of the electronic devices.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: June 14, 2016
    Assignee: Applied Materials, Inc.
    Inventor: Matthias Brunner
  • Patent number: 9360502
    Abstract: Testing methods and systems are described. One method for testing an electronic device includes providing a probe in electrical contact with a device. The method also includes positioning an interface of the probe and the device in a liquid medium. The method also includes transmitting a current from the probe through the interface while the interface is in the liquid medium. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 31, 2011
    Date of Patent: June 7, 2016
    Assignee: INTEL CORPORATION
    Inventors: Warren S. Crippen, Brett Grossman, Roy E. Swart, Pooya Tadayon
  • Patent number: 9337074
    Abstract: An attaching device configured to attach a substrate and a support via an adhesive layer is provided with support holding members. Holding tools of the support holding members are configured to hold the support with oblique surface parts (contact members) of the holding tools without coming into contact with a surface of the support, which is to be attached to the substrate. The attaching device attaches, to the substrate, the support of which the surface is held not to be contacted.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: May 10, 2016
    Assignee: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Yoshihiro Inao, Shigeru Kato, Shugo Tsushima, Junichi Katsuragawa, Satoshi Kobari, Akihiko Nakamura
  • Patent number: 9267985
    Abstract: An integrated circuit (IC) that includes a plurality of bond pads disposed on a surface of the IC and a plurality of probe pads disposed on the surface of the IC is provided. Each of the plurality of probe pads is in electrical communication with corresponding bond pads. The plurality of probe pads are linearly configured across the surface. In one embodiment, the probe pads are disposed along a diagonal of the surface of the die defined between opposing vertices of the die surface. In another embodiment, multiple rows of linearly disposed probe pads are provided on the surface.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: February 23, 2016
    Assignee: Altera Corporation
    Inventor: William Y. Hata
  • Patent number: 9154972
    Abstract: A wireless electronic device may be provided with antenna structures. The antenna structures may be formed from an antenna ground and an array of antenna resonating elements formed along its periphery. The antenna resonating elements may be formed from metal traces on a dielectric support structure that surrounds the antenna ground. The electronic device may be tested using a test system for detecting the presence of manufacturing/assembly defects. The test system may include an RF tester and a test fixture. The device under test (DUT) may be attached to the test fixture during testing. Multiple test probes arranged along the periphery of the DUT may be used to transmit and receive RF test signals for gathering scattering parameter measurements on the device under test. The scattering parameter measurements may then be compared to predetermined threshold values to determine whether the DUT contains any defects.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: October 6, 2015
    Assignee: Apple Inc.
    Inventors: Jerzy Guterman, Joshua G. Nickel, Boon W. Shiu, Mattia Pascolini
  • Patent number: 9151696
    Abstract: A gage tool (700) for inspecting tolerances of a gas turbine engine seal plate (430) includes a base plate (710) and a top plate (720). The base plate (710) includes a base opening (712) and a slot (711) with an annular shape sized to receive a seal plate (430). The top plate (720) includes a top opening (723). The base opening (712) and top opening (723) each provide access to a portion of a seal plate (430) within the gage tool (700). The gage tool (700) also includes a first gage (750) with a probe tip for measuring a variation in an outer interlacing surface (433) of a seal plate (430) and a seal slide gage (740) for measuring a force required to rotate the seal plate (430) within the gage tool.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: October 6, 2015
    Assignee: Solar Turbines Incorporated
    Inventors: James Brian Powell, Scott L. Stafford, Luvern John Weber, Terry Toshio Akiyama
  • Patent number: 9069008
    Abstract: An inspection apparatus is provided, which includes probes for front side electrodes, probes for back side electrodes, and a chuck stage. The probes for front side electrodes and the probes for back side electrodes are formed on the upper surface of the chuck stage, and the probe contact area electrically continues to the wafer holding area, and the probes for front side electrodes and the probes for back side electrodes are located leaving a distance in horizontal direction between them so that the probes for back side electrodes move relatively within the probe contact area when the probes for front side electrodes are moved relatively within the wafer under test by the movement of the chuck stage.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: June 30, 2015
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Katsuo Yasuta, Hikaru Masuta, Hideki Nei
  • Publication number: 20150145541
    Abstract: An inspection apparatus and an inspection method capable of reducing the effect of noises are provided. An inspection apparatus according to the present invention includes a work table 26 on which an inspection panel 12 is placed, a probe unit 31 including a probe 38 that comes into contact with an electrode 12a of the inspection panel 12 placed on the work table 26, and a stage 11 that moves the work table 26 in order to bring the probe 38 into contact with the electrode 12a of the inspection panel 12 placed on the work table 26, in which the stage 11 is connected to the ground and supports the work table 26 through a resistive element.
    Type: Application
    Filed: November 13, 2014
    Publication date: May 28, 2015
    Inventors: Takayoshi KUDO, Katsuhiko KIMURA, Takahiro FUKUSHI, Kazuyoshi MIURA
  • Publication number: 20150109011
    Abstract: A method of testing an integrated circuit of a device is described. Air is allowed through a fluid line to modify a size of a volume defined between the first and second components of an actuator to move a contactor support structure relative to the apparatus and urge terminals on the contactor support structure against contacts on the device. Air is automatically released from the fluid line through a pressure relief valve when a pressure of the air in the fluid line reaches a predetermined value. The holder is moved relative to the apparatus frame to disengage the terminals from the contacts while maintaining the first and second components of the actuator in a substantially stationary relationship with one another. A connecting arrangement is provided including first and second connecting pieces with complementary interengaging formations that restricts movement of the contactor substrate relative to the distribution board substrate in a tangential direction.
    Type: Application
    Filed: December 26, 2014
    Publication date: April 23, 2015
    Applicant: AEHR TEST SYSTEMS
    Inventors: Scott E. Lindsey, Junjye Yeh, Jovan Jovanovic, Seang P. Malathong
  • Patent number: 9007081
    Abstract: A jig for use in a semiconductor test of the present invention includes; a base on which a probe pin and an insulating material are provided such that the probe pin is surrounded by the insulating material in plan view; and a stage arranged to face a surface of the base on which the probe pin and the insulating material are provided. The stage is capable of receiving a test object placed on a surface facing the base. When the test object is placed on the stage and the base and the stage move in a direction in which they get closer to each other, the probe pin comes into contact with an electrode formed on the test object, and the insulating material comes into contact with both the test object and the stage.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: April 14, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventor: Masaaki Ikegami
  • Patent number: 9000798
    Abstract: A system and method for aligning a probe, such as a wafer-level test probe, with wafer contacts is disclosed. An exemplary method includes receiving a wafer containing a plurality of alignment contacts and a probe card containing a plurality of probe points at a wafer test system. A historical offset correction is received. Based on the historical offset correct, an orientation value for the probe card relative to the wafer is determined. The probe card is aligned to the wafer using the orientation value in an attempt to bring a first probe point into contact with a first alignment contact. The connectivity of the first probe point and the first alignment contact is evaluated. An electrical test of the wafer is performed utilizing the aligned probe card, and the historical offset correction is updated based on the orientation value.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: April 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui-Long Chen, Chien-Chih Liao, Tseng Chin Lo, Hui-Yun Chao, Ta-Yung Lee, Jong-I Mou, Chin-Hsiang Lin
  • Patent number: 8981809
    Abstract: A compliant printed circuit semiconductor tester interface that provides a temporary interconnect between terminals on integrated circuit (IC) devices being tested. The compliant printed circuit semiconductor tester interface includes at least one dielectric layer printed with recesses corresponding to a target circuit geometry. A conductive material is deposited in at least a portion of the recesses comprising a circuit geometry and a plurality of first contact pads accessible along a first surface of the compliant printed circuit. At least one dielectric covering layer is preferably applied over the circuit geometry. A plurality of openings in the dielectric covering layer are provided to permit electrical coupling of terminals on the IC device and the first contact pads. Testing electronics that to test electrical functions of the IC device are electrically coupled to the circuit geometry.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: March 17, 2015
    Assignee: Hsio Technologies, LLC
    Inventor: James Rathburn
  • Publication number: 20150015285
    Abstract: A probe apparatus can suppress a spark from occurring near a wafer surface simply and efficiently when inspecting electrical characteristics of a semiconductor device at wafer level. A spark preventing device 50 mounted in the probe apparatus includes a surrounding member 52 which surrounds probe needles 24G and 24S between a probe card 16 and a mounting table 12; and a gas supply device 54 configured to supply a gas to a vicinity of the probe needles 24G and 24S through an inside or a vicinity of the surrounding member 52 to form an atmosphere of a preset pressure higher than an atmospheric pressure in the vicinity of the probe needles 24G and 24S when inspecting the electrical characteristics of each chip on a semiconductor wafer W. A contact plate 34 also serves as the surrounding member 52.
    Type: Application
    Filed: July 11, 2014
    Publication date: January 15, 2015
    Inventors: Eiichi Shinohara, Kenji Yamaguchi, Masataka Hatta
  • Patent number: 8872532
    Abstract: Wafer cassette systems and methods of using wafer cassette systems. A wafer cassette system can include a base and a probe card assembly. The base and the probe card assembly can each include complementary interlocking alignment elements. The alignment elements can constrain relative movement of the base and probe card assembly in directions parallel to a wafer receiving surface of the base, while permitting relative movement in a direction perpendicular to the receiving surface.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: October 28, 2014
    Assignee: FormFactor, Inc.
    Inventors: Keith J. Breinlinger, Eric D. Hobbs
  • Patent number: 8866503
    Abstract: A method for correcting inclination of a wafer chuck includes obtaining in advance a correction amount for each of the semiconductor chips which corrects the inclination of the wafer chuck in the case of applying a contact load to at least each one of the semiconductor chips and storing each of the correction amounts in a data storage unit; calculating a total correction amount for correcting the inclination of the wafer chuck by calculating the correction amount of each of the semiconductor chips bringing into contact with the probes when the semiconductor wafer comes into electrical contact with the probes and adding the calculated correction amounts; and correcting the inclination of the wafer chuck based on the total correction amount.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: October 21, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Kazunari Ishii, Toshihiko Iijima, Shuji Akiyama
  • Patent number: 8847618
    Abstract: A circuit board tester and method that precisely aligns the probe plate and circuit board is disclosed. With a circuit board and probe plate mounting within a housing having a top and bottom, hinged together, at closure there may be slight misalignments of the two. By making one of the two plates floating, or laterally slideable with respect to each other, it is possible to make final alignment at closure. One of the two plates can be provided with a pin and the other with a pin receiving alignment block. With the lateral slideability, the pin and block can insure proper probe alignment. Additional systems for correcting misaligned pins or blocks are also disclosed.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: September 30, 2014
    Assignee: Circuit Check, Inc.
    Inventors: Gregory J. Michalko, Stuart K. Eickhoff, Jon A. Hample, Russell G. Carter
  • Patent number: 8836318
    Abstract: A proximity electric current sensing device includes a main body, a first and second adjusting components, a first to third sensing units. The main body has a hole for a conducting wire to go through. The first and second adjusting components are disposed on a first and second sides of the main body respectively for adjusting a first and second positions of the conducting wire. The first to third sensing units are disposed on the main body and adjacent to a first to third sides of the conducting wire respectively for sensing a first to third magnetic fluxes of the conducting wire. The processing unit rotates the adjusting components to ensure the third sensing unit is right above the center of the conducting wire according to the first and second magnetic flux, estimates an installation position, and calculates an amount of an electric current according to the third magnetic flux.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: September 16, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Shih-Hsien Cheng, Ming-Jhe Du, Lien-Yi Cho
  • Patent number: 8823404
    Abstract: There are provided an evaluation device and an evaluation method for a substrate mounting apparatus capable of simply evaluating a temperature control function of the substrate mounting apparatus depending on evaluation conditions or circumstances and an evaluation substrate used for the same. The substrate mounting apparatus holds a target substrate mounted on a mounting surface and controls a temperature of the target substrate. The evaluation device includes an evacuable airtight chamber in which the substrate mounting apparatus is provided; an evaluation substrate which is mounted on the mounting surface instead of the target substrate and includes a self-heating resistance heater; and a temperature measurement unit which measures a temperature of the evaluation substrate.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: September 2, 2014
    Assignee: Tokyo Electron Limited
    Inventor: Yasuharu Sasaki
  • Publication number: 20140210501
    Abstract: A probe apparatus has probe wires with a contact pattern on one side. The contact pattern is for contacting a respective contact pattern on another test equipment or component, such as a circuit board. The probe wires have tips that probe a device desired for testing. Signals are transmitted through the probe wires from the probe card, for example, through a circuit board to other diagnostic equipment. The contact of the probe card with the circuit board allows signals to be transferred through the probe wires to the other diagnostic equipment. On another side of the probe card is a connector structure. The connector structure includes a retainer that can allow the probe card to be replaced from a test system, such as allowing it to be connected and disconnected from a holder.
    Type: Application
    Filed: July 6, 2012
    Publication date: July 31, 2014
    Applicant: CELADON SYSTEMS, INC.
    Inventors: Bryan J. Root, William A. Funk, John L. Dunklee
  • Patent number: 8729917
    Abstract: The inspection of semiconductors or like substrates by the present mechanism minimizes deflection in the checkplate and probe card. An inspection device including a housing, a toggle assembly within the housing, an objective lens assembly attached within the toggle assembly including an objective coupled within an objective focus, wherein the objective focus is deflectable along an optics axis, and a cam assembly including a rotary cam and a window carrier, wherein the window carrier is moveable along the optics axis with rotation of the rotary cam, wherein the cam assembly is coupled to the toggle assembly with the objective and window are aligned along the optics axis.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: May 20, 2014
    Assignee: Rudolph Technologies, Inc.
    Inventors: Gary Mark Gunderson, Greg Olmstead
  • Patent number: 8723538
    Abstract: An assembly includes a lower guide plate having a first plurality of through-holes therein, and an upper guide plate over the lower guide plate. The upper guide plate includes a second plurality of through-holes therein. The assembly further includes a plurality of probe pins. Each of the probe pins is inserted through one of the first plurality of through-holes and one of the second plurality of through-holes. The assembly further includes a plurality of probe pin stoppers, each attached to one of the probe pins, wherein the plurality of probe pin stoppers has lateral sizes greater than lateral sizes of the second plurality of through-holes. The plurality of probe pin stoppers is located over the upper guide plate.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: May 13, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wensen Hung, Yung-Hsin Kuo
  • Patent number: 8710855
    Abstract: A probe card holding apparatus is provided and may be configured to hold a probe card in a test head. The probe card may include a clamp head formed at a center part of a back surface of the probe card, and a holding device provided at the test head and configured to engage with the clamp head.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: April 29, 2014
    Assignee: Advantest Corporation
    Inventors: Katsuhiko Namiki, Shigeaki Naito
  • Patent number: 8692569
    Abstract: A circuit board tester and method that precisely aligns the probe plate and circuit board is disclosed. With a circuit board and probe plate mounting within a housing having a top and bottom, hinged together, at closure there may be slight misalignments of the two. By making one of the two plates floating, or laterally slideable with respect to each other, it is possible to make final alignment at closure. One of the two plates can be provided with a pin and the other with a pin receiving alignment block. With the lateral sideability, the pin and block can insure proper probe alignment. Additional systems for correcting misaligned pins or blocks are also disclosed.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: April 8, 2014
    Assignee: Circuit Check, Inc.
    Inventors: Troy Fossum, David Kariniemi
  • Patent number: 8674714
    Abstract: A system and method of probing work pieces is described. A first and second arm each having a pivot point and a guide end are pivotally coupled together at the respective pivot points. A probe tip holder is coupled to at least one of the first arm or the second arm. A guide means guides movement of the guide ends of the pivotally coupled arms, such that movement of the guide end of the first arm and the second arm move the probe tip holder in a plane parallel to the work piece surface.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: March 18, 2014
    Assignee: PPI Systems, Inc.
    Inventors: Anton Theodore Kitai, Paul Andrew Labelle, Robert Glenn Parker, David R. Walker
  • Publication number: 20140062516
    Abstract: An automatic test equipment (ATE) unit, which incorporates a mass interconnect system. The mass interconnect system is provided with a universal mounting table for use with receiver and test interface modules for electronically mounting and testing a variety of different types of electronic components or unit under test thereon. The mounting table test interface module incorporates MEMS based spring contacts to provide high-speed micro test-channels in order to establish signal connectivity between the components or unit under test and the tester, and which maintain the signal integrity up to 50 GHz without significant signal loss distortion.
    Type: Application
    Filed: March 7, 2012
    Publication date: March 6, 2014
    Applicant: UNIVERSITY OF WINDSOR
    Inventors: Rashid Rashidzadeh, Majid Ahmadi, Nabeeh Kandalaft
  • Patent number: 8659308
    Abstract: An apparatus and method for conducting electrical testing of probes is disclosed. Probes may also be tested for deflection and loading hysteresis.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: February 25, 2014
    Assignee: Rudolph Technolgies, Inc.
    Inventor: James Charles Andersen
  • Patent number: 8603840
    Abstract: To improve the reliability in an electric inspection of a semiconductor device. When a movable pedestal 15 is being positioned relative to an arrangement direction of a plurality of second contact pins 13a by a positioning pin 13b which a socket 12 includes, a substrate conduction test is performed by bringing a first contact pin 14a into contact with a pre-stack land 5c of a wiring substrate 5 and of the a lower package 2 and moreover bringing the second contact pin 13a into contact with a solder ball 7, and thus the electric inspection can be performed by precisely positioning the first contact pin 14a side and the second contact pin 13a side. Then, the reliability of the electric inspection can be improved.
    Type: Grant
    Filed: March 11, 2012
    Date of Patent: December 10, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Jun Matsuhashi, Naohiro Makihira
  • Publication number: 20130321012
    Abstract: A test system for testing a device under test (DUT) is provided. The test system may include a DUT receiving structure configured to receive the DUT during testing and a DUT retention structure that is configured to press the DUT against the DUT receiving structure so that DUT cannot inadvertently shift around during testing. The DUT retention structure may include a pressure sensor operable to detect an amount of pressure that is applied to the DUT. The DUT retention structure may be raised and lowered vertically using a manually-controlled or a computer-controlled positioner. The positioner may be adjusted using a coarse tuning knob and a fine tuning knob. The positioner may be calibrated such that the DUT retention structure applies a sufficient amount of pressure on the DUT during production testing.
    Type: Application
    Filed: June 1, 2012
    Publication date: December 5, 2013
    Inventors: Jayesh Nath, Liang Han, Matthew A. Mow, Hagan O'Connor, Joshua G. Nickel, Peter Bevelacqua, Mattia Pascolini, Robert W. Schlub, Ruben Caballero
  • Patent number: 8570058
    Abstract: A system and method is disclosed that transfers carrier boards in a handler that supports the testing of electronic devices. A carrier board can be transferred from the transfer start position to one of the mid transfer positions and the transfer final position. Carrier boards, which are spaced apart from each other in a chamber, can be gathered adjacent to each other in the circulation direction of carrier board. The transfer speed and the total circulation speed of the carrier boards can be enhanced. The transfer speed of carrier board can be easily controlled according to the test conditions.
    Type: Grant
    Filed: January 19, 2009
    Date of Patent: October 29, 2013
    Assignee: TechWing Co., Ltd.
    Inventors: Yun-Sung Na, In-Gu Jeon, Dong-Hyun Yo, Young-Ho Kweon, Hoyung-Su Kim
  • Publication number: 20130106453
    Abstract: A jig for use in a semiconductor test of the present invention includes; a base on which a probe pin and an insulating material are provided such that the probe pin is surrounded by the insulating material in plan view; and a stage arranged to face a surface of the base on which the probe pin and the insulating material are provided. The stage is capable of receiving a test object placed on a surface facing the base. When the test object is placed on the stage and the base and the stage move in a direction in which they get closer to each other, the probe pin comes into contact with an electrode formed on the test object, and the insulating material comes into contact with both the test object and the stage.
    Type: Application
    Filed: May 21, 2012
    Publication date: May 2, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventor: Masaaki IKEGAMI
  • Patent number: 8427183
    Abstract: A planarizer for a probe card assembly. A planarizer includes a first control member extending from a substrate in a probe card assembly. The first control member extends through at least one substrate in the probe card assembly and is accessible from an exposed side of an exterior substrate in the probe card assembly. Actuating the first control member causes a deflection of the substrate connected to the first control member.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: April 23, 2013
    Assignee: FormFactor, Inc.
    Inventors: Gaetan L. Mathieu, Benjamin N. Eldridge, Gary W. Grube
  • Patent number: 8368414
    Abstract: An apparatus for controlling the Z axis position of a wafer prober includes a first sensor unit including a plurality of pressure sensors distributed and installed between a Z axis support plate, for supporting a Z axis transferring unit and a Z axis base. Actuators are distributed and installed between the Z axis support plate and the Z axis base, and lift up or lower the Z axis support plate. A driving unit drives the actuators. A control module controls the driving unit to drive the actuators in response to pieces of sensed data. The control module drives the actuators when a difference between the pieces of sensed data is greater than a preset difference limit value, thus enabling the chuck plate to be maintained in a horizontal state.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: February 5, 2013
    Assignee: Semics Inc.
    Inventor: Young-Ho Ko
  • Patent number: 8354856
    Abstract: A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment is provided. The probe apparatus includes a replaceable probe tile removably mounted in a probing location on a base plate. The probe tile is configured into a self-contained assembly which includes a chassis body containing a plurality of probes for probing devices on a wafer, a dielectric block for supporting the probes, and a wireguide for guiding a plurality of cables from the testing equipment into the chassis body. A wafer station having replaceable base plates and replaceable probe tiles are also provided.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: January 15, 2013
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk
  • Patent number: 8348252
    Abstract: One embodiment of the present invention is a method for aligning a first workpiece to a second work piece that includes: (a) placing the first workpiece on an alignment apparatus including: (i) two or more fluid chambers disposed in fixed relation to each other, the chambers having a movable wall and one or more apertures for admitting or releasing fluid; (ii) fluid channels coupled to the one or more apertures that enable fluid to flow between at least two of the fluid chambers; and (iii) one or more valves disposed to enable or to stop the flow of fluid through one or more of the one or more fluid channels; (b) pumping incompressible fluid into the fluid chambers; (c) opening the one or more valves; (d) bringing the first and second workpieces into contact; (e) waiting a predetermined time for fluid flow in the fluid channels; (f) determining whether the first and second workpieces are aligned; (g) if they are aligned, shutting the valves; and (h) if they are not aligned, moving the second workpiece a prede
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: January 8, 2013
    Assignee: Centipede Systems, Inc.
    Inventors: Thomas H. Di Stefano, Peter T. Di Stefano
  • Patent number: 8344744
    Abstract: An arrangement is provided for testing DUTs with a chuck that has a support surface for supporting of a DUT as well as for supplying the support surface with a defined potential, or for connecting the DUT. The arrangement further includes a positioning device for positioning the chuck as well as an electromagnetic shielding housing enclosing at least the chuck. Inside the housing and adjacent to the chuck, a signal preamplifier is arranged whose signal port facing the chuck is electrically connected with the support surface, wherein the signal preamplifier is moveable together with the chuck by the positioning device in a way that it holds its position constant relative to the chuck during positioning. The signal preamplifier is connected to a measurement unit outside of the housing via a measurement cable.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: January 1, 2013
    Assignee: Cascade Microtech, Inc.
    Inventors: Axel Schmidt, Botho Hirschfeld, Stojan Kanev, Andrej Rumiantsev, Michael Teich
  • Publication number: 20120326741
    Abstract: Apparatus (10) for transmission testing of a telecommunications jack (100) having a plurality of insulation displacement contacts (IDCs) (103), the apparatus (10) including: a base (30); a plurality of transmission test probes (31) associated with the base (30); and a jack holder (20) for removably coupling the jack (100) to the base (30) such that IDCs (103) of the jack (100) are in electrical communication with corresponding test probes (31); wherein the jack holder (20) is fixed relative to the base (30) during testing, such that the jack (100) remains stationary with respect to the probes (31).
    Type: Application
    Filed: June 15, 2012
    Publication date: December 27, 2012
    Applicant: ADC Communications (Australia) Pty Limited
    Inventors: Kevin James Truskett, Kristian Darrell Stewart
  • Patent number: 8278951
    Abstract: A probe station for testing semiconductor substrates, i.e., wafers and other electronic semiconductor elements, suitable for carrying out low-current and low-voltage measurement, comprises a shielding with which the electromagnetic influence (EMI) of the measurement of the semiconductor substrate can be minimized, and also comprises devices for the preparation of test signals. In addition, the housing of the probe station can offer a different possibility for the accessibility of individual components or component groups of the probe station.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: October 2, 2012
    Assignee: Cascade Microtech, Inc.
    Inventors: Stojan Kanev, Hans-Jurgen Fleischer, Stefan Kreissig, Karsten Stoll, Axel Schmidt, Andreas Kittlaus
  • Publication number: 20120206159
    Abstract: Embodiments of interfaces are disclosed. One such interface has a plurality of connector assemblies, each connector assembly in a single opening of a plurality of openings passing completely through the interface. Each connector assembly has first and second connectors that are electrically and physically coupled to each other.
    Type: Application
    Filed: February 11, 2011
    Publication date: August 16, 2012
    Inventors: Scott Hoagland, Daniel Cram
  • Publication number: 20120153978
    Abstract: A ribbon terminal connecting apparatus for connecting a ribbon terminal of a photovoltaic device panel to an inspection apparatus terminal automatically when inspecting or measuring a photovoltaic device panel is provided. The ribbon-shaped terminal connecting apparatus includes a stand-up means, a base pressing means, a terminal connecting means and a moving means. The stand-up member of the stand-up means is lowered onto and contacted against the backing material of the photovoltaic device panel. The base portion of the ribbon terminal extended from the backing material is held down by the pressing means for pressing down on the base portion of the ribbon terminal. The moving means moves the stand-up member so that a leading edge of the ribbon terminal extending across the backing material is placed on the stand-up member. The terminal connecting means connects the terminal of the inspection apparatus to the ribbon terminal placed on the stand-up member.
    Type: Application
    Filed: August 26, 2010
    Publication date: June 21, 2012
    Applicant: NISSHINBO MECHATRONICS INC.
    Inventors: Mitsuhiro Shimotomai, Sumito Takeshita
  • Publication number: 20120126841
    Abstract: A probe apparatus includes a movable mounting table for supporting an object to be tested; a probe card disposed above the mounting table and having a plurality of probes to come into contact with electrodes of the object; a support body for supporting the probe card; and a control unit for controlling the mounting table. Electrical characteristics of the object are tested based on a signal from a tester by bringing the object and the probes into electrical contact with each other by overdriving the mounting table in a state where a test head is electrically connected with the probe card by a predetermined load. Further, one or more distance measuring devices for measuring a current overdriving amount of the mounting table are provided at one or more locations of the test head or the probe card.
    Type: Application
    Filed: January 26, 2012
    Publication date: May 24, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Yamada, Tomoya Endo, Shinya Koizumi
  • Publication number: 20120119766
    Abstract: A probe apparatus includes a movable mounting table for supporting an object to be tested; a probe card disposed above the mounting table and having a plurality of probes to come into contact with electrodes of the object; a support body for supporting the probe card; and a control unit for controlling the mounting table. Electrical characteristics of the object are tested based on a signal from a tester by bringing the object and the probes into electrical contact with each other by overdriving the mounting table in a state where a test head is electrically connected with the probe card by a predetermined load. Further, one or more distance measuring devices for measuring a current overdriving amount of the mounting table are provided at one or more locations of the test head or the probe card.
    Type: Application
    Filed: January 26, 2012
    Publication date: May 17, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Yamada, Tomoya Endo, Shinya Koizumi
  • Patent number: 8130004
    Abstract: A probe apparatus includes a movable mounting table for supporting an object to be tested; a probe card disposed above the mounting table and having a plurality of probes to come into contact with electrodes of the object; a support body for supporting the probe card; and a control unit for controlling the mounting table. Electrical characteristics of the object are tested based on a signal from a tester by bringing the object and the probes into electrical contact with each other by overdriving the mounting table in a state where a test head is electrically connected with the probe card by a predetermined load. Further, one or more distance measuring devices for measuring a current overdriving amount of the mounting table are provided at one or more locations of the test head or the probe card.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: March 6, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Yamada, Tomoya Endo, Shinya Koizumi
  • Publication number: 20120043983
    Abstract: An inspection device of a semiconductor integrated circuit includes a drive unit that moves a probe card back and forth and from side to side, a storage unit that stores arrangement of the semiconductor integrated circuit and a shape of the pads, and a control unit that controls the drive unit. The control unit controls the drive unit, performs an apex detection processing pressing the probe pin to the semiconductor integrated circuit, detecting positions of the probe pin where conduction is detected or not detected, and calculating coordinates of one apex of a inspection pad from detected positions, and calculates central coordinates of the inspection pad from information of the shape of the inspection pad based on the coordinates of the apex of the inspection pad. The drive unit presses the probe pin to the calculated central coordinates of the inspection pad to perform inspection.
    Type: Application
    Filed: August 18, 2011
    Publication date: February 23, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Nobuhiro SAWA, Toru KUME
  • Publication number: 20120025858
    Abstract: A probe card holding apparatus is provided and may be configured to hold a probe card in a test head. The probe card may include a clamp head formed at a center part of a back surface of the probe card, and a holding device provided at the test head and configured to engage with the clamp head.
    Type: Application
    Filed: August 1, 2011
    Publication date: February 2, 2012
    Applicant: ADVANTEST CORPORATION
    Inventors: Katsuhiko NAMIKI, Shigeaki NAITO
  • Patent number: 8089292
    Abstract: A system and method allow accurate calculation of probe float through optical free-hanging and electrical planarity measurement techniques. In accordance with an examplary embodiment, probe float may be determined by acquiring a free-hanging planarity measurement, obtaining a first electrical contact planarity measurement, and calculating probe float using results of the acquiring and the obtaining operations.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: January 3, 2012
    Assignee: Rudolph Technologies, Inc.
    Inventors: John T. Strom, Raymond H. Kraft