Probe Structure Patents (Class 324/755.01)
  • Patent number: 8988091
    Abstract: The present invention is a probe array for testing an electrical device under test comprising one or more ground/power probes and one or more signal probes and optionally a gas flow apparatus.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: March 24, 2015
    Assignee: MicroProbe, Inc.
    Inventor: January Kister
  • Patent number: 8988094
    Abstract: The invention relates to a test contact arrangement (15) for testing semiconductor components, comprising at least one test contact (10) which is arranged in a test contact frame (13) and is designed in the type of a cantilever arm and which has a fastening base (12) and a contact arm (30) which is provided with a contact tip (11) and which is connected to the fastening base, wherein the fastening base is inserted with a fastening projection (16) thereof into a frame opening (14) of the test contact frame in such a manner that a lower edge (17) of the fastening projection is essentially aligned flush with a lower side (18) of the test contact frame.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: March 24, 2015
    Assignee: Pac Tech-Packaging Technologies GmbH
    Inventor: Ghassem Azdasht
  • Patent number: 8988092
    Abstract: A probing apparatus for semiconductor devices provides a primary circuit board and a signal-adapting board positioned on the primary circuit board. The primary circuit board includes an inner area having a plurality of first contacts and an outer area having a plurality of first terminals and second terminals, and the first contacts are electrically connected to the first terminals via first conductive members in the primary circuit board. The signal-adapting board includes a plurality of second contacts electrically connected to the first contacts via second conductive members in the signal-adapting board.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: March 24, 2015
    Assignee: Star Technologies Inc.
    Inventors: Chen Jung Hsu, Chao Cheng Tseng
  • Patent number: 8988093
    Abstract: A probe assembly that acts as a temporary interconnect between terminals on an IC device and a test station. The probe assembly includes a plurality of stud bumps arranged on a first surface of a substrate in a configuration corresponding to the terminal on the IC device. The stud bumps include a shape adapted to temporarily couple with the terminals on the IC device. A plurality of conductive traces on the substrate electrically couple the stud bumps with the test station.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: March 24, 2015
    Assignee: Hsio Technologies, LLC
    Inventor: James Rathburn
  • Patent number: 8988065
    Abstract: According to an embodiment, a microprobe includes a base and a lever. The base includes a first electrode provided on a surface thereof. The lever is supported by the base and includes a second electrode and a third electrode. The second electrode is connected between the first electrode and the third electrode. The third electrode is formed to project from the second electrode in a first direction in a main surface of the lever. A width of the third electrode in a second direction perpendicular to the first direction in the main surface defines a width of an electrical contact area when a scanning operation is performed by use of the third electrode in a third direction perpendicular to the main surface.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: March 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yongfang Li, Yasushi Tomizawa
  • Patent number: 8981805
    Abstract: An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Publication number: 20150070037
    Abstract: Systems and methods to fixture and utilizing a probe which tests a capacitive array are described herein. A support bracket with freedom about a plurality of axes may aid in locating a probe and allowing the probe to contact multiple surfaces consistently. By utilizing the support bracket, the angle between a test probe and a contact surface may be minimized such that the surface of the test probe and the contact surface may rest flat against one another. The system may also limit the force translated through support bracket. This system and method may allow for a high degree of accuracy and a high degree of precision during contact of the test probe and the test surface.
    Type: Application
    Filed: August 4, 2014
    Publication date: March 12, 2015
    Inventors: Anuranjini Pragada, Terrence L. Van Ausdall, Steven P. Hotelling
  • Patent number: 8975906
    Abstract: A probe for inspecting electronic components, and more particularly, to a probe for inspecting electronic components, which connects a target electronic component to an inspection apparatus to inspect defects of the target electronic component. The probe for inspecting electronic components includes: a cylinder body having a cylindrical shape; a piston body reciprocating between an inside and an outside of the cylinder body; a spring surrounding an outer circumference of the cylinder body and the piston body, and forcing a part of the piston body to resiliently move out of the cylinder body when inserted into the cylinder body; a probing unit extending from the cylinder body to be brought into contact with a target electronic component to be inspected as to flow of electric current therethrough; and a contact unit extending from the piston body to be connected to an inspection apparatus for inspecting the target electronic component.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: March 10, 2015
    Assignee: NTS Co., Ltd.
    Inventor: Woo-Yoel Jeong
  • Patent number: 8975908
    Abstract: An embodiment disperses a force acting on a border portion between an extending portion and a pedestal portion or a reinforcing member to prevent breakage of a probe tip portion of a probe. An electrical test probe includes a probe main body, a recess provided at an end of the main body and having an inner surface, and a probe tip having a part received in the recess. The inner surface has a central area and two lateral areas on both sides of the central area, and the part of the probe tip is located at the central area and at least at either one of the lateral areas.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: March 10, 2015
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Takayuki Hayashizaki, Akira Soma, Hideki Hirakawa
  • Patent number: 8970245
    Abstract: A probing device for a TFT-LCD substrate, which includes a device body, a device body, a circuit board mounted on the device body, a plurality of motors mounted on the device body, and a plurality of probe pins respectively mounted to the motors. The motors and the probe pins are arranged in a one-to-one corresponding manner. The circuit board includes a programmable logic controller and a man-machine interface terminal electrically connected to the programmable logic controller. The plurality of motors and the plurality of probe pins are electrically connected to the programmable logic controller. The plurality of probe pins is set at locations corresponding to locations of panel inspection signal input pads of TFT substrates of various sizes. The programmable logic controller uses the motors to control the elevation and lowering of the probe pins.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: March 3, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Haijian Zhang
  • Patent number: 8970242
    Abstract: Provided is a method for manufacturing a probe card which inspects electrical characteristics of a plurality of semiconductor devices in batch. The method includes: a step of forming a plurality of probes, which are to be brought into contact with external terminals of the semiconductor devices, on one side of a board which forms the base body of the probe card; a step of forming on the board, by photolithography and etching, a plurality of through-holes which reach the probes from the other side of the board; a step of forming, in the through-holes, through electrodes to be conductively connected with the probes, respectively; and a step of forming wiring, which is conductively connected with the through electrodes, on the other side of the board.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: March 3, 2015
    Assignee: Rohm Co, Ltd.
    Inventors: Goro Nakatani, Masahiro Sakuragi, Koichi Niino
  • Patent number: 8970238
    Abstract: A probe module for testing an electronic device comprises at least two contacts, each contact including a first end portion extending in a first direction along a first line, a second end portion extending linearly in a second direction opposite from the first direction and along a second line, and a third curved portion extending between the first end portion and the second end portion. The first line is spaced apart from and in parallel with the second line, and the at least two contacts are spaced apart from each other in a direction perpendicular to the first line and the second line. Methods for making such a probe module are also taught.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: March 3, 2015
    Assignee: Electro Scientific Industries, Inc.
    Inventor: Douglas J. Garcia
  • Patent number: 8970240
    Abstract: Resilient electrical interposers that may be utilized to form a plurality of electrical connections between a first device and a second device, as well as systems that may utilize the resilient electrical interposers and methods of use and/or fabrication thereof. The resilient electrical interposers may include a resilient dielectric body with a plurality of electrical conduits contained therein. The plurality of electrical conduits may be configured to provide a plurality of electrical connections between a first surface of the electrical interposer and/or the resilient dielectric body and a second, opposed, surface of the electrical interposer and/or the resilient dielectric body. The systems and methods disclosed herein may provide for improved vertical compliance, improved contact force control, and/or improved dimensional stability of the resilient electrical interposers.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: March 3, 2015
    Assignee: Cascade Microtech, Inc.
    Inventors: Kenneth R. Smith, Mike Jolley, Eric Strid, Peter Hanaway, K. Reed Gleason, Koby L. Duckworth
  • Patent number: 8963568
    Abstract: The resistive probing tip system has one or more carriers and one or more electrical contact assemblies. Each carrier has opposing surfaces with a plurality of resistors engaging the carrier. Each of the plurality of resistors has opposing electrical contacts that are exposed at respective opposing surfaces of the carrier. Each electrical contact assembly has opposing surfaces with electrical contacts exposed at the opposing surfaces with each electrical contact exposed on one surface coupled to a corresponding electrical contact on the other opposing surface. The carrier(s) and the electrical contact assembly(s) selectively mate to and mate from one another with the electrical contacts exposed at the opposing surfaces the carrier(s) and the electrical contact assembly(s) contacting one another. The carrier(s) and/or the electrical contact assembly(s) may be selectively secured to either of a circuit board or a probe head.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: February 24, 2015
    Assignee: Tektronix, Inc.
    Inventors: Richard A. Booman, Neil C. Clayton, Bruce C. Tollbom
  • Patent number: 8963569
    Abstract: The present invention discloses a semiconductor chip probe for measuring conducted electromagnetic emission (EME) of a bare die and a conducted EME measurement apparatus with the semiconductor chip probe. The semiconductor chip probe comprises a substrate, a dielectric layer, an impedance unit, a measuring unit and a connection unit. The measurement apparatus comprises a semiconductor chip probe, a high frequency probe, a signal cable and a test receiver. The integrated passive component network designed and embedded inside the semiconductor chip probe forms the 1? or 150? impedance network. And the semiconductor chip probe is able to directly couple the EME conducted current or voltage from the test pin of the flipped chip under test to the test receiver for measurement.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: February 24, 2015
    Assignee: National Applied Research Laboratories
    Inventors: Yin-Cheng Chang, Da-Chiang Chang
  • Patent number: 8963567
    Abstract: A wafer probing system includes a probe card assembly having a plurality of individual probe structures configured make contact with a semiconductor wafer mounted on a motor driven wafer chuck, with each probe structure configured with a pressure sensing unit integrated therewith; and a controller configured to drive the probe card assembly with one or more piezoelectric driver units response to feedback from the pressure sensing units of the individual probe structures.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert D. Edwards, Oleg Gluschenkov, Louis V. Medina, Tso-Hui Ting, Ping-Chuan Wang, Yongchun Xin
  • Patent number: 8957691
    Abstract: A device includes a probe card, which further includes a chip. The chip includes a semiconductor substrate, a test engine disposed in the chip, wherein the test engine comprises a device formed on the semiconductor substrate, wherein the device is selected from the group consisting essentially of a passive device, an active device, and combinations thereof. A plurality of probe contacts is formed on a surface of the chip and electrically connected to the test engine.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: February 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mill-Jer Wang, Ching-Nen Peng, Hung-Chih Lin, Hao Chen
  • Patent number: 8957690
    Abstract: The present invention relates to a micro contact probe used for a probe card. An exemplary embodiment of the present invention provides a micro contact probe including a coating layer of a nanostructure such as carbon nanotubes formed on a surface thereof to reduce contact resistance when contacting a semiconductor chip. According to the micro contact probe of which the surface is coated with the nanostructure, contact resistance between the probe and the semiconductor chip is lowered and the high frequency characteristics are improved, such that a more accurate measurement can be obtained.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: February 17, 2015
    Assignee: Korea Institute of Machinery & Materials
    Inventors: Jung-Yup Kim, Hak-Joo Lee, Chang-Soo Han
  • Patent number: 8941403
    Abstract: A semiconductor device includes a unit region including a circuit test region and a probe test region. The circuit test region includes a test circuit and a plurality of circuit test pads operatively coupled to the test circuit. The probe test region includes first and second probe test pads insulated from the circuit test pads, and a first resistance pattern operatively coupled to the first and second probe test pads.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: January 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinman Chang, Kyounghyun Kim
  • Patent number: 8937484
    Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: January 20, 2015
    Assignee: Johnstech International Corporation
    Inventors: John E. Nelson, Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian Warwick, Gary W. Michalko
  • Patent number: 8933717
    Abstract: Probes are directly patterned on a test substrate, thereby eliminating a need for an interposer. Probe contact structures are formed as a two-level structure having a greater lateral dimension for a lower level portion than for an upper level portion. First cavities are formed in a masking layer applied to a test substrate, filling the cavities with a conductive material, and planarizing the top surfaces of the conductive material portions to form lower level portions. Another masking layer is applied over the lower level portions and patterned to define second cavities having a smaller lateral dimension that the lower level portions. The second cavities are filled with at least one conductive material to form upper level portions of the probe contact structures. The upper level portion of each probe contact structure can be employed to penetrate a surface oxide of solder balls.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: January 13, 2015
    Assignee: International Business Machines Corporation
    Inventors: David M. Audette, Kevin Bocash, S. Jay Chey, Steven A. Cordes, Dustin M. Fregeau
  • Publication number: 20150008950
    Abstract: Embodiments relate to the formation of test probes. One method includes providing a bulk sheet of an electrically conductive material. A laser is used to cut through the bulk sheet in a predetermined pattern to form a test probe. Other embodiments are described and claimed.
    Type: Application
    Filed: December 31, 2011
    Publication date: January 8, 2015
    Inventors: Roy E. Swart, Paul B. Fischer, Charlotte C. Kwong
  • Publication number: 20150002180
    Abstract: A space transformer includes: a ceramic substrate that contains enstatite and boron nitride as components; a through hole running through in a thickness direction with respect to a sintered body in which the boron nitride is oriented in one direction; conductive material provided inside the through hole; and a wiring pattern including a plurality of electrodes provided on each of two principal surfaces, wherein a wiring pitch in the wiring pattern on one principal surface is different from a wiring pitch in the wiring pattern on the other principal surface.
    Type: Application
    Filed: January 15, 2013
    Publication date: January 1, 2015
    Applicant: NHK SPRING CO., LTD.
    Inventors: Naoki Endo, Noriyoshi Kaneda, Shinya Miyaji
  • Patent number: 8922230
    Abstract: A three dimensional (3D) integrated circuit (IC) testing apparatus includes a plurality of connection devices. When a device under test (DUT) such as an interposer or a 3D IC formed by a plurality of 3D dies operates in a testing mode, the 3D IC testing apparatus is coupled to the DUT via a variety of interface channels such as probes. The connection devices and a variety of through silicon vias (TSVs) in the DUT form a TSV chain so that an electrical characteristic test of the variety of TSVs can be tested all at once.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: December 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mill-Jer Wang, Chih-Chia Chen, Hung-Chih Lin, Ching-Nen Peng, Hao Chen
  • Patent number: 8922196
    Abstract: A multifunction test instrument probe includes a housing having a hollow bore with an open end. A clamp plunger is carried in the hollow bore, with a first end including a thumb press, and a second end including an alligator clamp having a pair of jaws, with a compression spring normally biasing the thumb press away from the housing, and normally biasing the alligator clamp substantially within the hollow bore proximate the open end. A point plunger is also carried in the bore, with a first end including a thumb press, and a second end terminating in a point, with a second compression spring normally biasing the thumb press away from the housing, and biasing the point within the hollow bore proximate the open end.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 30, 2014
    Inventors: Paul Nicholas Chait, Stanley Chait
  • Patent number: 8922231
    Abstract: Embodiments of the present invention are directed to adjustable test probe tips that are indexable. In one embodiment a mechanism is coupled to a probe tip so that the mechanism may be used to index the probe tip to a plurality of particular positions. A label portion may be provided to communicate to a user that the length of the exposed probe tip is less than a particular length, such as the maximum length an exposed probe tip may be for a particular application.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: December 30, 2014
    Assignee: Fluke Corporation
    Inventors: Chris W. Lagerberg, Roger Stark
  • Patent number: 8917105
    Abstract: A testing apparatus for measuring the material properties of solder balls includes a frame and a chuck base moveable in X, Y, Z dimensions, relative to the frame. A probe tip is fixed to the frame. A measuring device is mounted to the frame and maintains a spacing with relationship to the probe tip and which has an initial, known height above the chuck base.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventor: David L. Gardell
  • Patent number: 8912811
    Abstract: A test fixture (120) is disclosed for electrically testing a device under test (130) by forming a plurality of temporary mechanical and electrical connections between terminals (131) on the device under test (130) and contact pads (161) on the load board (160). The test fixture (120) has a replaceable membrane (150) that includes vias (151), with each via (151) being associated with a terminal (131) on the device under test (130) and a contact pad (161) on the load board (160). In some cases, each via (151) has an electrically conducting wall for conducting current between the terminal (131) and the contact pad (161). In some cases, each via (151) includes a spring (152) that provides a mechanical resisting force to the terminal (131) when the device under test (130) is engaged with the test fixture (120).
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: December 16, 2014
    Assignee: Johnstech International Corporation
    Inventors: Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian K. Warwick
  • Patent number: 8901948
    Abstract: A wafer probe card has an adapter module and a probe module detachably mounted together. The adapter module has a holding member and an interposer mounted within the holding plate. The probe module has a frame assembly and a space transformer and a probe assembly mounted within the frame assembly. A fixing plate is mounted on the holding member of the adapter module to constitute an electrical connection among the interposer, space transformer and probe assembly. When any element of the wafer probe card is faulty, the adapter module or the probe module is detached and the faulty element is replaced. The adapter module or the probe module with the replaced element is then reassembled. Alternatively, the adapter module or the probe module can be replaced on a modular basis. Accordingly, it is not necessary that all components be detached entirely, thereby improving the operational speed and efficiency.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: December 2, 2014
    Assignee: Winway Technology Co., Ltd.
    Inventors: Chia-Huang Wang, Hsin Chieh Lu, Jung Fu Lee
  • Publication number: 20140340103
    Abstract: A probe card apparatus can comprise a tester interface to a test controller, probes for contacting terminals of electronic devices to be tested, and electrical connections there between. The probe card apparatus can comprise a primary sub-assembly, which can include the tester interface. The probe card apparatus can also comprise an interchangeable probe head, which can include the probes. The interchangeable probe head can be attached to and detached from the primary sub-assembly while the primary sub-assembly is secured to or in a housing of a test system. Different probe heads each having probes disposed in different patterns to test different types of electronic devices can thus be interchanged while the primary sub-assembly is secured to or in a housing of the test system.
    Type: Application
    Filed: May 12, 2014
    Publication date: November 20, 2014
    Applicant: FormFactor, Inc.
    Inventors: Toshihiro Kasai, Masanori Watanabe
  • Patent number: 8890558
    Abstract: Providing a test head capable of suppressing a probe card from bending. The test head 40 comprises: a test head main body 51 having a frame 51; an interface apparatus 60 electrically connecting a probe card 20 and the test head main body 50 with each other; and a brake unit 80 positioned between the probe card 20 and the frame 51 to transmit a pressing force F applied to the probe card 20 to the frame 51.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: November 18, 2014
    Assignee: Advantest Corporation
    Inventor: Atsuyuki Doi
  • Publication number: 20140333336
    Abstract: An embodiment of a test apparatus for executing a test of a set of electronic devices having a plurality of electrically conductive terminals, the test apparatus including a plurality of electrically conductive test probes for exchanging electrical signals with the terminals, and coupling means for mechanically coupling the test probes with the electronic devices. In an embodiment, the coupling means includes insulating means for keeping each one of at least part of the test probes electrically insulated from at least one corresponding terminal during the execution of the test. Each test probe and the corresponding terminal form a capacitor for electro-magnetically coupling the test probe with the terminal.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Inventor: Alberto PAGANI
  • Patent number: 8878560
    Abstract: The present disclosure provide a probe card for wafer level testing. The probe card includes a space transformer having a power line, a ground line, and signal lines embedded therein, wherein the space transformer includes various conductive lines having a first pitch on a first surface and a second pitch on a second surface, the second pitch being substantially less than the first pitch; a printed circuit board configured approximate the first surface of the space transformer; and a power plane disposed on the first surface of the space transformer and patterned to couple the power line and the ground line of the space transformer to the printed circuit board.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Hsin Kuo, Wensen Hung
  • Publication number: 20140320158
    Abstract: An electrical probe comprises a cylindrical body which has a first end including a plurality of claws and a second end opposite to the first end for cooperating with an electrical test machine, wherein a concave contact surface conforming with the curvature of a solder ball of an electronic device under test is formed between the claws, whereby the first end of the cylindrical body can be brought into line contact with the solder ball at a predetermined length to ensure a proper electrical connection, so that the accuracy of an electrical test can be increased.
    Type: Application
    Filed: July 26, 2013
    Publication date: October 30, 2014
    Inventor: TE-HSING HSIAO
  • Publication number: 20140320157
    Abstract: A probe for a measurement instrument comprises an input terminal configured to receive an input signal from a device under test (DUT), an output terminal configured to transmit an output signal to a measurement instrument, and a clamping circuit disposed in a signal path between the input terminal and the output terminal and configured to clamp an internal probe signal between an upper clamping threshold and a lower clamping threshold to produce the output signal, wherein the clamping circuit operates with substantial gain and amplitude linearity throughout a range between the upper clamping threshold and the lower clamping threshold.
    Type: Application
    Filed: April 24, 2013
    Publication date: October 30, 2014
    Applicant: Agilent Technologies, Inc.
    Inventors: Edward Vernon BRUSH, IV, Michael T. MCTIGUE, Kenneth W. JOHNSON
  • Patent number: 8860449
    Abstract: A dual probing tip system uses a slot and rail system to provide variable spacing and lateral and axial compliance of the probing tips mounted on first and second support members. A movable base member is secured on a frame with the base member having a rack of linear teeth and a pair of rails angled toward the front. First and second intermediate carriers each have a slot that engages one of the angled rails. Each of the carriers has stanchions that receive a thumb wheel pinion gear mounted on a shaft. The pinion gear mates with the teeth on the base member for movement of the carriers. Each support member has an axial slot that mated with an axial slot on each one of the carriers. Each support member has a compression spring which allows axial compliance of the support members.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: October 14, 2014
    Assignee: Tektronix, Inc.
    Inventors: James E. Spinar, Richard R. Lynn
  • Patent number: 8854072
    Abstract: In one embodiment, the present invention includes an apparatus for contacting a plurality of contact locations of a semiconductor device. The apparatus includes a housing, a support member, a plurality of probe members, and an adhesive substance. The housing has a plurality of apertures that provides a low leakage pathway for high frequency signals to reach the semiconductor device through the plurality of probe members. The plurality of probe members are aligned on the support member and the adhesive substance secures the plurality of probe members to the supporting member. The housing, supporting member, and adhesive substance match in thermal expansion to reduce the error in alignment between the plurality of contact locations and the plurality of probe members over a temperature variance.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: October 7, 2014
    Inventors: Hai Dau, Rupinder S. Mand, Jaspreet Singh, John Williamson
  • Patent number: 8854071
    Abstract: A test prod for high-frequency measurement having a contact-side end for electrically contacting planar structures and a cable-side end, for connecting to a cable, wherein between the contact-side end and the cable-side end a coplanar conductor structure having at least two conductors is arranged, wherein on the coplanar conductor structure a dielectric is arranged over a predetermined section between the cable-side end and the contact-side end, wherein the test prod is between the dielectric and the contact-side end such that the conductors of the coplanar conductor structure are arranged freely in space and relative to the dielectric in a suspending manner, wherein on one side of the test prod facing towards the planar structure a shielding element is arranged extending into the area of the coplanar conductor structure.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: October 7, 2014
    Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KG
    Inventor: Steffen Thies
  • Publication number: 20140292364
    Abstract: The present invention discloses a semiconductor chip probe for measuring conducted electromagnetic emission (EME) of a bare die and a conducted EME measurement apparatus with the semiconductor chip probe. The semiconductor chip probe comprises a substrate, a dielectric layer, an impedance unit, a measuring unit and a connection unit. The measurement apparatus comprises a semiconductor chip probe, a high frequency probe, a signal cable and a test receiver. The integrated passive component network designed and embedded inside the semiconductor chip probe forms the 1? or 150? impedance network. And the semiconductor chip probe is able to directly couple the EME conducted current or voltage from the test pin of the flipped chip under test to the test receiver for measurement.
    Type: Application
    Filed: June 19, 2013
    Publication date: October 2, 2014
    Applicant: National Applied Research Laboratories
    Inventors: Yin-Cheng CHANG, Da-Chiang CHANG
  • Patent number: 8841932
    Abstract: A prober for testing devices in a repeat structure on a substrate is provided with a probe holder plate, probe holders mounted on the plate, and a test probe associated with each holder. Each test probe is displaceable via a manipulator connected to a probe holder, and a substrate carrier fixedly supports the substrate. Testing of devices, which are situated in a repeat structure on a substrate, in sequence without a substrate movement and avoiding individual manipulation of the test probes in relation to the contact islands on the devices, is achieved in that the probe holders are fastened on a shared probe holder plate and the probe holder plate is moved in relation to the test substrate.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: September 23, 2014
    Assignee: Cascade Microtech, Inc.
    Inventors: Frank-Michael Werner, Matthias Zieger, Sebastian Giessmann
  • Patent number: 8832933
    Abstract: A testing probe card for wafer level testing semiconductor IC packaged devices. The card includes a circuit board including testing circuitry and a testing probe head. The probe head includes a probe array having a plurality of metallic testing probes attached to a substrate including a plurality of conductive vias. In one embodiment, the probes have a relatively rigid construction and have one end that may be electrically coupled to the vias using a flip chip assembly solder reflow process. In one embodiment, the probes may be formed from a monolithic block of conductive material using reverse wire electric discharge machining.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 16, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Hsin Kuo, Wensen Hung, Po-Shi Yao
  • Patent number: 8836358
    Abstract: A multi-point probe particularly suitable for automated handling is disclosed. An automated multi-point measuring system including the multi-point probe and a probe manipulator head is also disclosed In addition, an automated multi-point probe gripping system including a probe holder and the probe manipulator head is revealed. Further, a loaded probe loader comprising a probe loader and a probe cassette for handling the multi-point probe is also revealed, where the probe cassette is provided with the probe holder for securing the multi-point probe.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: September 16, 2014
    Assignee: Capres A/S
    Inventors: Henrik Baekbo, Peter F. Nielsen, Chaker Khalfaoui, Lauge Gammelgaard, Hans H. Jankjaer, Lars Norregaard, Hans H. Jochumsen, Anders Jensen, Jannik Sadolin, Niels Torp Madsen
  • Patent number: 8836362
    Abstract: A switch probe for use in a substrate inspection device to inspect a substrate includes a first tubular element, a first rod element partially accommodated in the first tubular element, and pressed into the first tubular element when the certain part is mounted for substrate inspection, a second tubular element fixed in the first tubular element, a second rod element partially accommodated in the second tubular element which is inside the first tubular element, and contacting with the first rod element when the first rod element is pressed into the first tubular element, and a fixing mechanism configured to temporarily fix the second rod element in a position so that the second rod element does not contact with the first rod element even when the first rod element is pressed into the first tubular element.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: September 16, 2014
    Assignee: Ricoh Company, Ltd.
    Inventor: Tohru Hasegawa
  • Publication number: 20140253161
    Abstract: Methods and apparatus for measuring minority carrier lifetimes using liquid probes are provided. In one embodiment, a method of measuring the minority carrier lifetime of a semiconductor material comprises: providing a semiconductor material having a surface; forming a rectifying junction at a first location on the surface by temporarily contacting the surface with a conductive liquid probe; electrically coupling a second junction to the semiconductor material at a second location, wherein the first location and the second location are physically separated; applying a forward bias to the rectifying junction causing minority carrier injection in the semiconductor material; measuring a total capacitance as a function of frequency between the rectifying junction and the second junction; determining an inflection frequency of the total capacitance; and determining a minority lifetime of the semiconductor material from the inflection frequency.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 11, 2014
    Applicant: Alliance for Sustainable Energy, LLC
    Inventor: Jian Li
  • Patent number: 8823538
    Abstract: In a method for optimizing an order in which certain points on a circuit board can be tested and evaluated, a coordinate system is established in a circuit diagram of a circuit board, and at least one locating point is preset. When an operator selects a signal path routing within the circuit diagram, the method can display the testing points in the selected signal path routing on a display device. After calculating the distance between each of the testing points and each of the at least one locating point, a group of distances is obtained. By comparing the distances, the minimum distance can be determined from the group of distances. The method further optimizes the order of the testing points according to the distance between each of the testing points and the locating point that consists of the minimum distance.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: September 2, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Hsien-Chuan Liang, Shen-Chun Li, Shou-Kuo Hsu
  • Publication number: 20140239994
    Abstract: A printed circuit board has first terminals for contacting terminals of a socket, second terminals for contacting terminals of a test fixture of an automatic test equipment, which are adapted for contacting the terminals of the socket of a device under test, transmission lines for connecting the first terminals and the terminals, and an extracting circuit electrically coupled to one of the transmission lines and configured to extract the signal being exchanged between the device under test and the automatic test equipment. The extracting circuit has a resistor or an electrical resistor network, wherein a loss added on the signal being exchanged between the device under test and the automatic test equipment over the one transmission line due to the presence of the printed circuit board is smaller than 6 dB.
    Type: Application
    Filed: May 1, 2014
    Publication date: August 28, 2014
    Inventors: Jose Antonio Alves Moreira, Marc Moessinger
  • Publication number: 20140239986
    Abstract: The present disclosure provides a biosensor device wafer testing and processing methods, system and apparatus. The biosensor device wafer includes device areas separated by scribe lines. A number of test areas that allow fluidic electrical testing are embedded in scribe lines or in device areas. An integrated electro-microfluidic probe card includes a fluidic mount that may be transparent, a microfluidic channels in the fluidic mount in a testing portion, at least one microfluidic probe and a number of electronic probe tips at the bottom of the fluidic mount, fluidic and electronic input and output ports on the sides of the fluidic mount, and at least one handle lug on the fluidic mount. The method includes aligning a wafer, mounting the integrated electro-microfluidic probe card, flowing one or more test fluids in series, and measuring and analyzing electrical properties to determine process qualities and an acceptance level of the wafer.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 28, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Taiwan Semiconductor Manufacturing Company, Ltd.
  • Patent number: 8816713
    Abstract: A probe card for high-frequency signal transmission includes a circuit board with transmission lines, a plurality of probes, and a signal path adjuster having first lead wires with a same length respectively connected between the transmission lines and the probes. Each first lead wire is selectively replaceable by a second lead having a length different from that of the first lead wire. As a result, a first high-frequency signal transmitting from one transmission line through the associated first lead wire to the associated probe and a second high-frequency signal transmitting from another transmission line through the associated second lead wire to the associated probe may have a same output timing when the first and second high-frequency signals are synchronously inputted into the circuit board.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: August 26, 2014
    Assignee: MPI Corporation
    Inventors: Wei-Cheng Ku, Chih-Hao Ho, Chen-Kuo Kao, Chao-Ping Hsieh
  • Publication number: 20140225637
    Abstract: A high bandwidth signal probe device and a method of probing a high bandwidth signal are provided. The high bandwidth signal probe device includes a probe tip for probing a stub of a backdrilled via of a printed circuit board. The probe tip is adapted to fit in the backdrilled via. The probe tip has a length adapted to reach the stub of the backdrilled via. The probe tip is adapted to contact a plated portion of the stub of the backdrilled via. A resistive element is associated with the probe tip. The method includes inserting a probe tip of a signal probe device in the backdrilled via, placing the probe tip in contact with a plated portion of the stub of the backdrilled via, and receiving an electrical signal through a path which includes a resistive element of the probe tip of the signal probe device.
    Type: Application
    Filed: February 11, 2013
    Publication date: August 14, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric R. Ao, Donald R. Dignam, Jian Meng, Fred Roberts
  • Patent number: 8803539
    Abstract: A probe assembly that acts as a temporary interconnect between terminals on a circuit member and a test station. The probe assembly can include a base layer of a dielectric material printed onto a surface of a fixture. The surface of the fixture can have a plurality of cavities. A plurality of discrete contact members can be formed in the plurality of cavities in the fixture and coupled to the base layer. A plurality of conductive traces can be printed onto an exposed surface of the base layer and electrically coupled with proximal ends of one or more of the discrete contact members. A compliant layer can be deposited over the conductive traces and the proximal ends of the contact members. A protective layer can be deposited on the compliant layer such that when the probe assembly is removed from the fixture the distal ends of the contact members contact terminals on the circuit member and the conductive traces electrically couple the circuit member to a test station.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: August 12, 2014
    Assignee: HSIO Technologies, LLC
    Inventor: James Rathburn