Support For Device Under Test Or Test Structure Patents (Class 324/756.01)
  • Patent number: 11933816
    Abstract: This disclosure relates generally to test equipment, apparatuses, and systems for a device under test, such as, but not limited to, a semiconductor device. More specifically, this disclosure relates to test equipment, apparatuses, and systems that are portable for use in atypical testing environments.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: March 19, 2024
    Assignee: CELADON SYSTEMS, INC.
    Inventors: William A. Funk, Garrett Tranquillo, Riley Kaiser
  • Patent number: 11933817
    Abstract: A probe card device and a transmission structure are provided. The transmission structure includes a supporting layer, a plurality of metal conductors spaced apart from each other and slantingly inserted into the supporting layer, and an insulating resilient layer formed on the supporting layer. Each of the metal conductors includes a positioning segment held in the supporting layer, a connecting segment and an embedded segment respectively extending from two ends of the positioning segment, and an exposed segment extending from the embedded segment. Each of the embedded segments is embedded and fixed in the insulating resilient layer, and each of the exposed segments protrudes from the insulating resilient layer. When any one of the exposed segments is pressed by an external force, the insulating resilient layer is configured to absorb the external force through the corresponding embedded segment so as to have a deformation providing a stroke distance.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: March 19, 2024
    Assignee: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen-Tsung Lee, Hsun-Tai Wei, Pang-Chi Huang, Meng-Chieh Cheng
  • Patent number: 11860191
    Abstract: The present disclosure discloses a probe module, comprising: a body, a floating plate located at the bottom of the body and a probe assembly located on the side of the body which is far away from the floating plate. The probe assembly includes a cover plate, a mould core comprising pin grooves and blade pins each limited and fixed in the pin groove by a limiting member. The floating plate comprises pin holes, and the floating plate is configured to be floatable relative to the body in an extension direction of the blade pin and electrical contact terminals of the blade pins may be inserted into the pin holes from the surface of the floating plate close to the body and protrude from the surface of the floating plate which is far away from the body.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: January 2, 2024
    Assignee: SUZHOU HYC TECHNOLOGY CO., LTD.
    Inventors: Bin Jiang, Yue Liu, Hao Li
  • Patent number: 11785747
    Abstract: The present disclosure refers to methods and electronics used to test immersion cooling controllers. A representative method comprises operably connecting a simulator device to an immersion cooling controller. The simulator device is used to communicate one or more changes to the immersion cooling controller wherein the one or more changes relate to one or more sensed parameters of an immersion cooling system. The reaction of the controller to the one or more changes is compared to an expected reaction of the controller to determine whether the controller is functioning properly. The controller may be configured to control any parameter of an immersion cooling system including, but not limited to, temperature, water flow, pressure, fluid level, fluid purity, and any combination thereof.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: October 10, 2023
    Assignee: TMGCore. INC.
    Inventor: Randall Coburn
  • Patent number: 11726111
    Abstract: A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: August 15, 2023
    Inventors: Changhyun Song, Jaehwan Jeong
  • Patent number: 11686762
    Abstract: A multi-prober chuck assembly and channel are provided. The multi-prober chuck assembly, according to one embodiment of the present invention, comprises: a chuck for supporting a wafer; a probe card structure coupled to the top part of the chuck; a heater for heating the chuck under the chuck; a conductive guard plate spaced apart from the heater below the heater; and a body part positioned under the chuck so that the heater and the guard plate are positioned inside the body part, wherein the probe card structure and the body part are coupled mechanically to form a cartridge-type structure.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: June 27, 2023
    Assignee: Korea Institute of Industrial Technology
    Inventors: Kyung Tae Nam, Seung Joon Lee, Kwang Hee Lee
  • Patent number: 11614350
    Abstract: A sensor test apparatus having excellent versatility is provided. The sensor test apparatus includes a first application unit 40 including a first application device including a socket to which the sensor is electrically connected, and a pressure chamber 43 which applies pressure to the sensor, a test unit which tests the sensor 90 via the socket, a conveying robot which conveys the sensor into and out of the first application unit 40, and an apparatus main body which houses the first application unit 40, the test unit 35 and the conveying robot, and the apparatus main body has an opening which allows the first application unit 40 to be inserted into the apparatus main body and removed from the apparatus main body to an outside.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: March 28, 2023
    Assignee: ADVANTEST Corporation
    Inventors: Kazunari Suga, Daisuke Takano, Satoshi Hanamura, Michiro Chiba, Hisao Nishizaki, Atsushi Hayakawa
  • Patent number: 11597036
    Abstract: An optical module includes an optical semiconductor chip having a first surface that includes a laser beam irradiation region and a cleavage region, an optical fiber optically coupled to the first surface, and a support member having a second surface bonded to the first surface, and configured to support the optical fiber. The optical semiconductor chip has an optical signal input and output part located in the cleavage region, and the second surface is bonded to the first surface within the cleavage region.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: March 7, 2023
    Assignee: FUJITSU OPTICAL COMPONENTS LIMITED
    Inventors: Kohei Shibata, Tatsuya Ito
  • Patent number: 11519938
    Abstract: Provided is a probe head capable of reducing an inductance value of a ground probe. In a probe head 1, a pin plate 40, a pin block 50, and a solder resist film 60 are stacked in this order from a measuring instrument side to be integrally formed, and constitute a support body that supports a signal probe 10 and a first ground probe 20. The pin plate 40 is an insulator. The pin block 50 is a conductor, and is electrically connected to the first ground probe 20 and a measuring instrument-side ground, and is not electrically connected to the signal probe 10. The solder resist film 60 is provided on the surface of the pin block 50 on a side of a device to be inspected, and is interposed between the pin block 50 and the device to be inspected.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: December 6, 2022
    Assignee: YOKOWO CO., LTD.
    Inventors: Yoshihiko Sakurai, Hiroshi Ishigure, Daisuke Hosokawa
  • Patent number: 11460501
    Abstract: A test system for high voltage testing of semiconductor devices including at least one test socket and a docking plate assembly. Each test socket includes a socket enclosure for encompassing first and second contact finger assemblies, in which the socket enclosure may include a cover and alignment plate. At least one test socket is embedded within the docking plate assembly which is configured to mount between high voltage test head and a pick and place handler. The docking plate assembly and each test socket includes one or more site openings each for receiving a corresponding device under test (DUT) during a high voltage test procedure. Each contact finger assembly includes at least one contact finger configured as an elongated conductor with a bent tip for electrically interfacing a pad of the DUT.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 4, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Wenshui Zhang, Wei Jue Lim
  • Patent number: 11016137
    Abstract: A semiconductor inspection jig includes: a jig body having a recessed part provided on a top surface of the jig body; a printed circuit board provided on the top surface of the jig body; a GND block provided in the recessed part and having first and second side faces opposite to each other; first and second blocks provided in the recessed part and sandwiching the GND block; a push-up part pushing up the GND block from a bottom surface of the recessed part; a first press part pressing the first block against the first side face of the GND block; and a second press part pressing the second block against the second side face of the GND block.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: May 25, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventor: Tomohito Taniuchi
  • Patent number: 10953550
    Abstract: A touch screen testing platform may be used to engage a dynamically positioned target feature being displayed on a touch screen enabled device during a testing protocol. The platform may record imagery displayed by the touch screen device and then analyze the imagery to locate the target feature within a reference coordinate system. The platform may recognize that the target feature is missing from the imagery and respond by causing the touch screen device to scroll through a command menu and/or toggle through virtual screens. Once located, the platform may instruct a robotic device tester to select the target feature by contacting the touch screen at the identified location using a conductive tip designed to simulate a user's fingertip. Prior to running a test, the camera may be focused to a point that is offset from the display screen of the touch screen device.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: March 23, 2021
    Assignee: T-Mobile USA, Inc.
    Inventor: David Ross Jenkinson
  • Patent number: 10951781
    Abstract: The present invention provides an information processing apparatus having a display unit that displays a screen on which a pointing tool corresponding to a function is disposed. The information processing apparatus obtains a display language of the screen and obtains a language of the pointing tool, and in a case where the display language differs from the language, displays, on the display unit, a confirmation screen for confirming with a user whether to execute the function corresponding to the pointing tool in response to an instruction given by the user via the pointing tool.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: March 16, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventor: Naoto Sasagawa
  • Patent number: 10930476
    Abstract: A plasma processing device that includes a processing chamber which is disposed in a vacuum vessel and is decompressed internally, a sample stage which is disposed in the processing chamber and on which a sample of a process target is disposed and held, and a plasma formation unit which forms plasma using process gas and processes the sample using the plasma, and the plasma processing device includes: a dielectric film which is disposed on a metallic base configuring the sample stage and connected to a ground and includes a film-like electrode supplied with high-frequency power internally; a plurality of elements which are disposed in a space in the base and have a heat generation or cooling function; and a feeding path which supplies power to the plurality of elements, wherein a filter to suppress a high frequency is not provided on the feeding path.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: February 23, 2021
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Tooru Aramaki, Kenetsu Yokogawa, Masaru Izawa
  • Patent number: 10908980
    Abstract: A method and a system for detecting faulty devices are provided. The method comprises the steps of gathering test data in near field with respect to a device under test, extrapolating the test data to far field conditions with the aid of at least one machine learning technique, and evaluating a far field performance of the device under test on the basis of the far field conditions.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: February 2, 2021
    Assignee: ROHDE & SCHWARZ GMBH & CO. KG
    Inventors: Benoit Derat, Athanasios Karamalis, Sherif Ahmed
  • Patent number: 10836043
    Abstract: The invention includes a method of testing a mobile device with a robotic testing device having a holder, a first motor operatively connected to a first robotic implement, and a second motor operatively connected to a second robotic implement. The method includes securing, via the holder, the mobile device to the robotic testing device; actuating, via the first motor, the first robotic implement to contact the mobile device at a first location at a first time; actuating, via the second motor, the second robotic implement to contact the mobile device at a second location at a second time; and recording, via a data processor of the robotic testing device, a response of the mobile device in memory of the robotic testing device. The robotic testing device includes a pressure feedback sensor configured to sense a pressure of one or more of the robotic implements while interacting with the mobile device.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: November 17, 2020
    Assignee: FMR LLC
    Inventors: Edgar Lobaton, Farrokh Mohammadzadeh, Michael Tran, Jeremy Alexander Cole, Ross Inman
  • Patent number: 10749443
    Abstract: The disclosure is directed to a power module that includes at least one power substrate, a housing arranged on the at least one power substrate, and a first terminal electrically connected to the at least one power substrate. The first terminal includes a contact surface located above the housing at a first elevation. The power module includes a second terminal including a contact surface located above the housing at a second elevation different from the first elevation, a third terminal electrically connected to the at least one power substrate, and a plurality of power devices electrically connected to the at least one power substrate.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: August 18, 2020
    Assignee: Cree Fayetteville, Inc.
    Inventors: Daniel Martin, Brice McPherson, Alexander Lostetter
  • Patent number: 10605305
    Abstract: Provided is a vibration reduction device for a bearing, including: a bearing tube (50) which is spaced apart from an outer race of a bearing at a predetermined interval and surrounds the outer race; and a link (100) which is disposed between the outer race and the bearing tube, in which the link includes an outer race connecting portion (120) which is in contact with the outer race, and a tube connecting portion (130) which is in contact with the bearing tube, such that vibration reduction performance is implemented by the bearing tube and the link installed at an outer side of the bearing, and as a result, the vibration reduction device may be applied to various fields in which it is necessary to minimize vibration.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: March 31, 2020
    Assignee: KOREA AEROSPACE RESEARCH INSTITUTE
    Inventor: Dae Kwan Kim
  • Patent number: 10564185
    Abstract: A prober for preventing a collision between a probe and a probe position detecting camera and a prober operation method are provided. A prober that performs an inspection by bringing a probe into contact with an electrode of a wafer W includes: a probe position detecting camera for detecting the position of the tip of the probe to perform relative positional alignment between the electrode of the wafer W and the probe; a probe height detector, provided separately from the probe position detecting camera, for detecting the height of the tip of the probe from a reference plane serving as a reference for the height of the probe position detecting camera; and a first height adjusting mechanism for changing the height of the probe position detecting camera from the reference plane, based on the detection result of the probe height detector.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: February 18, 2020
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Toshiro Mori, Tomoya Nishida
  • Patent number: 10173843
    Abstract: An arrangement for conveying an electronic device in a testing system includes a conveyor arrangement, a plate having at least one opening for the conveyor arrangement, and an elevator configured to elevate the conveyor arrangement through the at least one opening of the plate. The conveyor arrangement is configured to receive and convey the electronic device when the conveyor arrangement extends through the at least one opening. The elevator is further configured to lower the conveyor arrangement through the at least one opening of the plate. The plate is configured to receive the electronic device from the conveyor arrangement in response to lowering the conveyor arrangement through the at least one opening. The plate is further configured to move with respect to the conveyor arrangement, and to carry the electronic device to a testing area of the testing system.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: January 8, 2019
    Assignee: JOT AUTOMATION OY
    Inventor: Mika Puttonen
  • Patent number: 9941573
    Abstract: A problem with conventional article management systems has been that the management scheme for articles. The present invention addresses this problem by providing an article management system comprising: a transmitting antenna for transmitting a radio signal; a receiving antenna for receiving a radio signal; a article to be managed positioning region whereat articles to be managed are placed; an RF tag provided with a tag transmitting unit which electromagnetically couples with the transmitting antenna and the receiving antenna; and an RFID reader which sends a transmission signal to the RF tag via the transmitting antenna and receives a response signal outputted by the tag transmitting unit via the receiving antenna. The RFID reader detects whether or not a article to be managed is present by detecting for changes in the operation characteristics of the tag transmitting unit due to the article to be managed according to changes in either the strength or phase of the response signal from the RF tag.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: April 10, 2018
    Assignee: NEC Corporation
    Inventor: Hiroshi Fukuda
  • Patent number: 9940859
    Abstract: A testing apparatus for testing a display apparatus includes a base substrate, a plurality of fixing tools on the base substrate to affix the display apparatus to the base substrate, the plurality of fixing tools being movable in a z-axis direction independently of each other, the z-axis direction extending along a normal direction to the base substrate, and a controller that controls the fixing tools to bend the display apparatus in two or more test patterns different from each other.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: April 10, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dae Won Kim, Hanki Park, Chanhyung Yoo, Wookjae Lee, Inho Hwang
  • Patent number: 9910303
    Abstract: Electrical switchable glasses production comprising the steps of: (a) providing a first and second cover glass; (b) providing a PDLC or other electrically switchable film; (c) providing a first and second layer of adhesive interlayer; (d) providing a PDLC inspection station further comprising: (i) a levelled-up table; (ii) means for inspecting properties of the PDLC film and/or glasses selected from the group consisting of electric properties, optical properties, mechanical properties and any combination thereof; (e) placing the first cover glass onto the levelled-up table; (f) spreading a first layer of adhesive interlayer (g) spreading the PDLC film over the previously placed adhesive interlayer; (h) spreading a second layer of adhesive interlayer; (i) covering the PDLC film by means of the second cover glass; (j) laminating the PDLC film between the first and second cover glasses; and (k) inspecting the glass properties by means of the PDLC inspection station before and after laminating the PDLC film.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: March 6, 2018
    Assignee: GAUZY LTD.
    Inventors: Adrian Lofer, Eyal Peso, Dimitri Dobrenko, Yair Asulin
  • Patent number: 9638714
    Abstract: A structure and method for providing a contact pin between a device under test (DUT) and a load board which provides upper and lower contact point which are axial aligned is disclosed. The pin has an upper (30) and lower (32) section and a hinge in between which allow flex of both upper and lower contact (24/26) which, but the axial alignment can provide a direct replacement for POGO pins but with greater reliability. It also includes a structure and method for removing upper pins 230 by use of a modified hinge 244a. In an alternate embodiment, the lower section includes a leg extension 320 and a sliding contact land 360 which slides against an aperture in the housing. A spacer 342 provides space for decoupling components on the load board. The hinge may include a truncated cylinder 40b which is configured to permit remove of the upper pin without removal of the lower.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: May 2, 2017
    Assignee: Johnstech International Corporation
    Inventors: David Johnson, John Nelson, Sarosh Patel, Michael Andres
  • Patent number: 9606171
    Abstract: A test handler comprises a main rotary turret and a loading station operative to convey electronic components to functional modules of the main rotary turret. An auxiliary rotary turret incorporating multiple carrier modules then receives electronic components from the functional modules of the main rotary turret. Multiple testing stations located along a periphery of the auxiliary turret are operative to receive electronic components from the carrier modules for testing while the loading station is concurrently conveying electronic components to the functional modules of the main rotary turret, so that the impact of transfer time is reduced or eliminated in a test process cycle of the test handler.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: March 28, 2017
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Yu Sze Cheung, Kai Fung Lau
  • Patent number: 9354251
    Abstract: An integrated circuit test socket is adapted to use with Kelvin connectors by creating closely spaced connectors and counter-rotating links that are nested to conserve space. The connectors are shaped to make contact with a chip and communicate force and sense signals to a tester, allowing a measure of the chip's actual resistance.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: May 31, 2016
    Assignee: Titan Semiconductor Tool, LLC
    Inventors: Victor Landa, Pongsak Tiengtum
  • Patent number: 9202675
    Abstract: A plasma processing apparatus includes a processing chamber in which a target object is processed by a plasma, a first and a second electrode that are provided in the processing chamber to face each other and have a processing space therebetween, and a high frequency power source that is connected to at least one of the first and the second electrode to supply a high frequency power to the processing chamber. And at least one of the first and the second electrode includes a base formed of a plate-shaped dielectric material and a resistor formed of a metal and provided between the base and the plasma.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: December 1, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinji Himori, Daisuke Hayashi
  • Patent number: 9121891
    Abstract: An apparatus for de-embedding through substrate vias is provided. The apparatus may include pads on a first side of a substrate are coupled to through vias extending through a substrate, wherein pairs of the through vias are interconnected by transmission lines of varying lengths along a second side of the substrate. The apparatus may further include pairs of pads coupled together by transmission lines of the same varying lengths. Apparatuses may include through vias surrounding a through via device under test. The surrounding through vias are connected to the through via device under test by a backside metal layer. The apparatus may further include a dummy structure having an area equal to an area of the backside metal layer.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: September 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Tsung Yen, Min-Chie Jeng, Victor Chih Yuan Chang, Chin-Wei Kuo, Yu-Ling Lin
  • Publication number: 20150137842
    Abstract: A prober includes: a wafer chuck having a conductive support surface; a movement rotation mechanism which moves and rotates the wafer chuck; a head stage which holds a probe holding portion; a stage member which has a conductive stage surface that is formed in parallel to the support surface and electrically connected with the support surface, and can move integrally with the wafer chuck; and a contactor which is fixed to a position facing the stage member and whose tip can electrically come into contact with the stage surface, wherein the stage member is separated from the wafer chuck as a separate body, and the stage surface and the support surface are electrically connected through a wiring member; and a back-surface electrode of a chip is electrically connected with a tester through the wafer chuck, a wiring, the stage member and the contactor.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 21, 2015
    Inventors: Konosuke Murakami, Toshiro Mori, Yuji Shigesawa, Kazuhisa Aoki, Akira Yamaguchi
  • Publication number: 20150137846
    Abstract: A test platform for devices requiring electromagnetic interference testing includes a base, a supporting pole perpendicularly mounted on the base, a supporting member rotatably supported on the supporting pole, and a number of conductive apparatus mounted to the supporting pole. The supporting member includes a power socket. Each conductive apparatus includes a tank fitted about the supporting pole, conductive liquid received in the tank, first cables, and a second cable. Each tank defines an annular slide slot surrounding the supporting pole. First ends of the first cables are connected the power socket, second ends of the first cables are extended through the slide slots and electrically coupled to the conductive liquid. A first end of the second cable is electrically coupled to the conductive liquid, and a second end of the second cable is electrically coupled to an uninterrupted power supply.
    Type: Application
    Filed: December 27, 2013
    Publication date: May 21, 2015
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventors: TEN-CHEN HO, XIAO-LIAN HE, WEI ZHOU
  • Publication number: 20150130492
    Abstract: A test carrier includes a base member that holds a die and a cover member. The base member includes a board having a wiring line that is electrically connected to the die. The wiring line includes a wiring line and a resistive portion having a resistance value that is higher than the resistance value of the wiring line.
    Type: Application
    Filed: May 27, 2013
    Publication date: May 14, 2015
    Applicant: ADVANTEST CORPORATION
    Inventors: Kiyoto Nakamura, Kazuo Takano, Noriyuki Masuda
  • Patent number: 9030223
    Abstract: A test carrier includes a base member and a cover member between which a die is interposed. The base film of the base member has: first interconnect patterns which are formed in advance; and a printing region where second interconnect patterns which electrically connect to the first interconnect patterns are to be formed by printing.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: May 12, 2015
    Assignee: Advantest Corporation
    Inventors: Kiyoto Nakamura, Yoshinari Kogure
  • Publication number: 20150115991
    Abstract: A maintenance carriage of a wafer inspection apparatus can easily unload a test head. A wafer inspection apparatus 10 includes a cell tower 12 in which cells 11 are arranged at four levels, and each of the cells 11 accommodates a test head 15. At an outside of the cell tower 12, a maintenance carriage 27 is arranged. The maintenance carriage 27 includes a carriage base 29 configured to be moved through rollers 28; a test head case 31 configured to accommodate the test head 15; a lift device 30 provided uprightly from the carriage base 29 and configured to move up and down the test head case 31; and a horizontal position adjusting stage 35 provided between a lifter 34 of the lift device 30 and the test head case 31 and configured to move the test head case 31 horizontally with respect to the lifter 34.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 30, 2015
    Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
  • Patent number: 9007084
    Abstract: A support structure for installation of a component assembly housed in a rotating, translating carriage chassis, the support structure including: a stationary rail that includes a shaft extruding perpendicular to the stationary rail; a rotating rail adapted to receive a carriage chassis rail, the rotating rail parallel to the stationary rail when the rotating rail is in a non-rotated position, the rotating rail including a shaft receptacle that receives the shaft, the rotating rail configured to rotate about the shaft and relative to the stationary rail; and a translation mechanism attached to the rotating rail, the translation mechanism enabling the carriage chassis rail to translate parallel to and along the rotating rail.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: April 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Raymond F. Babcock, Michael A. Boraas, Matthew A. Butterbaugh, Jeffrey L. Justin
  • Patent number: 9007086
    Abstract: The present invention discloses a voltage applying device for an LCD substrate, and the voltage applying device includes a base, a probe bar, and probe pins. The base includes a first slide rail. The probe bar is movably disposed on the first slide rail of the base, and the probe bar includes a second slide rail. The probe pins are movably disposed on the second slide rail of the probe bar, and the probe pins are utilized to contact a plurality of contact pads of the LCD substrate, so as to apply voltage on the LCD substrate. The voltage applying device of the present invention can overcome a problem of increased costs for a conventional voltage applying device can not be shared.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: April 14, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Shengpeng Mo, Wen-Pin Chiang
  • Patent number: 9000785
    Abstract: A test structure may characterize the properties of a transistor including a DC test structure for testing DC properties of the transistor, and an AC test structure for testing AC properties of the transistor. The DC and AC test structures may have common test pads.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: April 7, 2015
    Assignee: STMicroelectronics SA
    Inventors: Clement Charbuillet, Patrick Scheer
  • Publication number: 20150091599
    Abstract: A semiconductor testing jig is provided with a conductive stage including a plurality of mounting portions on which a plurality of vertical semiconductor devices are each individually disposed with lower surface electrodes being in contact with the plurality of mounting portions, an insulating frame portion having a lattice pattern that is disposed on the stage and surrounds each of the plurality of mounting portions in plan view to define each of the mounting portions, and an abrasive layer disposed in a position in the frame portion, the position facing each of the vertical semiconductor devices disposed on the mounting portions.
    Type: Application
    Filed: June 27, 2014
    Publication date: April 2, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Takaya NOGUCHI, Norihiro TAKESAKO, Kinya YAMASHITA, Hajime AKIYAMA
  • Patent number: 8981805
    Abstract: An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Publication number: 20150070037
    Abstract: Systems and methods to fixture and utilizing a probe which tests a capacitive array are described herein. A support bracket with freedom about a plurality of axes may aid in locating a probe and allowing the probe to contact multiple surfaces consistently. By utilizing the support bracket, the angle between a test probe and a contact surface may be minimized such that the surface of the test probe and the contact surface may rest flat against one another. The system may also limit the force translated through support bracket. This system and method may allow for a high degree of accuracy and a high degree of precision during contact of the test probe and the test surface.
    Type: Application
    Filed: August 4, 2014
    Publication date: March 12, 2015
    Inventors: Anuranjini Pragada, Terrence L. Van Ausdall, Steven P. Hotelling
  • Publication number: 20150056727
    Abstract: A method of inspecting a semiconductor device includes attaching an inspection tool on a back surface of a semiconductor substrate including the semiconductor device, the inspection tool including a sheet and a holding frame, the sheet being larger than the semiconductor substrate and being provided with an opening in a center portion of the sheet, the opening being smaller than the semiconductor substrate, the holding frame holding an outer periphery of the sheet, and a supporting substrate being attached on a front surface of the semiconductor substrate, removing the supporting substrate attached on the front surface of the semiconductor substrate, and measuring electrical characteristics of the semiconductor device.
    Type: Application
    Filed: October 1, 2014
    Publication date: February 26, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daisuke YAMASHITA, Hironobu SHIBATA, Akira EZAKI
  • Patent number: 8963573
    Abstract: According to an example implementation, a universal tester includes a host interface slot connected to a first pluggable host card during an electrical test mode of operation to provide a stressed electrical signal to a host under test. The host interface slot is connected to a second pluggable host card during an optical test mode of operation, the second pluggable host card including an electrical-optical conversion block to convert a stressed electrical signal to a stressed optical signal that is provided to a host under test. A stressor generator may operation in pass-through mode or a loop-back mode.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 24, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: D. Brice Achkir, Marco Mazzini, Stefano Riboldi, Cristiana Muzio
  • Publication number: 20150048860
    Abstract: Embodiments of the present invention disclose an apparatus and method to determine the intra-chip variation of an integrated circuit. In an embodiment, an apparatus comprises a test macro that includes two or more test structures; wherein each test structure includes identical copies of the same performance monitor; wherein each performance monitor has a unique bounding circuitry that encompasses the performance monitor; and wherein the two or more test structures are positioned close enough to each other as to reduce systematic across chip variation between the two or more test structures.
    Type: Application
    Filed: August 15, 2013
    Publication date: February 19, 2015
    Applicant: International Business Machines Corporation
    Inventors: Jeanne P.S. Bickford, Aurelius L. Graninger, Christopher T. McEvoy, Joseph J. Oler, JR.
  • Patent number: 8952383
    Abstract: A test carrier which can suppress the occurrence of contact defects while securing positional precision of the terminals is provided. A test carrier 10 comprises: a base film 40 which has one main surface which has bumps which contact electrodes 91 of the die 90; and a cover film 70 which is laid over the base film 40, the die 90 is held between the base film 40 and the cover film 70, the base film 40 has: a first region 40a which has a first thickness t1; and a second region 40b which has a second thickness t2 which is thinner than the first thickness t1, and the second region 40b faces at least a part of the edge 92 of the die 90.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: February 10, 2015
    Assignee: Advantest Corporation
    Inventors: Kiyoto Nakamura, Takashi Fujisaki
  • Publication number: 20150035554
    Abstract: Structures and methods are provided for temporarily bonding handler wafers to device wafers using bonding structures that include one or more releasable layers which are laser-ablatable using mid-wavelength infrared radiation
    Type: Application
    Filed: March 27, 2014
    Publication date: February 5, 2015
    Applicant: International Business Machines Corporation
    Inventors: Bing Dang, John U. Knickerbocker, Cornelia Kang-I Tsang
  • Publication number: 20150028910
    Abstract: A testing apparatus includes a base mounted on a motherboard, an inserting unit mounted on the base, a movable unit secured to the inserting unit, and a driving device mounted between the movable unit and the base. The movable unit is driven to move by the driving device, thereby enabling the inserting unit to move to enable the expansion card to be inserted into the motherboard. The movable unit is driven to move by the driving device, thereby enabling the inserting unit to move to enable the expansion card to move out of the motherboard.
    Type: Application
    Filed: July 28, 2014
    Publication date: January 29, 2015
    Inventors: GUANG-WEN HE, FU-QIANG JING
  • Patent number: 8937484
    Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: January 20, 2015
    Assignee: Johnstech International Corporation
    Inventors: John E. Nelson, Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian Warwick, Gary W. Michalko
  • Publication number: 20150015292
    Abstract: A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 15, 2015
    Inventors: Aaron Durbin, David Keith, Morgan Johnson
  • Patent number: 8933718
    Abstract: A signal distribution structure for distributing a signal to a plurality of devices includes a first signal guiding structure including a first characteristic impedance. The signal distribution structure also includes a node, wherein the first signal guiding structure is coupled to the node. The signal distribution structure includes a second signal guiding structure including one or more transmission lines. The one or more transmission lines of the second signal guiding structure are coupled between the node and a plurality of device connections. The second signal guiding structure includes, side-viewed from the node, a second characteristic impedance which is lower than the first characteristic impedance. The signal guiding structure also includes a matching element connected to the node.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: January 13, 2015
    Assignee: Advantest (Singapore) Pte Ltd
    Inventor: Bernd Laquai
  • Patent number: 8933720
    Abstract: An apparatus for maintaining a conductivity of electrical contacts of a test contactor for testing electronic devices comprises a rotary turret disk having a plurality of test stands operative to hold respective electronic devices, the electronic devices being rotatable by the rotary turret disk to a position of the test contactor to be contacted by the electrical contacts during testing. At least one contactor maintenance stand comprising a maintenance component is located between adjacent test stands on the rotary turret disk, wherein the electrical contacts of the test contactor are adapted to engage the maintenance component so as to automatically clean the electrical contacts and/or verify the conductivity thereof.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: January 13, 2015
    Assignee: ASM Technology Singapore Pte Ltd
    Inventors: Yui Kin Tang, Chak Tong Sze, Pei Wei Tsai, Cho Hin Cheuk, Kut Lam
  • Patent number: 8928345
    Abstract: A test coupler for supplying a device under test with test signals contains a first coaxial connector, a waveguide port, and a first strip conductor. Test signals of a lower frequency range are supplied to the first coaxial connector. Test signals of an upper frequency range are supplied to the waveguide port. The test coupler guides the test signals on the first strip conductor to the device under test.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: January 6, 2015
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Ralf Juenemann, Alexander Bayer, Michael Freissl, Christian Evers