Abstract: A level shifting circuit according to the present invention has first and second voltage terminals, first and second input terminals, an output terminal, a level converter circuit and an output circuit. The level converter includes first, second and third nodes, first, second, third and fourth transistors and an resistive element. The first transistor has a first electrode connected to the first voltage terminal, a second electrode connected to the first node and a control electrode connected to the first input terminal. The second transistor has a first electrode connected to the first voltage terminal, a second electrode connected to the second node and a control electrode connected to the second input terminal. The third transistor has a first electrode connected to the second voltage level, a second electrode connected to the first node and a control electrode connected to the second node. The resistive element connected between the second and third nodes.

Abstract: A circuit for switching the well in a CMOS circuit to one of two power supply rails. In, for example, an N-well CMOS process, when an output is driven by a PMOS pull-up transistor, the P+ (drain of the PMOS) to N-well junction may be forward biased if the rail drops to ground. This will cause the output to be pulled to ground. The switching circuit of the present invention avoids the grounding of the output by automatically switching the N-well to the higher power supply rail so that grounding the rail would not cause the output to fall. MOS switches connect the well to either of the power supplies. Therefore, there is no voltage drop from the power supply to the well as in the case of switching circuits using diodes. Also, this circuit connects the well to the highest power supply regardless of which power supply drops to ground. Therefore, it does not require one power supply to be always on for proper operation.