Abstract: A driver circuit is provided for enabling a transistor collector-emitter path to be used as a broadband periodic switch. The broadband driver circuit controls the magnitude of the transistor base-emitter current in order to enable a CLOSED switch state and to simultaneously control the magnitude of the transistor base-emitter reverse-bias voltage in order to enable the OPEN-switch state. The precise control of these parameters minimizes base-charge storage and prevents reverse-breakdown failure.

Abstract: A component with a functionally-configurable circuit arrangement, has a first switch group with a voltage-dependent switching on or off of a data line and at least one second switch group generating two discrete output voltages separated by an increase in voltage and the switch states for the discrete output voltages may be stored in non-volatile memory. The switching on or off of the data line is determined by the switch state of the first switch group and a third switch group (11) is provided to increase the voltage increase between the first switch group (17) and the second switch group (3).

Abstract: A gate drive for an insulated gate bipolar transistor (IGBT) includes a control and protection module coupled to a collector terminal of the IGBT, an optical communications module coupled to the control and protection module, a power supply module coupled to the control and protection module and an output power stage module with inputs coupled to the power supply module and the control and protection module, and outputs coupled to a gate terminal and an emitter terminal of the IGBT. The optical communications module is configured to send control signals to the control and protection module. The power supply module is configured to distribute inputted power to the control and protection module. The control and protection module outputs on/off, soft turn-off and/or soft turn-on signals to the output power stage module, which, in turn, supplies a current based on the signal(s) from the control and protection module for charging or discharging an input capacitance of the IGBT.

Abstract: One embodiment of the invention includes a current mirror system. The system comprises a master circuit configured to conduct a first current in response to an activation state of an activation signal. The system also comprises a slave circuit configured to generate at least one second additional current in response to the activation state of the activation signal. Each of the at least one additional current can be proportional to the first current. The system further comprises a current path circuit that is configured as a substantial copy of the master circuit, the current path circuit being configured to conduct the first current in response to a deactivation state of the activation signal.

Abstract: An electronic device includes a power interface for transmitting power, an integrated circuit capable of resetting, and a switch circuit. The switch circuit is connected to the power interface for transmitting the power to the integrated circuit after the integrated circuit is reset and stop transmitting the power to the integrated circuit if the integrated circuit is resetting.

Abstract: In an engine ignition system, an igniter for an ignition coil is connected to an ECU through a signal wire. The signal wire is grounded via the collector and the emitter of a bipolar transistor of an output circuit of the igniter. A constant current source outputs a current to the base of the bipolar transistor. Switching transistors are connected between the emitter and base of the bipolar transistor. When all the switching transistors are turned off, the bipolar transistor is turned on.

Abstract: A circuit includes an amplifier having an input and an output; and at least one transistor comprising at least one terminal and at least one isolated well. The input of the amplifier is electrically connected to the at least one terminal of the transistor; and the output of the amplifier is electrically connected to the at least one isolated well of the at least one transistor.

Abstract: A circuit comprising a voltage-controlled transistor (T4), comprising a first (+) and a second (?) supply potential (+,?); a first (Ti) and a second transistor (T2); and an impedance (R4). A series circuit (R4, Ti) is formed by a switching path of the first transistor (T1) and the impedance (R4) is coupled between the first supply potential (+) and a control input of the voltage-controlled transistor (T4). The impedance (R4) is connected in a manner facing the first supply potential (+). The first supply potential (+) is coupled to a control input of the first transistor (T1) via to a switching path of the second transistor (T2). A control input of the second transistor (T2) is coupled to a connecting node (Vi) between the impedance (R4) and the switching path of the first transistor (T1) in such a way that a potential change at the connecting node (VI) can switch the second transistor (T2).

Abstract: A circuit arrangement in which the temperature dependency of the short-circuit current and/or the influence of the output signal by the load current are at least partially avoided has first and second input connections, first and second output connections, a supply voltage connection as well as with a voltage-controlled voltage source, an output stage and a short-circuit protective circuit, whereby the output signal from an input voltage applied to input connections is generated via voltage-controlled voltage source and output stage. The circuit arrangement is characterized in that a voltage sequencing circuit and a shunting resistor connected in parallel to voltage sequencing circuit are part of the short-circuit protective circuit and in that a parallel circuit formed of the voltage sequencing circuit and a shunting resistor is connected to the second output connection and second input connection.

Abstract: Semiconductor devices and methods are disclosed wherein a switching element or a current path is coupled to a substrate, and wherein a further element is coupled to said substrate and a control input of said switching element or said current path. Accordingly, in at least one embodiment, a semiconductor device comprises a substrate and a switching element with a control input coupled to the substrate. The semiconductor device includes a compensation element having a control input and an output. The control input of the compensation element is coupled to the substrate and the output of the compensation element is coupled to the control input of the switching element.

Abstract: In an engine ignition system, an igniter for an ignition coil is connected to an ECU through a signal wire. The signal wire is grounded via the collector and the emitter of a bipolar transistor of an output circuit of the igniter. A constant current source outputs a current to the base of the bipolar transistor. Switching transistors are connected between the emitter and base of the bipolar transistor. When all the switching transistors are turned off, the bipolar transistor is turned on.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit 210 which includes a voltage doubler wave-detector circuit 10 configured including a sensing diode Q1 (Tr34) for sensing the RF power, a differential amplifier including differential pair transistors Tr31 and Tr32, and a current mirror circuit. A base current of one Tr31 of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q1 (Tr34). A total of currents flowing through the differential pair transistors Tr31 and Tr32 is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Abstract: A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.

Abstract: A method and apparatus for compensating a base current of a bipolar junction transistor by replicating operating conditions of the BJT in a compensating circuit. An output current of the compensating circuit is fractionally related to the base current and thus can be supplied to an operational circuit comprising the BJT to compensate the base current. In a preferred embodiment, the BJT is operated between BVCEO and BVCBO and the base current to be compensated flows from the BJT.

Abstract: When a current mirror circuit is composed of transistors that inevitably form a parasitic photodiode between an epitaxial layer and a substrate layer because of structure of an integrated circuit, a photocurrent increases in proportional to an area of the epitaxial layer. Thus, the area of the epitaxial layer is adjusted in accordance with a current ratio of the current mirror, so as to allow the photocurrent to affect equally on both input and output sides of the current mirror circuit, i.e., so as to cancel the photocurrent. With this, in a current mirror circuit provided in an integrated circuit, it is possible to eliminate the influence of the photocurrent, without considerably increasing an element area or taking special measures to shield light.

Abstract: A driving circuit is provided for a control terminal of a bipolar transistor in an emitter-switching configuration. The emitter-switching configuration is between first and second voltage references. The driving circuit includes at least one first resistive element connected to the control terminal of the bipolar transistor and a first capacitor connected to the resistive element with respect to a first circuit node and to the second voltage reference. The driving circuit further includes a Zener diode connected between the first circuit node and a second circuit node, and a second capacitor between the second circuit node and the second voltage reference.

Abstract: A driving circuit is provided for a control terminal of a bipolar transistor in an emitter-switching configuration. The emitter-switching configuration is between a resonant load and a voltage reference. The driving circuit includes at least one capacitor between the control terminal of the bipolar transistor and the voltage reference. The driving circuit further includes an additional resonance capacitor between a collector terminal of the bipolar transistor and a circuit node, a first diode between the circuit node and the control terminal, and a second diode between the circuit node and the voltage reference.

Abstract: A bipolar differential input stage with an input bias current cancellation circuit comprises an input pair and a bipolar tracking transistor. The input stage is arranged such that the collector currents in the input pair and tracking transistor, and the collector-emitter voltages of the input pair and tracking transistor, are substantially equal. A lateral PNP transistor's first collector provides the tracking transistor base current required to achieve the substantially equal collector current, and second and third collectors provide copies of the tracking transistor base current as bias current cancellation currents to the bases of the input pair, thereby reducing the input stages' input bias currents.

Abstract: An input stage circuit for an LVDS circuit. The input stage has a folded cascode that receives input signals. The folded cascode has a first input circuit and a second input circuit. The first input circuit receives a first input signal from a connected circuit and the second input circuit receives a second signal from the connected circuit. A first current mirror receives signals from the first input circuit of said folded cascode. A second current mirror receives signals from the second input circuit. The first current mirror and the second current mirror are connected to a common output to merge signals from the first and second input circuits. A diode adjusts a voltage level of the signals to an output voltage.

Abstract: A circuit arrangement for a resistor of high linearity that can be produced in integrated technology and be controlled by the current (Io1, Io2), which circuit arrangement is constructed from two pairs of transistors comprising transistors (T1 . . . T4) of the same junction type connected as diodes. Each pair of transistors (T1, T2 and T3, T4) has a common point of connection (D, E) that connects together the anodes of one pair of diodes and the cathodes of the other pair. The point of connection (D) of the first pair of transistors (T1, T2) is situated on their collector lines and thus connects the anodes and forms the infeed point for a first control current source (Io1). The point of connection (E) of the second pair of transistors connects the cathodes and is thus situated on their emitter lines and forms the infeed point for a second control current source (Io2).

Abstract: A driving circuit is provided for a control terminal of a bipolar transistor in an emitter-switching configuration. The emitter-switching configuration is between a resonant load and a voltage reference. The driving circuit includes at least one capacitor between the control terminal of the bipolar transistor and the voltage reference. The driving circuit further includes an additional resonance capacitor between a collector terminal of the bipolar transistor and a circuit node, a first diode between the circuit node and the control terminal, and a second diode between the circuit node and the voltage reference.

Abstract: A driving circuit is provided for a control terminal of a bipolar transistor in an emitter-switching configuration. The emitter-switching configuration is between first and second voltage references. The driving circuit includes at least one first resistive element connected to the control terminal of the bipolar transistor and a first capacitor connected to the resistive element with respect to a first circuit node and to the second voltage reference. The driving circuit further includes a Zener diode connected between the first circuit node and a second circuit node, and a second capacitor between the second circuit node and the second voltage reference.

Abstract: A very small current generating circuit stabilizes a very small current flowing in a CR oscillation circuit and load driving circuit with an over-current protection function wherein, for example, a discharge time period is determined on the basis of the very small current. The very small current generating circuit includes: a first current route wherein between the internal reference voltage terminal and ground, a resistor is connected in series with an npn transistor; a second current route wherein between the external voltage source and ground, another pnp transistor, another resistor, another npn transistor and still another resistor are connected in series in this order; and a third current route wherein between the external voltage source and ground, and another resistor is connected in series with another pnp transistor. The very small current in the first current route is stabilized by the second and third current routes.

Abstract: An audio signal switch has a plurality of inputs and an output. Each input is arranged to be selectively connected to the output via a respective transmission chain, each transmission chain includes: a first bipolar transistor, of a first type, connected to the input; a second bipolar transistor, of a second type, complementary to said first configuration, connected to the output; and an intermediate bipolar transistor, of the second type, connected between said first and second transistors. The first and second transistors are arranged in an emitter-follower circuit configuration, and the intermediate transistor is arranged to act as a diode to protect the first transistor from a large reverse voltage applied to its base-emitter junction.

Abstract: A driving circuit for a light emitting device keeping its excellent eye pattern by improving an extinction ratio and reducing power consumption, can be provided by arranging the following way. The driving circuit has a driving unit having a frequency response curve indicating opposite property to a frequency response curve of the light emitting device. The driving unit comprises a power outputting type amplifier constituted by a transistor having a gain curve increasing with a predetermined gradient starting from a cut-off frequency of the light emitting device. The amplifier comprises a frequency generating unit constituted by a capacitor and a resistance for generating a desired frequency, a current multiplier unit constituted by a current mirror circuit comprising 7 transistors and a discharge circuit for applying a reverse current, which is distributed from the current multiplier circuit, to the light emitting device.

Abstract: A power conversion apparatus has a circuit configuration in which a collector voltage of an IGBT is divided. It also has a unit which protects the IGBT against overvoltages applied to the collector by outputting a potential of a voltage dividing point to a gate of the IGBT. A case of a resistor on the high-voltage side of the voltage dividing point is fixed to an emitter potential of the IGBT.

Abstract: A power conversion apparatus has a circuit configuration in which a collector voltage of an IGBT is divided. It also has a unit which protects the IGBT against overvoltages applied to the collector by outputting a potential of a voltage dividing point to a gate of the IGBT. A case of a resistor on the high-voltage side of the voltage dividing point is fixed to an emitter potential of the IGBT.

Abstract: The present invention relates to a self-locking circuit arrangement having an input voltage connection for applying an input voltage (UE), an output voltage connection for providing an output voltage (UA), a supply voltage connection for connecting a supply voltage (UV), a first switching element (T1) having a first and a second output connection and a control connection, a second switching element (T2) having a first and a second output connection and a control connection, where the first output connection of the first switching element (T1) is connected to the output voltage connection, the second output connection of the first switching element (T1) is connected to a reference-ground potential, the first output connection of the second switching element (T2) and also the control connection of the first switching element (T1) are connected to the input voltage connection, the second output connection of the second switching element (T2) is connected to the reference-ground potential, and the control connect

Abstract: A monitoring circuit interfacing an open collector output circuit with a voltage offset, wherein the voltage offset exhibited between the monitoring circuit and the open collector output circuit prevents direct interfacing with a digital input of an adjacent digital circuit. The monitoring circuit of the present invention includes, a first bipolar junction transistor (BJT) connected to an open collector output circuit having a first ground. The first bipolar junction has a second ground that is different from the first ground. The first and second ground creates an appreciable voltage offset therebetween when the first BJT interfaces with the open collector output circuit. The monitoring circuit also includes a second BJT connected to the first BJT in a loop configuration so that at least one of the first and second BJTs increases base current drive to its respective BJT. The monitoring circuit of the present invention therefore maximizes a turn-on rate of its adjacent digital circuit.

Abstract: Current mirror circuits that are parts of a first circuit and a second circuit, respectively, allow the same constant current to flow through the input side and the output side. Therefore, the base-emitter voltages of transistors Tr1 and Tr4, which tend to vary due to a temperature variation, can be set identical and hence can cancel out each other sufficiently. The same is true of the base-emitter voltages of transistors Tr5 and Tr8. Therefore, an input signal can be converted by a function having reference voltages as change points without being affected by temperature. Desired function circuits can be obtained by combining first circuits and second circuits in various manners.

Abstract: The present invention provides a power supply unit (regulator circuit) capable of preventing thermal breakdown of a driven transistor that may be caused accidentally in case the collector output of the transistor is grounded. A power supply unit (10) for supplying a driving current to a base of a transistor (20) to thereby drive the same has a lower threshold comparator (14) which compares an actual collector output Vin of the transistor (20) with a lower threshold of 0.5 Vref, and sends a stop signal to a current controller (18) if the collector output Vin is less than the lower threshold of 0.5 Vref. Thus, when the collector output of the transistor (20) is grounded directly without via a load circuit (40), the collector output Vin is rendered under the lower threshold of 0.5 Vref, so that the current controller (18) receives the stop signal from the lower threshold comparator (14) and then stops the supply of the driving current to the transistor (20).

Abstract: A light emitting element driver composed of two transistors, one ground resistor, one inductance and a single capacitor is arranged to drive an LED with a supplied voltage as low as about 0.92 V. The transistors include an NPN transistor and a PNP transistor, the base of the PNP transistor being connected to the ground resistor and the base of the NPN transistor being connected to the collector of the PNP transistor, with the capacitor being connected between the base of the PNP transistor and the node connecting the collector of the NPN transistor to the inductance and to the LED.

Abstract: A high-frequency integrated transistor module includes a bipolar transistor having at least one emitter finger, which is internally connected in series with a resistor to provide a DC current path for the circuit, and is internally connected in series with a capacitor to provide an RF current path for the module separate from the DC current path. The capacitor may be coupled to an RF ground connection, and the value of the capacitor may be selected to resonate with the value of the RF ground connection inductance in order to provide gain enhancement at a selected operating frequency range. In order to provide gain enhancement over a broader frequency bandwidth, two or more emitter fingers can be connected in series with respective capacitors of different values in order to provide at least two RF current paths having different resonant frequencies.

Abstract: A switching element having two signal inputs and two signal outputs, in which switching element a first and second transistor are provided, the base terminals of which are connected to one another and are connected to a drive unit. The collector terminals of the first and second transistor form the two signal outputs and the emitter terminals of the first and second transistor form the two signal inputs to which a current source can be connected in each case. The switching element provides for implementation of a switching system with low power loss.

Abstract: The present invention relates to an integrated circuit bidirectional switch formed from bipolar transistor devices, in which the saturation voltage is sought to be reduced. More specifically, an integrated NPN bipolar transistor is formed with oxide insulation, and the normal direction of current flow is from the emitter to collector, and an integrated PNP bipolar transistor is formed with oxide insulation, and the normal direction of current flow is from the collector to emitter.

Abstract: This invention relates to a circuit structure of the feedforward type with programmable zeroes, particularly for synthesizing time-continual filters. This structure comprises a pair of amplification cells interconnected at least one interconnection node and connected between a first signal input of a first cell and an output terminal of the second cell, each cell comprising a pair of transistors which have a conduction terminal in common and have the other conduction terminals coupled respectively to a first voltage reference through respective bias members. The structure further comprises a circuit leg connecting a node of the first cell to the output terminal and comprising a transistor which has a control terminal connected to the node of the first cell, a first conduction terminal connected to the output terminal, and a second conduction terminal coupled to a second voltage reference through a capacitor.

Abstract: A circuit configuration for driving a semiconductor switching element includes an output terminal for the connection of a semiconductor switching element, a capacitive charge storage configuration, which is coupled to the output terminal, a charging and discharging circuit having at least one input for feeding in at least one drive signal and an output connected to the capacitive charge storage configuration, and a discharging circuit with a connecting terminal. The connecting terminal is connected to the capacitive charge storage configuration and provides a discharging current for the charge storage configuration. A charging current or a discharging current for the capacitive charge storage configuration is available at the output depending on the drive signal. A method for driving the semiconductor switching element is also provided.

Abstract: A differential input stage with full-rail sensing and reduced latch-up susceptibility includes an emitter-coupled pair, a current mirror, and several series resistors. For a NPN emitter-coupled pair, a series resistor is connected between the input node and the base of each transistor of the emitter-coupled pair, and a series resistor is connected between each load resistor and its corresponding current mirror transistor. The series resistors reduce current flowing into the PN junctions when power to the overall circuit is disabled but an input signal is present at the input terminals.

Abstract: An input buffer circuit includes a first amplifier having low load impedance and a second amplifier having high load impedance. The output signals of the input buffer circuit have wide bandwidth, although the input buffer circuit has two stage amplifiers. In addition, the bandwidth can be controlled by resistors as an equivalent active inductance of the input buffer circuit. Further, the input buffer circuit can reduce the power consumption compared with conventional input buffer circuits, since the input buffer circuit according to the present invention uses a first switching current of the first amplifier as well as a second switching current of the second amplifier to load output signals.

Abstract: In an SRPP circuit, a transistor Q11 has a collector connected to a power supply terminal T13 through a resistor R11 and an emitter connected to the collector of a transistor Q12 having the same polarity as that of transistor Q11. The emitter of the transistor Q12 is connected to the ground. The collector of the transistor Q11 is connected to the emitter of a transistor Q13 having the polarity opposite to that of the transistor Q11, and the collector of the transistor Q13 is connected to the base of the transistor Q12. A bias voltage V13 is applied to the base of the transistor Q13. An input signal Vin is supplied to the base of the transistor Q11 to extract an output signal from a node between the emitter of the transistor Q11 and the collector of the transistor Q12.

Abstract: An electronic circuit arrangement has a receiving component that detects an incoming physical signal, and supplies an electrical signal current in response thereto, as well as a control and analysis component which is fed by a supply voltage and is acted upon by the electrical signal current. The electronic circuit arrangement can be operated in a working state, in which a power is consumed, and in a rest state, in which no power is consumed. A quiescent current detector is connected in parallel to the receiving component and the control and analysis component. In the rest state of the circuit arrangement (when the supply voltage is switched off), the quiescent current detector detects the signal current supplied by the receiving component, and controls switching-on of the circuit arrangement into the operative state in response thereto.

Abstract: For use in a regulator, a driver (200) has a first transistor pair (203, 204) for alternatively pulling a drive line (OUT, 196) to magnitudes in a limited magnitude range between first and second reference lines (191, 192) depending on an input signal (IN, 195). Parallel to the first pair (203, 204), a second transistor pair (212, 210) alternatively pulls the drive line (OUT, 196) substantially to the reference lines (191, 192). The second pair (212, 210) is controlled by a comparator arrangement (120, 130) comparing the input signal to first (REF—1) and second (REF—2) reference signals and activating the second pair (212, 210) substantially only when the signal (OUT) on the drive line (196) driven by the first pair reaches a magnitude limit. The transistors (203, 204) of the first pair are arranged as emitter followers and the transistors (212, 210) of the second pair are arranged as switched current sources.

Abstract: A biasing method and apparatus which provides bias circuits of radio frequency (RF) power transistors with a low reactive impedance at low frequencies to reduce hysteresis related distortion without affecting the transistor input or output impedance or any impedance matching network which may be used. In one embodiment, reduced hysteresis within a lateral diffused metal-oxide semiconductor (LDMOS) transistor is brought about by a drain bias circuit without any impact on the transistor output impedance. By removing the effect of the bias circuit at RF frequencies, the bias circuit can be designed with a low reactive impedance at low frequencies without any material consequences on the transistor output impedance. With a low enough reactive impedance, the hysteresis introduced by the bias circuit is substantially reduced. An auxiliary bias feed external to an RF transistor package is also embodied.

Abstract: A circuit configuration is provided for stabilizing an operating point of a first transistor having a base, a collector and an emitter connected to a first power supply. A second transistor has a base, a collector coupled to the base of the first transistor and an emitter coupled to the collector of the first transistor. A first resistor is connected to a second electrical energy supply and is also connected to both the collector of the first transistor and the emitter of the second transistor. A current limiting element is connected to the base of the second transistor and the first power supply. A third transistor has a base, an emitter connected to the second power supply and a collector connected to the base of the second transistor. A second resistor is connected to a reference potential and to the base of the third transistor. A third resistor is connected to the base and the collector of the third transistor.

Abstract: The present invention relates to a self-locking circuit arrangement having an input voltage connection for applying an input voltage (UE), an output voltage connection for providing an output voltage (UA), a supply voltage connection for connecting a supply voltage (UV), a first switching element (T1) having a first and a second output connection and a control connection, a second switching element (T2) having a first and a second output connection and a control connection, where the first output connection of the first switching element (T1) is connected to the output voltage connection, the second output connection of the first switching element (T1) is connected to a reference-ground potential, the first output connection of the second switching element (T2) and also the control connection of the first switching element (T1) are connected to the input voltage connection, the second output connection of the second switching element (T2) is connected to the reference-ground potential, and the control connect

Abstract: A pseudo bipolar junction transistor according to the invention includes two MOS transistors operating in saturation region, electrically connected in parallel with their drains and sources functioning as a collector and a emitter of the pseudo bipolar junction transistor, respectively, a first gate without any signal inputted and a second gate functioning as a base of the pseudo bipolar junction transistor, wherein the two gates is supplied with the same DC bias. The pseudo bipolar junction transistor is manufactured by CMOS process for applications in variable gain amplifiers, transfer linear function signal processors and logarithmic filters.

Abstract: A driving circuit and a charging pump booster circuit capable of reducing the power consumption and the noise generated during switching. Transistors Q1 and Q2 are controlled based on a control signal input into an input terminal Tin, and a charge/discharge current is output to an output terminal Tout. The base of a transistor Q5, having almost the same characteristics as those of the transistor Q1, is connected to the base of the transistor Q1 in order to have the transistor Q5 generate a current corresponding to the turning on/off of the transistor Q1, and the current from said transistor Q5 is reflected toward a resistance element R1 by means of a current mirror circuit comprising transistors Q6 and Q7, so that base voltage of the transistor Q2 can be set lower while the transistor Q1 is on in order to hold the transistor Q2 to the OFF status. As a result, leak-through current in the transistors Q1 and Q2 can be reduced and switching noises created by said leak-through current can be reduced.

Abstract: A semiconductor integrated circuit device comprises a multiple-stage amplifier including a plurality of transistors. The multiple-stage amplifier has a first stage comprising a plurality of bipolar transistors each having a single emitter structure. The bipolar transistors are connected parallel to each other. The semiconductor integrated circuit device can easily be designed, is of a self-aligned structure, and has a single transistor size. The semiconductor integrated circuit device may be used as a low-noise, high-power-gain high-frequency amplifier.

Abstract: In order to provide a highly accurate and reliable temperature sensing circuit and method, a resistor (10a) having a positive temperature coefficient is connected between the gate terminal (4) and the insulated gate electrode (8a) of the voltage drive type semiconductor device (1a), and the temperature is sensed based on a voltage representing a voltage drop across the resistor in a circuit portion between the gate terminal (4) and the other terminal (5).