Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

Abstract: A charge pump device includes a charge pump circuit, for generating an output voltage according to a driving signal, a comparing circuit, for generating a comparison result according to the output voltage and a reference voltage, a detecting circuit, for detecting a frequency range of a ripple of the output voltage according to the comparison result and generating a detection result, and a driving stage, for generating the driving signal according to the comparison result, and adjusting a driving capability corresponding to the driving signal according to the detection result.

Abstract: A Radio Frequency Identification (RFID) tag integrated circuit (IC) includes a power rectifier component. The rectifier component includes a first current path formed by a first rectifying element, a second rectifying element, and a pump node coupled to the first and second rectifying elements. The first and second rectifying elements are coupled to a first phase of a radio frequency (RF) waveform while the pump node is coupled to a second phase of the RF waveform. The rectifier component also includes at least one biasing element coupled to the pump node and configured such that its terminal voltages vary with phases and amplitudes similar to that of the second phase of the RF waveform.

Abstract: Embodiments are provided that include a circuit for generating voltage in a memory. One such circuit includes a charge pump circuit including a first transistor, a high-voltage switch circuit, and a cut-off switch circuit arranged to reduce leakage current from the charge pump circuit. The cut-off switch circuit includes a second transistor, wherein an output of the charge pump circuit is coupled to one of a source node and a drain node of the second transistor, and a first control signal is input at a gate of the second transistor. Further embodiments provide a method for generating voltage. One such method includes enabling a first transistor coupled to an output of a charge pump circuit when the charge pump is operating and disabling the first transistor coupled to the output of the charge pump circuit when the charge pump circuit is not operating.

Abstract: Techniques are presented for improving the efficiency of charge pumps. A charge pump, or a stage of a charge pump, provides its output through a pass gate. For example, this could be a charge pump of a voltage doubler type, where the output is supplied through pass gate transistors whose gates are connected to receive the output of an auxiliary section, also of a voltage doubler type of design. The waveforms provided to the gates of the pass gate transistors are modified so that their low values are offset to a higher value to take into account the threshold voltage of the pass gate transistors. In a voltage doubler based example, this can be implemented by way of introducing diodes into each leg of the auxiliary section.

Abstract: An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal.

Abstract: A hybrid charge pump including a hybrid circuit configured to snub an over shoot or under shoot present in an input pulse in a snubbing operation if a level of the pulse is a first level, store the pulse in a charging operation if the level of the pulse is a second level different from the first level, and generate a negative voltage from the stored pulse in a negative voltage generation operation.

Abstract: A half-ratio charge pump circuit includes a flying capacitor electrically coupled between a first node and a second node. Eight switches are controlled to carry out first to fourth operating phases during which charges are stored on and transferred from the flying capacitor, thereby generating a positive output voltage at approximately half the positive input voltage, and generating a negative output voltage at approximately half the negative input voltage.

Abstract: Operation of a charge pump is controlled to optimize power conversion efficiency by using an adiabatic mode with some operating characteristics and a non-adiabatic mode with other characteristics. The control is implemented by controlling a configurable circuit at the output of the charge pump.

Abstract: Cycle timing of a charge pump is adapted according to monitoring of operating characteristics of a charge pump and/or peripheral elements coupled to the charge pump. In some examples, this adaptation provides maximum or near maximum cycle times while avoiding violation of predefine constraints (e.g., operating limits) in the charge pump and/or peripheral elements.

Abstract: Embodiments of a linear voltage regulator are described. In one embodiment, the linear voltage regulator includes a PMOS low drop-out (LDO) regulator configured to convert an input voltage to a regulated voltage, a charge pump connected to the PMOS LDO regulator and configured to amplify the regulated voltage into an amplified voltage, and an NMOS LDO regulator connected to the charge pump and configured to convert the amplified voltage into an output voltage. Other embodiments are also described.

Abstract: A system for providing a load current at a specific output voltage to a circuit block of an integrated circuit (IC) includes a supply node at a supply voltage, a charge pump, and a cross-coupling circuit. The charge pump includes a first a first capacitor to charge while a first clock signal is high and a second capacitor to charge while a second clock signal is high. Each of the capacitors has a top plate node, a bottom plate node, a ground node, and an intermediate node between the bottom plate node and the ground node. The cross-coupling circuit couples the intermediate node of the first capacitor to the supply node while the second clock signal is high and couples the intermediate node of the second capacitor to the supply node while the first clock signal is high.

Abstract: A half-ratio charge pump circuit includes a flying capacitor electrically coupled between a first node and a second node. Eight switches are controlled to carry out first to fourth operating phases during which charges are stored on and transferred from the flying capacitor, thereby generating a positive output voltage at approximately half the positive input voltage, and generating a negative output voltage at approximately half the negative input voltage.

Abstract: One object is to provide a boosting circuit whose boosting efficiency is enhanced. Another object is to provide an RFID tag including a boosting circuit whose boosting efficiency is enhanced. A node corresponding to an output terminal of a unit boosting circuit or a gate electrode of a transistor connected to the node is boosted by bootstrap operation, so that a decrease in potential which corresponds to substantially the same as the threshold potential of the transistor can be prevented and a decrease in output potential of the unit boosting circuit can be prevented.

Abstract: A charge pump circuit using a voltage doubler-type of circuitry for generating an output voltage is described. An output generating stage uses a voltage double structure, except that the transistors in each leg are not cross-coupled to the other leg, but instead are controlled by an auxiliary section. The auxiliary section has a voltage doubler structure, but is not used to drive the load, but instead provides the gate voltage for the precharge section using the same levels as used for the corresponding transistors in the auxiliary section. This arrangement can be particularly advantageous for applications using low supply voltages to address self-loading effect due to loading. As the auxiliary section does not drive the load, its elements can be sized smaller. Additional improvement can be obtained by using separate clock drivers for the auxiliary section to address secondary self-loading effect due to loading.

Abstract: Some embodiments relate to charge pump regulators to selectively activate a charge pump based not only on the voltage output of the charge pump, but also on a series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations.

Abstract: A system for providing a load current at a specific output voltage to a circuit block of an integrated circuit (IC) includes a supply node at a supply voltage, a charge pump, and a cross-coupling circuit. The charge pump includes a first a first capacitor to charge while a first clock signal is high and a second capacitor to charge while a second clock signal is high. Each of the capacitors has a top plate node, a bottom plate node, a ground node, and an intermediate node between the bottom plate node and the ground node. The cross-coupling circuit couples the intermediate node of the first capacitor to the supply node while the second clock signal is high and couples the intermediate node of the second capacitor to the supply node while the first clock signal is high.

Abstract: An internal voltage generator includes an internal voltage control unit suitable for generate an enable signal based on a voltage level of an internal voltage, a clock control unit suitable for generate a control clock having a restricted toggling period based on the enable signal and a clock while controlling the toggling number of the control clock, and an internal voltage generation unit suitable for generate the internal voltage based on the control clock.

Abstract: A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor.

Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

Abstract: A device may be associated with a power source. The device may include a charge pump configured to output a pulse-width modulated voltage based upon an input voltage from the power source, with the pulse-width modulated voltage varying between a first voltage and a second voltage. The device may also include a low-pass filter comprising an output capacitor, with the output capacitor being configured to average the pulsed-width modulated voltage and to output a filtered voltage having a value different than that of the input voltage. The device may further include a controller configured to selectively decouple the charge pump from the power source when a load imposed on the low-pass filter is below a threshold load.

Abstract: A system for providing a load current at a specific voltage to a circuit block of an integrated circuit (IC) includes a plurality of charge pumps and a control circuit to generate a control signal for each of the charge pumps. The control signal causes each of the charge pumps to be enabled, partially enabled, or disabled, and controls at least one of the charge pumps independently of the other charge pumps.

Abstract: A voltage generating circuit includes first and second step-up circuits, each having first and second input terminals and an output terminal and configured to increase a voltage level of an input signal supplied through the first input terminal and output the signal with the increased voltage level through the output terminal. The second input terminal of the first step-up circuit is connected to the output terminal of the second step-up circuit and the second input terminal of the second step-up circuit is connected to the output terminal of the first step-up circuit. The voltage generating circuit may also include third and fourth step-up circuits and fifth and sixth step-up circuits having similar configurations.

Abstract: A negative voltage pumping unit including a driver configured to receive an external high-voltage and an external voltage and drive and output an oscillator signal, and a capacitor configured to perform a pumping operation and generate a negative voltage; and an internal circuit configured to receive a ground voltage and the voltage of a node.

Abstract: The present invention relates to a regulation circuit for a charge pump and to a method of regulating a charge pump. The regulation circuit comprises a detector operable to analyze a temporal activity of the charge pump, and a pump clock generator coupled to an output of the detector and having an output coupled to a clock input of the charge pump to vary a pump clock frequency of the charge pump in dependence of the analysis of the detector, or a supply or voltage generator coupled to an output of the detector and having an output coupled to the charge pump to vary an amplitude of a clock signal within the charge pump in dependence of the analysis of the detector.

Abstract: Efficiency of a charge pump circuit is increased. The charge pump circuit includes serially connected fundamental circuits each including a diode-connected transistor and a capacitor. At least one transistor is provided with a back gate, and the back gate is connected to any node in the charge pump circuit. For example, the charge pump circuit is of a step-up type; in which case, if the transistor is an n-channel transistor, a back gate of the transistor in the last stage is connected to an output node of the charge pump circuit. Back gates of the transistors in the other stages are connected to an input node of the charge pump circuit. In this way, the voltage holding capability of the fundamental circuit in the last stage is increased, and the conversion efficiency can be increased because an increase in the threshold of the transistors in the other stages is prevented.

Abstract: A multi level charge pump circuit may be associated with at least two power supplies, and may provide at least four levels of positive and negative voltage. The multi level charge pump may include first and second fly capacitors, and first and second tank capacitors. A plurality of PMOS transistors and NMOS transistors may allow generation of two high voltage levels and two low voltage levels for the multi level charge pump, the low voltage levels being derived from a charging of the two fly capacitors in series. This multi level charge pump may be embodied in an audio device within a platform without a dedicated SMPS circuit.

Abstract: A method for operating a charge pump that supplies switching current for a plurality of transistors includes a capacitor generating a pumped voltage. A comparator generates a pump control signal for turning on and off charging of the pump capacitor based on a difference between a comparison voltage and a reference voltage. A direct voltage sensor receives a feedback signal reflecting the pumped voltage and generates the comparison voltage in response to the feedback signal. The sensor includes a sensor resistor, a current source configured to drive a sensor current through the sensor resistor, and a differential op-amp that drives the sensor current to cause the voltage drop across the sensor resistor to remain constant as the pumped voltage experiences the voltage drop. The charge pump may include two similar direct voltage sensor controlling positive and negative pumped voltages.

Abstract: A boosting circuit, includes an output circuit including a first transmission circuit, transmitting charges of a first boosting node to a first output node according to a first transmission control signal, a detection circuit, detecting the voltage level of the first output node, and a pre-charge circuit pre-charging the first boosting node according a detection signal of the detection circuit; a first pump circuit includes a second transmission circuit, transmitting charges to a second output node according to a second transmission control signal, and a first capacitance unit, coupled to the first boosting node, boosting the voltage level of the first boosting node according to charges transmitted in the second output node; and a control circuit, coupled to the output circuit and the first pump circuit, controls the second transmission control signal according to the voltage level of the first output node.

Abstract: The present disclosure relates to a charge pump circuit having one or more voltage multiplier circuits that enable generation of an output signal having a higher output voltage. In one embodiment, the charge pump circuit comprises a NMOS transistor having a drain connected to a supply voltage and a source connected to a chain of diode connected NMOS transistors coupled in series. A first voltage multiplier circuit is configured to generate a first two-phase output signal having a maximum voltage value that is twice the supply voltage. The first two-phase output signal is applied to the gate of the NMOS transistor, forming a conductive channel between the drain and the source, thereby allowing the supply voltage to pass through the NMOS transistor without a threshold voltage drop. Therefore, degradation of the charge pump output voltage due to voltage drops of the NMOS transistor is reduced, resulting in larger output voltages.

Abstract: Some embodiments include apparatuses and methods having an input node to receive a first voltage, an output node to provide an output voltage, and a charge pump to generate the output voltage based on the first voltage. The charge pump can include a control node to receive a control signal for controlling at least one switch of the charge pump, such that the output voltage includes a value greater than a value of the first voltage. The control signal can include a level corresponding to a second voltage having a value greater than the value of the output voltage. Additional apparatus and methods are described.

Abstract: A negative voltage pumping unit including a driver configured to receive an external high-voltage and an external voltage and drive and output an oscillator signal, and a capacitor configured to perform a pumping operation and generate a negative voltage; and an internal circuit configured to receive a ground voltage and the voltage of a node.

Abstract: A charge pump includes: a first diode that is connected to a first node; a second diode that is connected to a second node; a pump capacitor that is connected to a third node to which the first diode and the second diode are connected; a power supply capacitor that is connected to the pump capacitor; a third diode that is connected between the pump capacitor and the power supply capacitor; and a zener diode that is connected in parallel to the third diode and the power supply capacitor. A power supply device decreases a ripple of an output current using a ripple reduction signal.

Abstract: To reduce a variation in the electrical characteristics of a transistor. A potential generated by a voltage converter circuit is applied to a back gate of a transistor included in a voltage conversion block. Since the back gate of the transistor is not in a floating state, a current flowing through the back channel can be controlled so as to reduce a variation in the electrical characteristics of the transistor. Further, a transistor with low off-state current is used as the transistor included in the voltage conversion block, whereby storage of the output potential is controlled.

Abstract: DC to DC converter circuitry includes a dual phase charge pump and at least one pair of multiplier phase circuits. The dual phase charge pump is coupled to each one of the at least one pair of multiplier circuits and adapted to receive a DC input voltage and only four control signals, and produce a stepped-up output voltage. Each one of the at least one pair of multiplier phase circuits are adapted to receive the stepped-up output voltage, a cross-coupled control signal from the other multiplier phase circuit in the pair of multiplier phase circuits, and a different one of the control signals and further multiply the stepped-up output voltage to produce a multiplied stepped-up output voltage with a magnitude that is approximately three times that of the DC input voltage or greater.

Abstract: A charge pumping device includes unit cells. Each unit cell includes first and second cells, each including a charge transfer circuit, a switch controlling a charge transfer operation thereof, and a charge storage circuit having a first end connected to an output terminal of the charge transfer circuit. The switch of the first and second cell is controlled by a first and second clock and the output terminal of the second and first cell, respectively. The first and second clocks are inputted to a second end of the charge storage circuit of the second and first cells, respectively. A first interface circuit connects first and second cells of a first unit cell to second and first cells of a second unit cell, respectively. Output terminals of a final unit cell connect to a load capacitor. Input terminals of an initial unit cell connect to a supply voltage.

Abstract: Voltage control in integrated circuits include a first voltage divider coupled to receive a reference voltage and having an output providing an adjusted reference voltage; an operational amplifier having a first input coupled to receive the output of the first voltage divider, a second input coupled to receive a feedback voltage, and an output; a voltage generation circuit responsive to the output of the operational amplifier and having an output providing an output voltage; and a second voltage divider coupled to receive the output voltage and having an output providing the feedback voltage. The first voltage divider is responsive to first control signals to adjust a voltage level of the adjusted reference voltage. The second voltage divider is responsive to second control signals to adjust a voltage level of the feedback voltage.

Abstract: A charge pump circuit includes a plurality of serially coupled stages and a plurality of clock drivers. A voltage output of a first of the stages is connected to a voltage input of a second of the stages. A voltage output of the second of the stages is boosted relative to a voltage input of the second of the stages. Each of the stages includes complementary charge pumps. Each of the charge pumps includes a pumping capacitor that stores charge in the stage. Each of the clock drivers drives a clock signal to the pumping capacitor of at least one of the stages. A voltage of the clock signal provided to the second of the stages is derived from the voltage input of the second of the stages.

Abstract: A multiple output charge pump that includes a first flying capacitor, a second flying capacitor, a first output node, a second output node, and a switching network. The first output node is configured to provide a first voltage, and the second output node is distinct from the first output node and is configured to provide a second voltage, different than the first voltage. The switching network is configured to provide a first mode of operation in which the first and second flying capacitors are connected in one of in series with one another between an input voltage and ground or in parallel with one another between the input voltage and ground, a second mode of operation in which the first and second flying capacitors are connected in parallel with one another between ground and the second output node, and a third mode of operation.

Abstract: One example refers to a circuitry comprising a first charge pump stage controlled by a first control signal, a second charge pump stage controlled by a second control signal, wherein the first charge pump stage and the second charge pump stage are arranged subsequently to each other and comprising a control unit for providing the first control signal and the second control signal, wherein the control unit is arranged to set the second control signal to high when the first control signal is high. Also, a multi-branch charge pump, a method for controlling various charge pumps and a system for controlling various charge pumps are suggested.

Abstract: A Complementary Metal-Oxide-Semiconductor (CMOS) analog switch has a circuit structure such that when a supply voltage is applied, the CMOS analog switch biases voltages at both ends of a Metal-Oxide-Semiconductor Field Effect Transistor (MOS) device, which switches on upon application of supply voltage, to a substrate node of MOS, or biases the substrate voltage of MOS device to a ground voltage state during a switching-off operation. The substrate voltage of MOS device in floating state is still biased to the ground voltage state even when abnormal, high voltages are applied to both ends of the MOS device. As a result, threshold voltage and conduction resistance decrease compared to related analog switches, and frequency bandwidth increases.

Abstract: A voltage generator adapted for a flash memory is disclosed. The voltage generator includes a charge pump circuit and a voltage regulator. The charge pump circuit includes at least one charge pump unit having a voltage receiving terminal and a voltage transmitting terminal. The voltage receiving terminal receives a reference voltage and the voltage transmitting terminal generates an output voltage. The charge pump unit includes first and second voltage transmitting channels and first and second capacitors. The first and second voltage transmitting channels are turned on or off according first and second control signals, respectively. The first and second capacitors receive the first and second pump enabling signals, respectively. The voltage regulator outputs a regulated output voltage according to the output voltage.

Abstract: In one embodiment, a Light Emitting Diode (LED) driving device for driving a plurality of LEDs has a switching matrix utilizing a plurality of one of a turn off thyristors or turn off triacs coupled to the plurality of LEDs. A controller is coupled to the switching matrix responsive to a voltage of a rectified AC halfwave, wherein combinations of the plurality of LEDs are altered to ensure a maximum operating voltage of the plurality of LEDs is not exceeded. A current limiting device is coupled to the combinations of the plurality of LED to regulate current.

Abstract: A DC-to-DC voltage converter comprising a differential charge pump that utilizes a differential clocking scheme to reduce output electrical noise by partial cancellation of charge pump glitches (voltage transients), and a corresponding method of operating a differential charge pump. The differential charge pump can be characterized as having at least two charge pump sections that initiate charge pumping in opposite phases of a clock signal to transfer (pump) charge to storage capacitors. The differential charge pump is particularly well suited for implementation in integrated circuit chips requiring negative and/or positive voltages, and multiples of such voltages, based on a single input voltage.

Abstract: A charge pump including an output terminal, an external capacitor, and a switch module is provided. The output terminal is coupled to an internal capacitor disposed inside an integrated circuit (IC). The external capacitor is disposed outside the IC. The switch module, coupled to the external capacitor and the internal capacitor configured to control the external capacitor and the internal capacitor to charge and discharge by turns. In a first operating period, the switch module controls the external capacitor to charge without providing current to the output terminal, and controls the internal capacitor to discharge to the output terminal.

Abstract: A charge pump system uses a helper pump to use in generating a boosted clock signal to use for the stages capacitor of a charge pump and also for the gate clock of the stage. This can be particularly useful in applications with lower supply levels, where a the helper pump can be used to provide an amplitude higher than the supply level, that can then be added to the supply level for the boosted clock signal and then added again to the supply level for the gate clock. Further advantages can be obtained by using the helper or auxiliary pump as an input to an optimized inverter circuit that receives an input clock and has an output that initially rises to the supply level than subsequently to the auxiliary pump's level.

Abstract: A charge pump system includes a charge pump, a switchable impedance, a comparator, and a capacitor. The switchable impedance has an input coupled to the output of the charge pump. The comparator has a first input coupled to the output of the switchable impedance, a second input coupled to a reference, and an output coupled to the input of the charge pump. The capacitor has a first terminal coupled to the output of the charge pump and a second terminal coupled to the first input of the comparator. The switchable impedance causes a first impedance between the first and second terminals of the capacitor during a start-up operation of the charge pump system and a second impedance between the first and second terminals of the capacitor during a steady-state operation of the charge pump system, wherein the first impedance is lower than the second impedance.

Abstract: The impedance of the elements of a capacitor array in the transmitter is kept substantially constant over changes in process, temperature, and supply voltage. The impedance is maintained substantially constant by compensating a gate voltage supplied to switches in each element of the capacitor array to adjust for changes in temperature and supply voltage to thereby maintain a substantially constant RC product for each unit element in the capacitor array and thereby improve the quality factor of the capacitor array.

Abstract: A voltage detection circuit includes a voltage detection unit suitable for comparing a voltage level of a reference voltage terminal with a voltage level of an internal voltage terminal and for generating a detection signal based on a comparison result, a test reference voltage generating unit suitable for receiving an external reference voltage through a pad and for supplying the received external reference voltage to the reference voltage terminal as the reference voltage by using a first input resistance, during a test operation, and a normal reference voltage generating unit having a current mirror structure, wherein the normal reference voltage generating unit is suitable for generating an internal reference voltage, and for supplying the internal reference voltage to the reference voltage terminal as the reference voltage by using a second input resistance different from the first input resistance, during a normal operation.

Abstract: A circuit includes a comparator unit, a capacitive device, and a switching network. The comparator unit is configured to set a control signal at a first logical value when an output voltage reaches a first voltage value from being less than the first voltage value, and to set the control signal at a second logical value when the output voltage reaches a second voltage value from being greater than the second voltage. The capacitive device provides the output voltage. The switching network is configured to charge or discharge the capacitive device based on the control signal.