Adjustable Patents (Class 327/553)
  • Patent number: 5729171
    Abstract: A monolithic CMOSFET integrated circuit which includes a first MOSFET integrant transistor having a gate area chosen to provide a desired range of resistance when operated in its triode region which constitutes (i) a preamplifier, (ii) a voltage controlled resistance (VCR) device, and (iii) a high-pass filter when capacitive with a transducer. Preferred operating characteristics are achieved by including an active CMOSFET linearization network including a pair of second and third integrant MOSFET transistors having only one-hundredth (1/100th) to one-tenth (1/10th) the gate area of the first transistor. The present invention operates with a reduction in distortion resulting from the filtering effect of the combined capacitive reactance of the sensor and the resistance of the resistor.
    Type: Grant
    Filed: June 1, 1992
    Date of Patent: March 17, 1998
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Timothy B. Straw, Patricia M. Eno
  • Patent number: 5726600
    Abstract: An active filter circuit component includes an all NPN bipolar tunable Gm cell and a positive current source (PCS) for supplying common mode current. The tunable Gm cell includes a fixed Gm cell having transconductance G.sub.f, a current divider and recombination circuit that together effectively multiply G.sub.f by a tuning factor .alpha., where -1.ltoreq..alpha..ltoreq.1, without effecting the cell's common mode current I.sub.cm. The PCS includes a pair of unity gain inverting single ended amplifiers that are connected in antiparallel across a pair of matched resistors. Alternately, the resistors can be connected across the inverting and non-inverting sides of a differential amplifier. A constant voltage is applied across the resistors to supply I.sub.cm, while maintaining a common mode resistance of R/2 and a differential mode resistance approaching infinity.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: March 10, 1998
    Assignee: Hughes Aircraft Company
    Inventors: Gopal Raghavan, Joseph F. Jensen, Albert E. Cosand
  • Patent number: 5726599
    Abstract: A device for multiplying a capacitance by a variable coefficient, for example for adjusting a cut-off frequency of a filter, includes a current amplifier for amplifying a current flowing through said capacitance. The capacitance is floating between first and second predetermined points. The current amplifier circuit includes a differential current amplifier.
    Type: Grant
    Filed: February 8, 1995
    Date of Patent: March 10, 1998
    Assignee: Alcatel N.V.
    Inventor: Pierre Genest
  • Patent number: 5703523
    Abstract: A filter circuit having a signal input terminal and a signal output terminal includes a first and a second buffer. The first buffer has an input end connected to a first resistor and to a first capacitor. A second capacitor having one end is connected to an output end of the first buffer. A second resistor having one end is connected to the signal input terminal. The second buffer has an input end connected to the other end of the second resistor and to the other end of the second capacitor, and an output end connected to the signal output terminal. The filter circuit also includes a first signal supply circuit and a second signal supply circuit. The first signal supply circuit supplies a signal proportional to a difference between an output signal of the second buffer and a signal inputted from the signal input terminal, to the input end of the first buffer through the first resistor.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: December 30, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takahiro Kusano
  • Patent number: 5701099
    Abstract: A transconductor-C filter that has coarse and fine control mechanisms allowing for both high speed and high current filtering of the same signal. The filter uses a current controlled oscillator and filter elements that have switchable amplification devices enabling the circuit to adapt to external and internal conditions in real-time. An equalizer is described utilizing the transconductor-C element. Finally, a Phase Locked Loop for providing the control signals to the transconductor-C element is also described.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: December 23, 1997
    Assignee: Level One Communications, Inc.
    Inventor: Haim Shafir
  • Patent number: 5694088
    Abstract: A phase locked loop including an in-phase detector (IPD), a quadrature phase detector (QPD), a frequency detector (FD), a squelch, a filter, and a voltage controlled oscillator (VCO). The in-phase detector has an IPD sample input, an IPD input, and an IPD output, where the IPD sample input is coupled to a data input. The quadrature phase detector has a QPD sample input, a QPD input, and a QPD output, where the QPD sample input is coupled to the data input. The frequency detector has a first FD input coupled to the IPD output, a second FD input coupled to the QPD output, and a FD output. The squelch has a squelch input, an enable input, and a squelch output where the squelch input is coupled to the IPD output and the squelch enable is coupled to the FD output. The filter has a filter input coupled to the squelch output and a filter output. The voltage controlled oscillator has a VCO input coupled to the filter output, a VCO in-phase output, and a VCO quadrature output.
    Type: Grant
    Filed: July 8, 1996
    Date of Patent: December 2, 1997
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Andrew H. Dickson
  • Patent number: 5666083
    Abstract: A circuit and method for adjusting a cutoff frequency of an active filter, such as a gm-C filter, which has a common mode feedback circuit for providing a bias signal may include plural common base stages having first inputs connected in parallel to a stage of the active filter and second inputs connected in parallel to an output from the common mode feedback circuit, and a capacitor connected to an output from each of the common base stages. The common base stages and their connected capacitors are selectively isolated from the filter output to adjust the cutoff frequency of the filter. The deselected common base stages are also isolated from the common mode feedback circuit and bias generator inputs.
    Type: Grant
    Filed: November 17, 1995
    Date of Patent: September 9, 1997
    Assignee: Harris Corporation
    Inventors: Brent A. Myers, Scott G. Bardsley
  • Patent number: 5663675
    Abstract: A multiple stage tracking filter includes a self-calibrating RC oscillator, a resistor connected to the self-calibrating RC oscillator and a capacitor connected to the self-calibrating RC oscillator. The filter further includes a switched capacitor filter element connected to the self-calibrating RC oscillator. The switched capacitor filter elements include a switch which is controlled by a timing signal from the self-calibrating RC oscillator. A method of filtering a signal includes the steps of operating a self-calibrating RC oscillator to generate a timing signal, tuning a plurality of cascaded filter elements with the generated timing signal and passing a signal through the plurality of tuned cascaded filter elements.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 2, 1997
    Assignee: American Microsystems, Inc.
    Inventor: Timothy G. O'Shaughnessy
  • Patent number: 5663676
    Abstract: A series of first and second operational amplifier circuits form a low-pass filter together with capacitors, and a current controlling circuit is responsive to a frequency control signal representative of a target cut-off frequency of the filter and a quality factor control signal representative of a target quality factor so as to respectively supply first and second controlling currents to the first and second operational amplifiers, thereby independently controlling the cut-off frequency and the quality factor with the frequency control signal and the quality factor control signal.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: September 2, 1997
    Assignee: NEC Corporation
    Inventor: Hiroko Itoh
  • Patent number: 5661432
    Abstract: A time-continuous tunable Gm-C integrator including a "super Gm" differential input stage (O1; MI1/O2, MI2) and using linear and constant degeneration resistors (R1/R2) for obtaining the most optimal linear input-voltage to output-current conversion is tunable in a time-continuous manner. The integrator is provided with three tuning CMOS transistors (MU1, MU2, MU3) controlling the integrating currents flowing between the input stages and from the input stages towards the outputs (OP/ON). By a suitable control of the tuning transistors and owing to the fact that the voltage swing across the latter is small, it is possible to obtain a perfectly linear transconductance (Gm) characteristic over the whole operating range of the integrator.
    Type: Grant
    Filed: January 18, 1996
    Date of Patent: August 26, 1997
    Assignee: Alcatel N.V.
    Inventors: Zhong Yuan Chang, Didier Rene Haspeslagh
  • Patent number: 5652537
    Abstract: An impedance multiplier circuit comprises an input impedance having a certain value of impedance and a circuit coupled to this input impedance for multiplying its value by a multiplication factor. This multiplying circuit comprises a first and a second voltage follower amplifier and a first and a second scaling impedance. The input impedance is coupled between the input of the first voltage follower amplifier and the output of the second voltage follower amplifier with the first and second scaling impedances establishing a voltage division between the output of the first voltage follower amplifier and the input of the second voltage follower amplifier. In this way, the second voltage follower amplifier provides active negative feedback, and effectively multiplies the input impedances's impedance by a factor of one plus the quotient of the second scaling impedance to the first scaling impedance.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: July 29, 1997
    Assignee: Sundstrand Corporation
    Inventor: Stephen R. Fleeman
  • Patent number: 5644267
    Abstract: A high-pass filter in particular for high-frequency applications and of the type comprising at least one input terminal (IN) and at least one output terminal (OUT) between which is defined a transfer function (FdT) and is inserted a biquadratic cell (18) incorporating a series of transconductance stages (2, 3, 4, 5) comprises a generator circuit (29) of variable currents (i.sub.K1, i.sub.K2) connected between a pair of stages (2, 3) of the biquadratic cell (18) and a voltage reference (GND). Said generator allows introduction of programmable zeroes in the transfer function (FdT) of the filter (20).
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: July 1, 1997
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Francesco Brianti, Roberto Alini, Valerio Pisati, Paolo Gadducci
  • Patent number: 5625316
    Abstract: A tuning circuit (202) uses a precision current reference (Iref) along with an analog-to-digital converter (218) to produce a digital output (228) to represent variations of internal resistance values. The precision current reference (Iref) is fed to an internal tuning resistor (R210) in order to provide an analog voltage signal to the analog-to-digital converter (218). The analog voltage signal changes in accordance with the variations in the tuning resistor value over process and temperature. The digital output (228) controls programmable capacitor arrays (C220, C222) which are included in the tuning circuit (202) as well as in an active RC filter (208) whose bandwidth is controlled by the programmable capacitor arrays (C220, C222) and internal resistors (R212, R214, R216).
    Type: Grant
    Filed: July 1, 1994
    Date of Patent: April 29, 1997
    Assignee: Motorola, Inc.
    Inventors: Mark J. Chambers, Jesus P. Finol, James B. Phillips
  • Patent number: 5619166
    Abstract: An adaptive active filtering method and apparatus that detects changes in noise conditions and reduces the signal propagation speed as noise conditions worsen. This active filter has a level shifting inverter, which inverts the input signal and converts the logic levels of the input signal into chip logic levels. This inverted input signal is presented at the input of a driver inverter, which once again inverts the signal. This second inversion filters out input noise, because a voltage controlled device (which is attached to the driver inverter) reduces the switching speed of this inverter as the noise condition worsen; this reduction in switching speed reduces the propagation speed and thus filters out noise.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: April 8, 1997
    Assignee: Cypress Semiconductor Corporation
    Inventor: Eric Gross
  • Patent number: 5614860
    Abstract: A voltage-controlled filter circuit has a cutoff frequency directly proportional to a ratio of two current values. The filter circuit comprises a variable conductance circuit having two bipolar junction input transistors supplied with an input voltage signal at the bases thereof and a first variable current source at each emitter thereof. The collectors supply the bases of a pair of differential transistors. A second variable current supply is coupled to common emitters of the pair of differential transistors. Externally supplied control signals set the two current values of the variable current sources. The filter circuit may be manufactured as a semiconductor integrated circuit device for signal processing for use in processing a recorded signal read from a recording medium. The recorded signal is supplied to a semiconductor integrated circuit for signal processing to remove unwanted signal and noise components.
    Type: Grant
    Filed: April 26, 1995
    Date of Patent: March 25, 1997
    Assignees: Hitachi, Ltd., Akita Electronics Co., Ltd.
    Inventors: Katsumi Osaki, Takashi Nara, Hitoshi Watanabe
  • Patent number: 5608349
    Abstract: A circuit arrangement with an adjustable amplitude-frequency response between an input signal terminal and an output signal terminal can be changed over simply between a fourth-order high-pass or low-pass characteristic and a second-order all-pass characteristic. The circuit includes first and third filters each with a filter function F, a second filter with a filter function G, a plurality of coefficient sections and first and second summing stages all coupled together so that the circuit has a transfer function A between the input signal terminal and the output signal terminal with a component complying withA=(C+(1-C).multidot.F-2.multidot.C.multidot.G).multidot.(C(1-C).multidot.F) ,whereF=FN=1/(1+a.multidot.s+b.multidot.s.sup.2)orF=FH=b.multidot.s.sup.2 /(1+a.multidot.s+b.multidot.s.sup.2)represents a first filter function with a second-order high-pass or a low-pass characteristic andG=a.multidot.s/(1+a.multidot.s+b.multidot.s.sup.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: March 4, 1997
    Assignee: U.S. Philips Corporation
    Inventor: Burkhard Dick
  • Patent number: 5606277
    Abstract: Transimpedance amplifier circuits and methods are provided in which the break frequency of the amplifier is adjusted through a single interface point to the amplifier circuit. At frequencies below the break frequency, the amplifier circuit provides an error current which effectively nulls the output of the transimpedance amplifier so that no output is produced. At frequencies above the break frequency, the break frequency setting element is essentially a short circuit that results in the frequency dependent voltage being substantially zero. This causes the transimpedance amplifier to convert current-to-voltage without signal degradation. The circuit also enables a user to adjust the break frequency without affecting the overall operation of the amplifier. Thus, the amplifier may be coupled to different output circuits for operations in accordance with different communication standards.
    Type: Grant
    Filed: June 23, 1995
    Date of Patent: February 25, 1997
    Assignee: Linear Technology Corporation
    Inventor: George F. Feliz
  • Patent number: 5606280
    Abstract: A band-pass filter system comprises a band-pass filter, and a frequency band controller for controlling a frequency band of the band-pass filter by generating a corresponding up pulse voltage and a down pulse voltage according to a pre-controlled center frequency obtained from an output frequency of the band-pass filter to produce a control frequency for obtaining a desired center frequency of the band-pass filter.
    Type: Grant
    Filed: October 6, 1995
    Date of Patent: February 25, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventor: Ki S. Sohn
  • Patent number: 5594390
    Abstract: An active filter includes a capacitor and a resistor coupled in parallel to an input terminal; a first current conveyor coupled between the capacitor and an output terminal; a second current conveyor coupled between the resistor and the output terminal; and a second capacitor coupled between the output terminal and ground. Proportionality constants between input and output currents of the current conveyors can be adjusted to reduce capacitance in the active filter and reduce the area required to fabricate the active filter in an integrated circuit. The active filter can replace a conventional loop filter in a phase-locked loop of a data separator integrated circuit. In a phase-locked loop, the polarity of a charge pump can be reversed to compensate for current reversal by the current conveyors in the active filter.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: January 14, 1997
    Assignee: National Semiconductor Corporation
    Inventor: Reuven Holzer
  • Patent number: 5589795
    Abstract: The invention relates to a method and an arrangement for controlling a loop filter of a digital phase lock, the loop filter filtering a difference signal, which comes from a phase comparator at a predetermined bandwidth and is proportional to a phase error. To reduce oscillation in the adjusting method and to eliminate the errors caused by noise, the loop filter is adjusted non-linearly on the basis of the difference signal from the phase comparator in such a manner that the bandwidth of the loop filter changes.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: December 31, 1996
    Assignee: Nokia Mobile Phones Ltd.
    Inventor: Matti Latva-Aho
  • Patent number: 5572163
    Abstract: An active filter control apparatus for controlling or tuning an active filter having a variable cut-off frequency. The active filter control apparatus includes a control circuit for controlling or tuning the cut-off frequency of the active filter and a characteristic correction generator for generating a correction signal to correct a group delay characteristic of the active filter in accordance with a set cut-off frequency. The characteristic correction includes a correction signal generator for generating the correction signal in accordance with a set correction amount. The cut-off frequency controller controls tunes the characteristic of the active filter in accordance with the correction signal. Preferably, the apparatus is formed of a one-chip LSI integrated on one chip. The control apparatus can be utilized to control the speed in a recording/reproducing apparatus such as a optical disk drive or a magnetic tape drive apparatus.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: November 5, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kimura, Ryutaro Horita, Kenichi Hase, Kunio Watanabe, Takashi Nara
  • Patent number: 5572161
    Abstract: A method and circuit for tuning an equivalent resistor in a filter so that the filter is insensitive to temperature changes in which an amplifier output is connected to a common gate of plural MOSFETs for providing equivalent resistances, and in which one input to the amplifier is connected to a reference resistor and the other input to the amplifier is connected to an equivalent resistor that includes one of the plural MOSFETs. An input current to the reference resistor and to the equivalent resistor's MOSFET is inversely proportional to the MOSFET's conduction parameter, k (i.e., .mu.C.sub.ox /2), so that both the inputs to the amplifier vary to change the amplifier output voltage to the common gate. The amplifier output changes render the filter insensitive to temperature changes.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: November 5, 1996
    Assignee: Harris Corporation
    Inventor: Brent A. Myers
  • Patent number: 5568042
    Abstract: In a method for monitoring and/or control of a plant component (4A, 4B, 4C, 4D) connected to an electric power network (N1, N2), for example a tunable filter for harmonic filtering or a capacitor bank for generating reactive power in a converter plant for high-voltage direct current, products of, respectively, a voltage (U.sub.A, U.sub.B, U.sub.C, U.sub.D) occurring in the plant component and of a current (I.sub.A, I.sub.B, I.sub.C, I.sub.D, I.sub.AC) flowing therethrough are formed, and sine and cosine signals, the frequencies of which are equal to the product of the ordinal number of a selected tone and a fundamental frequency associated with the power network, the products are integrated and the phase difference (.phi..sub.un -.phi..sub.In) and/or the amplitude value (SUn, SIn, respectively) between/for the components of the voltage and the current of the selected tone are formed by quotient generation, multiplication, and summation of the integrated products.
    Type: Grant
    Filed: September 15, 1994
    Date of Patent: October 22, 1996
    Assignee: ASEA Brown Boveri AB
    Inventors: Krister Nyberg, Urban str.ang.m
  • Patent number: 5557681
    Abstract: An electronic stethoscope includes a microphone mounted in a resilient collar in a hand-held case. The microphone is coupled to an active filter having independently and continuously adjustable bandwidth and center frequency. A switch bypasses the active filter when the user wishes to hear all of the sounds detected by the microphone. The controls for bandwidth and center frequency are located on one side of the case and can be manipulated by the hand holding the stethoscope. The volume or gain of the stethoscope is adjusted by a third control located on the one side of the stethoscope. The controls can be linear or rotary or combinations thereof. The output signal from the active filter passes through a filter having a frequency response inverse to that of the human ear, is amplified, and is coupled to headphones which plug into a socket on the rear of the case.
    Type: Grant
    Filed: September 24, 1993
    Date of Patent: September 17, 1996
    Inventor: Samuel L. Thomasson
  • Patent number: 5550520
    Abstract: An active tuneable band-pass filter is provided which has a negative resistance circuit for generating a tuneable amount of negative resistance for a passive band-pass filter structure so as to compensate for resistive losses. The negative resistance circuit has a bipolar transistor with a base connected in shunt to the passive filter structure and a collector connected to a shunt inductive element. A negative resistance is generated at the base of the transistor and is applied to the passive filter structure. A coarse Q-factor tuning circuit is coupled to the emitter of the transistor for providing a coarse amount of tuning of the negative resistance. Also connected to the emitter terminal, is a fine tuning circuit for providing fine tuning of the negative resistance. The fine tuning may be achieved manually or automatically with a control circuit.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: August 27, 1996
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5541548
    Abstract: The invention concerns an analog amplifier constructed using digital transistors. The digital transistors are those contained in a gate array, and which are used for fabrication of digital devices. The analog amplifier includes an invertor, which contains two cascode amplifiers in series. The analog amplifier also includes a differential amplifier. The invertor is contained within the feedback circuit of the differential amplifier.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 30, 1996
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventor: Harold S. Crafts
  • Patent number: 5534819
    Abstract: A circuit and method for reducing voltage error when charging and discharging a variable capacitor (44) through a switch (43). The switch (43) comprises a plurality of transmission gates (53-55) coupled in parallel. A control circuit (42) provides control signals for enabling transmission gates of the plurality of transmission gates (53-55). The control circuit (42) changes the resistance of the switch (43) by selecting an appropriate transmission gate wherein each transmission gate has a different resistance. The resistance of the switch (43) is varied as a capacitance of the variable capacitor (44) is changed to maintain a predetermined RC time constant over the entire range of capacitor values of the variable capacitor (44).
    Type: Grant
    Filed: April 13, 1995
    Date of Patent: July 9, 1996
    Assignee: Motorola, Inc.
    Inventors: Brad D. Gunter, David Anderson, Danny A. Bersch, Howard C. Anderson, Doug Garrity
  • Patent number: 5530339
    Abstract: A current driver utilizes a variable current source and a pair of comparison stages to provide a pair of output transistors with a low quiescent current and the ability to quickly satisfy the current demands of an inductive load. When the voltage input to the current driver is approximately equal to the voltage across the load, the variable current source is set at a minimum value, thereby providing the output transistors with the low quiescent current. When the input voltage varies from the voltage across the load, the current flowing through the output transistors begins to change so that one of the output transistors has a greater current flow, depending on whether the driver is sourcing current to or sinking current from the load.
    Type: Grant
    Filed: May 27, 1994
    Date of Patent: June 25, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Calum Macrae, Karl Edwards
  • Patent number: 5525928
    Abstract: A filter boost preattenuator provides controlled, rapid variable signal preattenuation at the input of a filter to optimally compensate for the absolute gain increase of the filter caused by increasing the high frequency boost level of the filter. The amplitude of the filter output exhibits very little change during boost variations that dynamically occur in applications such as data and servo signal recovery in disk drives. Using the present invention, disk space overhead needed to allow for readjustment of the automatic gain control system of a read/write channel is minimized. In the present invention, the feedforward signal provided from the variable gain boost circuit is applied to a feedback circuit and subtracted from the system input. The feedback forces a drop in the overall gain of the filter that increases with boost gain.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: June 11, 1996
    Assignee: Silicon Systems, Inc.
    Inventor: Gary J. Asakawa
  • Patent number: 5508570
    Abstract: A fast parasitic-insensitive continuous-time filter and equalizer integrated circuit uses an active integrator. The integrator has a left-half plane pole. A feedback path is provided that includes a resistive impedance which comprises a MOS transistor operated in the triode region. The resistive impedance is adjustable for cancelling the pole. The feedback path also includes a capacitive impedance coupled in series with the resistive impedance.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: April 16, 1996
    Assignee: Micro Linear Corporation
    Inventors: Carlos A. Laber, Paul R. Gray
  • Patent number: 5491453
    Abstract: In a narrow-band filter for filtering an input signal having a predetermined frequency and comprising first through n-th low-pass filters (13-1 to 13-n) which are connected in parallel to one another, a switching circuit time divisionally connects the first through the n-th low-pass filters between input and output terminals (11, 12). The first through the n-th low-pass filters, thereby, time divisionally filters the input signal for first through n-th filtering durations, respectively. A control circuit (30) is supplied with a frequency designation signal designating the predetermined frequency and controls the switching circuit to change at least one of the first through the n-th filtering durations in accordance with the frequency designation signal.
    Type: Grant
    Filed: February 10, 1994
    Date of Patent: February 13, 1996
    Assignee: NEC Corporation
    Inventor: Masaki Ichihara
  • Patent number: 5491446
    Abstract: An adaptive control device is arranged to cancel periodic noises without any malfunction and delay if aperiodic noises are mingled in the periodic noises. In the adaptive control device, the reference signal sensor senses a reference signal. The reference signal is filtered in the adaptive filter. The filtered signal is applied to the actuator serving as an electrical-mechanical converting unit so that the signal may be added to the input noises. The added result corresponding to an error is converted into an electric signal through the effect of the sensor. The electric signal is applied to the periodic signal separator for separating the signal into a periodic error and an aperiodic error. The coefficient updating unit operates to update a tap coefficient of the adaptive filter by employing an algorithm such as an LMS by using the separated periodic error and the signal filtered by the transfer characteristic compensating filter.
    Type: Grant
    Filed: November 15, 1993
    Date of Patent: February 13, 1996
    Assignees: Matsushita Electric Industrial Co., Ltd., Honda Motor Co., Ltd.
    Inventors: Tsuyoshi Okada, Toshiaki Kobayashi, Hidetaka Ozawa
  • Patent number: 5491725
    Abstract: A tracking filter has a tunable filter responsive to an input signal for producing a filtered output signal, a Hilbert transformer for producing an in-phase reference signal and a quadrature-phase reference signal from the filtered output signal, and a discriminator responsive to the input signal and the in-phase and quadrature-phase reference signals for producing a passband center frequency control signal and a passband width control signal for controlling the passband center frequency and the passband width of the tunable filter. The frequency discriminator performs complex demodulation of the input signal with the in-phase reference signals to produce respective in-phase and quadrature-phase baseband signals which are low-pass filtered. The quadrature-phase baseband signal is divided by the in-phase baseband signal. The quotient is integrated to produce the passband center frequency control signal.
    Type: Grant
    Filed: September 7, 1993
    Date of Patent: February 13, 1996
    Assignee: Rockwell International Corporation
    Inventor: Stanley A. White
  • Patent number: 5479132
    Abstract: A filter circuit includes an input node for receiving an unfiltered input signal, an output node for providing a filtered output signal, and an intermediate node. An integrator has an input coupled to the input node and an output coupled to the intermediate node. A Schmitt trigger has an input coupled to the intermediate node and an output coupled to the output node. A reset circuit has a first input coupled to the input node, a second input coupled to the output node, and an output coupled to the intermediate node. The signal on the intermediate node is generated by integrating the unfiltered logic input signal if the input signal and the output signal are at opposite logic states. A filtered output logic signal is generated by conditioning the intermediate signal with the Schmitt trigger. The reset circuit resets the intermediate signal if the input signal and the output signal are each at a zero logic state or if the input signal and the output signal are each at a one logic state.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: December 26, 1995
    Assignee: Ramtron International Corporation
    Inventors: Donald J. Verhaeghe, Gregory M. Smith
  • Patent number: 5471168
    Abstract: Based on the insight that the damping of a tunable filter is both related to its quality factor as to its passband gain, an inventive tuning system is proposed which tunes the quality factor of such a filter to a desired quality factor value by tuning the passband gain of the filter to a desired gain value. Such a tuning system is particularly useful in the field of OTA-C filters and consists of first (P1) and second (P2) tuning paths including such a tunable filter (BIQUAD) and fixed gain amplifiers (B-OTA1, B-OTA2). The gain of the latter amplifiers corresponds to the desired gain values. The tuning system further includes matching means (MM) for equalizing the gains in both tuning paths (P1, P2) by generating a quality factor tuning signal (VTQ) which is applied both to the tunable filter (BIQUAD) and to a replica thereof used as master filter in a data processing path. This matching means (MM) includes current rectifiers (C-REC1, C-REC2) implemented so as to use little hardware.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: November 28, 1995
    Assignee: Alcatel N.V.
    Inventors: Joannes M. J. Sevenhans, Mark G. S. J. Van Paemel
  • Patent number: 5463346
    Abstract: A fast response, low-pass filter comprising a slow response low-pass filter and a fast response low-pass filter. Both of these low-pass filters receive an input signal, and their respective outputs are compared to each other. When the output of the slow response filter differs from the output of the fast response filter by a predetermined value, the response time of the slow response time filter is increased so that it can more rapidly follow the input signal. The fast response time low-pass filter can be implemented with either analog low-pass filters or by digital low-pass filters.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: October 31, 1995
    Assignee: SpaceLabs Medical, Inc.
    Inventor: James R. Brooks
  • Patent number: 5461336
    Abstract: There is disclosed a filter circuit wherein a current control portion (12) controls a constant current (I.sub.2) specifying the sum of currents flowing in transistors (T119, T120) of a control portion (11) and transistors (T19, T20) of a control portion (9) on the basis of a potential difference between an output voltage (V.sub.1) of an operational amplifier (7) and a constant voltage (V.sub.3) whereby, if there is a difference in voltage level between a control voltage (V.sub.2) of the control portion (9) and the constant voltage (V.sub.3) of the control portion (11), a filter control portion performs the same control as a reference filter output characteristic of a filter portion (8) to an ideal input-output characteristic.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: October 24, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshiro Yada
  • Patent number: 5451915
    Abstract: A negative resistance generator includes first and second terminals; first and second inductors connected in series between the terminals; and a semiconductor amplifying device having a first control electrode connected to the first terminal and a first active electrode connected to the second terminal and a second active electrode connected to the junction of the inductors. When employed in an active filter resonator a first variable capacitor is interconnected with the inductors for setting the resonant frequency of the resonator. The resonators may be combined in an active filter with a transmission line where each of the resonators is interconnected to the line by decreasing resistance from the input to the output in order to balance the rf currents to which the resonators are subjected.
    Type: Grant
    Filed: May 26, 1993
    Date of Patent: September 19, 1995
    Assignee: Hittite Microwave Corporation
    Inventors: Peter J. Katzin, Yalcin Ayasli, Brian E. Bedard
  • Patent number: 5444414
    Abstract: A filter transconductance cell utilizes a differential gain stage which operates with a low voltage supply. The filter transconductance cell also includes a negative impedance converter to provide the cell with a high differential output impedance. The filter transconductance cell further includes an arrangement for sensing of a common-mode signal at the input of the differential gain stage and for generating in response thereto a current which is added to each common-mode current at the output of the differential gain stage to thereby produce common-mode rejection.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: August 22, 1995
    Assignee: National Semiconductor Corporation
    Inventor: Cary L. Delano
  • Patent number: 5440264
    Abstract: Based on the insight that the voltage-to-current ratio or gain of a capacitor (Z) at a particular reference frequency is the product of its capacitance value with said reference frequency, a tuning system is disclosed which tunes the center frequency of an analog bandpass filter by tuning the characteristic integrator frequency (fc) of an OTA-C integrator by making the transconductance of the operational transconductance amplifier (OTA) thereof equal to the aforementioned gain at that characteristic frequency. Therefore, the tuning system includes a first tuning path in which the OTA, (or a replica thereof) is included and a second tuning path including another amplifier (B-OTA) "degenerated" by the capacitor (Z) so as to produce the required gain. The gains of both these tuning paths are then equalized by matching means (MM) generating a frequency tuning signal (VTF) which is applied to both OTA and OTA-C.
    Type: Grant
    Filed: December 7, 1994
    Date of Patent: August 8, 1995
    Assignee: Alcatel N.V.
    Inventors: Joannes M. J. Sevenhans, Mark G. S. J. Van Paemel
  • Patent number: 5428313
    Abstract: Improvements in closed loop feedback circuit of the type having both digital circuitry and analog loop compensation circuitry comprising an analog arrangement for temporarily reducing the analog loop compensation circuitry gain, and a digital arrangement operable upon circuit initialization (reset or initial energization) to actuate the analog arrangement for a predetermined time interval to avoid overshoot and reduce the time required to achieve stable loop operation. The loop compensation circuitry typically includes at least one capacitor and the analog arrangement for temporarily reducing the gain may include a resistive shunt temporarily connected in parallel with the capacitor. In one preferred embodiment, there is a resistor connected in series with the resistive shunt by the controlled conduction path of a semiconductor device such as a field effect transistor having its conduction path and its internal resistive shunt connected in parallel with the capacitor.
    Type: Grant
    Filed: October 6, 1993
    Date of Patent: June 27, 1995
    Assignee: AlliedSignal Inc.
    Inventor: Michael C. Janosik
  • Patent number: 5426672
    Abstract: In byte-wise stuffing of synchronous signals of the synchronous digital multiplex hierarchy, jitter which complicates timing recovery occurs with phase-jumps of 8 UI. A possibility is therefore sought of converting jitter into drift. This is achieved using a phase-locked loop (PLL) in which a phase-jump compensator (7) is inserted between the output (4) of a phase discriminator (3) and the input (5) of an oscillator (6). The phase-jump compensator converts an input correcting quantity (K.sub.e) into an output correcting quantity (K.sub.a). When no stuffing is being performed, the input correcting quantity (K.sub.e) leaves the phase-jump compensator (7) unchanged (a1, b1). If positive stuffing (+St) is being performed, the pulses, thereby lengthened, of the input correcting quantity (K.sub.e) are firstly shortened to the standard duration (x1) and subsequently lengthened in a stepwise fashion to the original duration (c1, d1).
    Type: Grant
    Filed: August 14, 1992
    Date of Patent: June 20, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventor: Wilhelm Volejnik
  • Patent number: 5418483
    Abstract: A cut-off frequency setting circuit of a filter circuit comprises a filter circuit possessing an analog signal input terminal for adjustment of the cut-off frequency, a memory capable of rewriting data, and a D/A converter for producing an analog current according to the output data from the memory and for supplying the analog current into the analog input terminal for adjustment of the cut-off frequency of the filter circuit.
    Type: Grant
    Filed: March 12, 1993
    Date of Patent: May 23, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yamaguchi Hiroshi
  • Patent number: 5416438
    Abstract: An active filter circuit has been proposed which is fabricated on a chip and which comprises a two-input operational amplifier with one input for feedback, and a first capacitance element connected between the other input of the operational amplifier and the ground potential. It further comprises a main resistor and the supplemental resistors interconnected in series or parallel, and switches corresponding to the supplemental resistors and turned on or off by control signals, thereby the summed resistance of these supplemental resistors is adjustable to set the time constant created in combination with the capacitance of the first capacitor to a specified value. Input signals are routed to the other input of the operational amplifier via the resistor circuit consisting of the main and supplemental resistors and the switches. According to the present invention, the time constant is detected with a probe pulse by measuring discharge time of the second capacitor.
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: May 16, 1995
    Assignee: NEC Corporation
    Inventor: Hirohiko Shibata
  • Patent number: 5399985
    Abstract: The invention provides a digital PLL circuit wherein the integration time constant of a random walk filter can be varied adaptively in response to a frequency error. A master clock signal having a frequency equal to N (integral number) times that of an input clock signal is normally divided by N by a divider, and the division output of the divider and the input clock signal are compared in phase with each other by a phase comparator. The dividing ratio of the divider is temporarily varied in accordance with a result of the comparison so as to make the phases of the division output and the input clock signal coincide with each other to establish synchronism between them.
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: March 21, 1995
    Assignee: Fujitsu Limited
    Inventors: Yutaka Awata, Nobukazu Koizumi, Yasuo Ohtomo, Mitsuo Kakuishi
  • Patent number: 5396657
    Abstract: The invention relates to an adjustable filter comprising means for analysing the received signal which identifies the type of interference signal present from a predetermined set of interference signal types and an adaptive filter responsive to a control signal produced by the means for analysing the received signal dependent on the type of the interference signal detected.
    Type: Grant
    Filed: November 13, 1992
    Date of Patent: March 7, 1995
    Assignee: Nokia Mobile Phones Ltd.
    Inventor: Harri A. Jokinen
  • Patent number: 5389839
    Abstract: An electronic circuit (100) includes an output (110) and a filter circuitry (104, 106 and 108) coupled across this forward transmission path is a feedback loop having an error amplifier (112) and a coupling amplifier (116). Switches (118, 120, 122, and 124) are situated around the error amplifier to form an auto zero circuit. A capacitor (114) in conjunction with the error amplifier (112) provides an integrator for the circuit (100). The auto zero circuit allows the output (110) to follow a desired DC voltage namely (VAG) independent of the offset voltage of the error amplifier (112) or the coupler amplifier (116).
    Type: Grant
    Filed: March 3, 1993
    Date of Patent: February 14, 1995
    Assignee: Motorola, Inc.
    Inventor: Joseph P. Heck
  • Patent number: 5389887
    Abstract: A binary coding circuit that enables a clear image to be obtained by removing noise elements while retaining the target character and image information, improves image compression efficiency, reliably binarizes low-contrast characters and images and minimizes information loss, thereby providing clearer and more accurate binarized images of character and image information.
    Type: Grant
    Filed: April 19, 1993
    Date of Patent: February 14, 1995
    Assignee: Eastman Kodak Company
    Inventor: Seiichi Mizukoshi
  • Patent number: 5378947
    Abstract: A filter circuit comprises a glass delay line for giving a predetermined amount of delay to an input signal, and an active filter connected to the glass delay line for performing an impedance matching for the glass delay line. By changing the transconductance g.sub.m of differential amplifiers which constitute the active filter, the amount of delay of the glass delay line can be adjusted.
    Type: Grant
    Filed: April 5, 1993
    Date of Patent: January 3, 1995
    Assignee: NEC Corporation
    Inventor: Toshiya Matsui