Abstract: A process variable transmitter providing a transmitter output representing a process variable sensed by a sensor. The transmitter has a filter with a bandwidth which is automatically adjusted based on noise detected in a sensor output. When the transmitter senses higher sensor noise levels, it automatically decreases the bandwidth to damp noise in the transmitter output. When the transmitter senses lower sensor noise levels, it automatically increases the bandwidth to provide faster response to changes in the process variable.

Abstract: A stable, process independent RC time constant for precision frequency response in automatic tuning is generated using a feedback loop employing a voltage controlled resistor to force current through the output node to equal a reference current. The only terms in the expression for the time constant affected by process variations are two resistances, which are uniformly affected by any process variations to maintain proportion. The open loop transfer function for the feedback loop contains only one pole; because no phase-locked loop or other complex circuit introducing multiple poles within the feedback loop are employed, the time constant tuning filter is intrinsically stable.

Abstract: An active filter circuit capable of reducing power consumption without limiting dynamic range includes a switch section and a capacitance element disposed between an active filter section and a charge pump section. ON/OFF switching (short/open) of the switch section is controlled by a cut-off frequency judging section according to a status of an adjusting cut-off frequency of the active filter section. When the switch section is in the OFF condition, the capacitance element maintains a voltage to be supplied to a gate terminal and each circuit operation of a frequency adjusting section is stopped, thus reducing power consumption.

Abstract: A method and apparatus are provided for optimizing calibration of a tunable filter over a wide range of frequencies in a data channel of a direct access storage device (DASD). Calibration codes are received for low corner frequency, banding, and high corner frequency. A programmable diode is provided with a DC portion and a tunable digital-to-analog converter (DAC). A calibration control current is generated for calibrating the tunable filter utilizing the programmable diode and the calibration codes. The programmable diode is used to vary the calibration control current to calibrate the tunable filter to a correct low corner frequency and high corner frequency. The programmable diode can be programmed over a large range.

Abstract: A continuous-time smoothing filter circuit and method for implementing the same are disclosed. The circuit may be implemented as a cascade of two sections. The first section may comprise two programmable 3rd order low-pass filters, each filter having a low Q value complex pole pair, as well as, a negative real pole. The second section may comprise an output stage amplifier having a low output impedance in order to drive external loads. Each of the 3rd order low-pass filters may be under programmable control to select and coarsely tune the cut-off frequency for each of the two filters. In its broadest terms, the method of the present invention can be described as: processing a digital to analog converter generated output signal with a first 3rd order low-pass filter; processing a first output signal provided by the first 3rd order low-pass filter with a second 3rd order low-pass filter; and processing a second output signal provided by the second 3rd order low-pass filter with a low-output impedance amplifier.

Abstract: A semiconductor amplification circuit having a pair of differential input terminals, and a first MOS transistor having a gate thereof connected to a mutual conductance controlling terminal. The semiconductor amplification circuit also includes a pair of second and third MOS transistors, and a pair of fourth and fifth MOS transistors. Furthermore, the semiconductor amplification circuit has first and second current sources connected to the source and drain of the first MOS transistor, respectively, and third and fourth current sources connected to the drains of the fourth and fifth MOS transistors, respectively. In addition, the semiconductor amplification circuit includes a pair of differential output terminals and first and second capacitances.

Abstract: A self-tracking bandpass filter (1) comprises a controllable filter (10) having a signal input (11) for receiving a signal (&phgr;) to be filtered, a bandpass output (13) for providing a bandpass signal (SBP) having a center frequency (f0), and a control input (15) for receiving a control signal (SC); and a control unit (20) coupled to the control input (15) of the controllable filter (10), adapted to generate the control signal (SC) in such a way that the center frequency (f0) of the bandpass characteristic (HB) of the controllable filter (10) is substantially equal to the frequency (f) of the input signal (&phgr;).

Abstract: A signal filter employs digital control signals to selectively establish and adjust analog impedance components of the filter. In the case of a first-order R-C filter, adjustable resistance and reactance assemblies are coupled in series. The resistance assembly has multiple parallel signal paths sharing a common input and output. Each signal path includes a prescribed electrical resistance and a digital switch to selectively enable and disable the resistance. Between the common input and output, the signal paths provide a collective resistance which varies depending upon which switches have been activated. The reactance assembly is similar to the resistance assembly, with capacitors or inductors instead of resistors. A digital controller selectively activates the switches to adjust the assemblies' respective resistance and reactance.

Abstract: A transconductor which has a transconductance gm and which receives an input voltage Vin and outputs in response to the input voltage Vin an output current Iout of gm×Vin, wherein: the transconductor includes a plurality of sub-transconductors which are connected in parallel to one another; and at least one control signal is input to the plurality of sub-transconductors, and the plurality of sub-transconductors are controlled by the at least one control signal such that at least one of the plurality of sub-transconductors has a negative transconductance, whereby the transconductance gm of the transconductor can be varied.

Abstract: Method and apparatus are provided for processing a wide dynamic range analog signal which comprises a compressive nonlinear transfer function responsive to the average amplitude of the signal without feedback along the signal path. The invention employs frequency selective filtering and expansion of the compressed signal. The invention is applicable to any analog signal system having a plurality of channels carrying related signal information.

Abstract: Spurious energy suppression for a data communication system is achieved without using a large order noise suppression filter, by means of a post-mixer tracking filter that contains a current-controlled MOSFET-implemented resistance for a transconductance-capacitance filter and an associated transconductance tuning stage. The MOSFET-implemented resistance is controlled by the same control current that establishes the output frequency. As a result, the cut-off frequency of the tracking filter is linearly proportional to the carrier and independent of absolute processing parameters and temperature.

Abstract: A tuning circuit for an RF communications system and method includes a master block that outputs a control signal to a slave block. The master block can include a first filter having a high pass filter and a low pass filter that each receive the control signal, a first rectifier coupled to the high pass filter, a second rectifier coupled to the low pass filter, and a converter coupled to the first and second rectifiers that outputs the control signal. The first filter is preferably a gm-C poly-phase filter. Output signals of the gm-C poly-phase filter include high and low pass filtering signals resulting from similarly configured circuits so that the output signals have the same electrical characteristics, which results in an increased accuracy, for example, in a cut-off frequency.

Abstract: A variable frequency filter circuit, provided with a low pass filter constituted of a gm amplifier, is a low pass filter circuit in which a micro controller controls a current value converting circuit so as to adjust a reference current of the low pass filter in order to adjust a cut-off frequency. When the variable frequency filter circuit is in an adjusting mode, the variable frequency filter circuit detects a shift in a cut-off frequency of the low pass filter for filtering an actual signal. As to a dynamic change in a power supply voltage, ambient temperature or the like, which cannot be detected in real time, a value of the shift can be worked out in advance and with accuracy via simulation. Therefore, the shift is compensated in accordance with the value stored in a data memory. This requires no need of an arrangement to have a separate reference filter for detecting a shift for compensation of the shift, thereby eliminating an influence the arrangement.

Abstract: The bandpass filter has a comparatively large pass bandwidth, with, at the same time, comparatively steep edges up to the stop band and low attenuation in the passband. The bandpass filter contains three parallel LC elements, one of which is connected between the bandpass filter input and the bandpass filter output. The other two parallel LC elements each have one of their connections coupled to a fixed reference-ground potential.

Abstract: To tune the center frequency of a gm-C filter, which is a bandpass filter with a narrow bandwidth, to a target frequency, only while the filter is being tuned, the original circuit configuration of the filter is replaced with an alternative configuration that realizes a high signal-to-noise ratio. A characteristic tuner generates and inputs an impulse signal, pulse signal or step signal to the filter being tuned and thereby detects and adjusts the center frequency of the filter. And the tuning result is stored on a nonvolatile memory for future reuse. When the filter is operated, the characteristic tuner stops operating to cut down the power dissipation.

Abstract: An integrated circuit for receiving a clock signal is described and has a clock input and a receiver circuit. A clock signal can be applied to the clock input. A filter circuit is provided, whose input is connected to the clock input for the purpose of filtering out a frequency and/or a frequency range of the clock signal. An output of the filter circuit, which output produces the filtered clock signal, is connected to the receiver circuit for the purpose of transferring the filtered clock signal to the integrated circuit for processing.

Abstract: A distortion control circuit for selective modulation of an RF signal includes an input port for coupling with an RF signal source, such as a multifrequency CATV signal, an output port for coupling to an associated RF amplifier, and a pair of selectively biased diodes for generating new third order products from the multifrequency RF signal which are the same magnitude, but opposite in phase to the nonlinear products generated by the RF amplifier. Since both the original multifrequency RF input signal and the new generated products from the distortion control circuit are applied to the input of the RF amplifier, the nonlinear products from the distortion control circuit and the RF amplifier will be canceled and the output of the RF amplifier will comprise only the multifrequency RF signal.

Abstract: A tuning circuit for an RF communications system and method includes a master block that outputs a control signal to a slave block. The master block can include a first filter having a high pass filter and a low pass filter that each receive the control signal, a first rectifier coupled to the high pass filter, a second rectifier coupled to the low pass filter, and a converter coupled to the first and second rectifiers that outputs the control signal. The first filter is preferably a gm-C poly-phase filter. Output signals of the gm-C poly-phase filter include high and low pass filtering signals resulting from similarly configured circuits so that the output signals have the same electrical characteristics, which results in an increased accuracy, for example, in a cut-off frequency.

Abstract: An audio filter circuit is formed from a pair of cross-coupled, symmetric filters, each filter having a first stage comprising a single-pole, inverting low pass filter followed by a second stage comprising a two-pole, non-inverting Sallen-Key low pass filter. The circuit is readily switched between single-ended and double-ended output, while maintaining comparable noise and gain characteristics. The gain of the circuit is readily adjustable over a range of gains.

Abstract: A device for automatically providing variable resistance includes a comparator for comparing a reference voltage to an operating voltage, a first switch operatively coupled to the comparator, a first resistor operatively coupled with the first switch in a series connection between a pull-up voltage and a signal line, a second switch operatively coupled to the comparator, and a second resistor operatively coupled in a series connection with the second switch between the pull-up voltage and the signal line. The first switch selectively electrically enables the connection between the pull-up voltage and the signal line through the first resistor based on the comparison between the reference voltage and the operating voltage and the second switch selectively electrically enables the connection between the pull-up voltage and the signal line through the second resistor based on the comparison between the reference voltage and operating voltage.

Abstract: A programmable resistive-capacitive filter circuit enabling on-chip digital control of the frequency response includes a switched resistive type voltage divider network where one of the resistors forms an element of an RC filter and wherein the voltage divider additionally provides a DC bias on an output terminal. One preferred embodiment of the invention is directed to a programmable bandpass filter including MOSFET type semiconductor devices which are utilized as switched resistive elements of the filter.

Abstract: A current-mode filter with a transfer function having complex zeros includes a voltage differentiator having first and second bipolar transistors with respective first and second inputs and outputs and being coupled in an emitter follower configuration. A floating capacitor is coupled between the first and second outputs of the voltage differentiator. The floating capacitor forms a finite zero in the transfer function of the filter. At least one current mirror, isolated from the floating capacitor, is coupled to the voltage differentiator so as to substantially cancel any signal non-linearities introduced by the emitter follower configuration.

Abstract: A programmable capacitor array including a plurality of user-selectable, numerically weighted capacitors, each of which includes at least one fixed capacitor and one manufacturer-controlled trim capacitor, advantageously provides a variety of selectable capacitance values for a programmable analog integrated circuit. When coupled to a memory, for example a static memory, switches can be controlled that determine whether a particular fixed capacitor (user-selectable) or trim capacitor (manufacturer-selectable) is electrically coupled into the circuit. User access to those portions of memory controlling switches associated with the trim capacitors can be restricted via an I/O interface and security command. Such programmable capacitor arrays allow efficient implementation of user-programmable filter circuits where the user can conveniently program or reprogram a variety of filter parameters.

Abstract: A phase locked filter can utilize a divider to provide a source signal. The phase locked filter utilizes a phase comparator circuit to tune a voltage-tuned band pass filter. The voltage-tuned band pass filter as a phase response, wherein the phase difference between the input and the output of the band pass filter is zero when the source signal is provided at the center frequency. The phase comparator circuit adjusts the center frequency of the band pass filter to phase lock the source signal from the divider. In this way, the divider can be utilized to provide a clean source signal without a large amount of noise. The phase comparator circuit preferably includes a phase detector or a phase comparator and an integrator. The voltage-tuned band pass filter preferably includes a varactor.

Abstract: Disclosed are a circuit and a method for automatically tuning a filter circuit to compensate for variations in process, voltage, and temperature. The filter circuit includes one or more N-bit capacitor arrays. The circuit includes calibration circuitry and tuning circuitry. The calibration circuitry includes a resistor and a capacitor array that has at least N capacitors, which are configured to receive N input data bits. Each of the at least N capacitors is associated with an input data bit. The calibration circuitry is configured to integrate an input voltage signal in response to the input data bits to generate an output signal for tuning each of the capacitors. The tuning circuitry is coupled to provide the input data bits to the calibration circuitry for tuning the capacitor array and is configured to sequentially tune the N capacitors in response to the output signal by determining and setting a data bit value for each of the N capacitors.

Abstract: A tuning circuit for an RF communications system and method includes a master block that outputs a control signal to a slave block. The master block can include a first filter having a high pass filter and a low pass filter that each receive the control signal, a first rectifier coupled to the high pass filter, a second rectifier coupled to the low pass filter, and a converter coupled to the first and second rectifiers that outputs the control signal. The first filter is preferably a gm-C poly-phase filter. Output signals of the gm-C poly-phase filter include high and low pass filtering signals resulting from similarly configured circuits so that the output signals have the same electrical characteristics, which results in an increased accuracy, for example, in a cut-off frequency.

Abstract: A transmission system for transmitting a signal from a host to a transmission medium is disclosed. The transmission system includes a current-mode digital-analog converter, an on-chip low-pass filter, a line driver, and output impedance control. Further, a method for transmitting a signal from a host to a transmission medium using on-chip filtering is disclosed. More specifically, an apparatus and method for providing precise control of the filter cut-off frequency at high frequencies is disclosed. The transmission system and method can be used in transmission of Ethernet signals onto an unshielded twisted pair cable. In addition, with appropriate modification, the transmission system and method can be used for transmitting ATM or other signals onto a transmission medium.

Abstract: A method and apparatus for filtering an output voltage of a charge pump to reduce peak values which cause stress. A charge pump generates a pumped voltage which is filtered by an RC filter, for example a one or two Pi filter. The filter reduces the peak values of pump output voltage while reducing the amount of capacitance (and corresponding die size) required.

Abstract: An improved loop filter contains an active device which maintains a phase lock loop's zero frequency to bandwidth ratio substantially constant with changes in the incoming frequency. It does this by maintaining filter resistance proportional to the inverse square root of the filter current, and without requiring duplicates of circuit elements. Constructed in this way a phase lock loop can be achieved which has a wide operating frequency range and low tracking jitter.

Abstract: A filter circuit extracts a desired signal in the presence of interference by using a variable gain circuit whose input is the frequency converted received signal and whose output is fed through an active filter to produce the desired signal. The signal levels before and after the active filter are detected and the higher level is used to control the gain of the variable gain circuit.

Abstract: A loop filtering apparatus for a phase locked loop (PLL). The loop filtering apparatus operates as a secondary loop filter in response to a lock-up detection signal indicating a non-lock-up state in order to reduce the lock-up time, and operates as a third loop filter in response to a lock-up detection signal indicating a non-lock-up state in order to minimize the phase noise.

Abstract: An active filter has a least an operational amplifier, a plurality of resistances and a plurality of capacitances, at least one of the resistances and the consequences is variable by controlling a controller connected to an output side of the active filter for receiving an output signal so that the controller counts a frequency of the output signal to generate a counted value so as to control the variable resistances and capacitances on the basis of the counted value.

Abstract: A gain stage using switched capacitor architecture and suitable for a pipelined analog to digital converters provides for three pairs of switched capacitor banks whose use may be alternated so as to provide simultaneous sampling of two input channels for sequential gain operation without the interposition of additional circuitry in the signal chain from input to output of the gain stage.

Abstract: A reference voltage generator, comprising: reference voltage generation means for generating a reference voltage having a potential level through an output node by a power-up signal; noise removing means for a noise which is caused in a ground terminal and is provided to the output node; and reference voltage level adjusting means being connected between the output node of the reference voltage generation means and the ground terminal and for adjusting the potential level of the reference voltage from the reference voltage generation means.

Abstract: A digital tuning circuit (100) for a filter (120) has a filter input and a filter output and employs a switchable element array (122). The filter includes a tuning signal generator (104) that generates a tuning signal (106) that is delivered to the filter input and a clock circuit (102) that generates a periodic stream of pulses. The digital tuning circuit includes a delay circuit (110), a phase comparator (130) and an integrating up-down counter (140). The delay circuit (110) is responsive to the tuning signal generator (104) and delays the tuning signal (106) by a predetermined amount corresponding to the nominal delay through the filter (120). The integrating up-down counter (140) counts pulses in a first direction when the phase comparator (130) generates the first value and counts pulses in a second direction, opposite from the first direction, when the phase comparator (130) generates the second value.

Abstract: A low-pass filter circuit includes: a first compound transistor device (22) and (24) coupled between an input node (30) and an output node (32); a first transistor (20) coupled to the input node (30), a gate of the first transistor (20) is coupled to a drain of the first transistor (20); a second compound transistor device (36) and (38) coupled between a gate of the first compound transistor device (22) and (24) and the gate of the first transistor (20); a second transistor (34) coupled to the first transistor (20) and having a gate coupled to a gate of the second compound transistor device (36) and (38), the gate of the second transistor (34) is coupled to a drain of the second transistor (34); a current source (26) coupled to the drain of the second transistor (34); a first capacitor (C1) coupled to the output node (32); and a second capacitor (C2) coupled to the gate of the first compound transistor device (22) and (24).

Abstract: The invention relates to a calibration method and a calibration arrangement for an active filter intended to be used especially in portable radio apparatus. The filter (100) according to the invention is an active RC filter and it is integrated except for one or more of its capacitances or one or more of its resistances. Advantageously the highest capacitance or the highest resistance is left unintegrated. When using an external capacitance, the principle of the calibration is as follows: The integrated resistances are corrected using a common coefficient such that the external capacitance together with the integrated resistances produces the correct time constants (1). Then the integrated capacitances are corrected using a common coefficient such that they together with the internal resistances that were corrected in the previous phase produce the correct time constants (2). If the filter comprises multiple circuit stages, the two-phase calibration process described above is repeated for each circuit stage.

Abstract: An improved integrated self-adjustable continuous time band pass filter based upon a Gm cell with Gm compensation and bipolar transistors for use in a low power processing system for processing bursted amplitude modulated signals performing impedance-related measurements across a load. The system may be used for estimating stroke volume using the output and/or estimating hemodynamic maximum sensor rate using the output. The improved Gm cell provides for stabilization of the transconductance by compensating for manufacturing process variation of the value of the linearizing resistance RG by varying the transconductance bias current using a feedback signal proportional to the resistance of a resistor which is a replicate of the linearizing resistor.

Abstract: A filter characteristic regulating apparatus for regulating a characteristic frequency of a filter device capable of regulating a characteristic frequency includes a measuring signal generator for generating a measuring signal having a known cycle of a response waveform when inputted to a filter device having a desired characteristic frequency, a selector for selecting and inputting this measuring signal to the filter device when the filter device is not used, a response waveform cycle measuring instrument for measuring the cycle of the response waveform of the input measuring signal to the filter device, and a controller for comparing the cycle of the response waveform measured by the response waveform cycle measuring instrument with a known response waveform cycle, and regulating the characteristic frequency of the filter device to a desired value on the basis of the comparison result.

Abstract: A tunable integrator circuit having a main amplifier with an input resistor R and a feedback capacitor C and a tuning amplifier having a variable gain k between the output of the main amplifier and the feedback capacitor. The circuit has an effective capacitance of kC. Thus the integrator can be tuned to compensate for temperature and processing variations of the RC product by adjusting the gain of the tuning amplifier. The tuning amplifier can also be used to multiply the effective capacitance of the filter, kC, by increasing the gain k of the tuning amplifier beyond that needed to compensate for RC variations, thus reducing the area required for on-chip capacitances while maintaining a constant resistance. The circuit can be used independently or in conjunction with a capacitor array.

Abstract: A method and circuit (40) for tuning a Gm/C filter. A first circuit portion includes a variable current source (52) having a plurality of transistors M15 through M20 coupled to switches SWA through SWMAX. The output capacitor CINT is calibrated iteratively by compensating a calibration capacitor CINTC with the variable current source to tune the Gm/C filter. The transconductance Gm is dependent on a precision external resistor Rext rather than on internal resistors of the Gm/C filter. An algorithm (74) performs the iterative calibrations for the Gm/C filter. The invention is particularly useful for mixed signal or analog circuits.

Abstract: An apparatus for producing a clock signal includes a recirculating delay-locked loop operable to receive a reference clock signal, produce an output clock signal, and adjust the relative phase, with respect to the reference clock signal, of the output clock signal to align the output clock signal with the reference clock signal. The apparatus also includes a phase filter that is operable to receive the output clock signal and filter any phase shift of the output clock signal over a plurality of cycles of the output clock to produce an adjusted output clock signal.

Abstract: A circuit is designed with a first transconductor circuit (903) with a first input terminal (901) coupled to receive a voltage signal, a second input terminal (1017) coupled to receive a control signal and an output terminal. The first transconductor circuit has a gain responsive to the control signal. A first integrator circuit (905) has an input terminal coupled to the first transconductor circuit output terminal and has an output terminal. A second transconductor circuit (909) has an input terminal coupled to the first integrator circuit output terminal and an output terminal. A second integrator circuit (911) has an input terminal coupled to the second transconductor circuit output terminal and has an output terminal.

Abstract: A filter system having a variable dynamic range window comprising a parameter detector, a biasing unit and an active filter network. In one implementation, the active filter network comprises a log-domain filter. The parameter detector is configured to detect a parameter of a signal. The biasing unit, responsive thereto, biases the incoming signal. In one implementation, the biasing unit biases the signal to avoid zero crossings thereof. The effect is to adjust the dynamic range window of the filter to achieve an effective dynamic range which is greater than the nominal dynamic range.

Abstract: A filter compensating circuit having a sine wave generator, the sine wave generator generating a sine wave; a filter coupled to the sine wave generator and delaying a phase of the sine wave; a filter sine to square wave converter coupled to the filter and converting the delayed sine wave into a filter square wave signal; a reference sine to square wave converter coupled to the sine wave generator and converting the sine wave into a reference square wave signal; a comparator coupled to the filter sine to square wave converter and to the reference sine to square wave converter, the comparator comparing a phase relationship between the filter square wave signal and the reference square wave filter; and a correction signal generator coupled to the comparator, the correction signal generator generating a correction signal based on the comparison of the phase relationship, the correction signal being feedback to the filter to adjust a transconductance of the filter.

Abstract: A highly accurate tuning circuit for a tunable filter is provided which trims an RC time constant based on variances in both a formed capacitive component as well as variances in formed resistive components. A capacitor and resistor based tuning control circuit includes both a formed capacitor based tuning reference current generator and a formed resistor based tuning voltage reference generator. Each generates a voltage reference which is compared to the other to determine control signals for tuning a tunable resistive component forming the resistive portion of the RC time constant of the relevant filter. The resistive component is tuned by shorting selective resistors in the tunable resistive component.

Abstract: The invention relates to an elementary biquadratic cell for programmable time-continuous analog filters. The biquadratic cell is coupled between a first voltage reference and a second voltage reference and has at least one pair of input terminals and first and second pairs of output terminals. The cell includes a pair of half-cells, which half-cells are structurally identical with each other. Each half-cell comprises at least a first transistor coupled between the first and the second voltage reference and having a base terminal connected to a respective one of the input terminals. Each half-cell further comprises second and third transistors coupled between the first and second voltage references. The second transistor has a base terminal connected to the first output terminal of the first pair of output terminals and a collector terminal connected to the first output terminal of the second pair of output terminals.

Abstract: Though using an operational amplifier having not so large GB product, in order to obtain a constituting circuit is given to have enough to a deep notch characteristics, a biquad filter comprising a first and a second stages consisting an inverse amplifier and a third and a forth stages consisting an inverse integrator, replacing a feed back resistor to impedance element for compensating. The compensating impedance element is used a reactance, for example, an inductor or capacitor connected to the feed back resistor.

Abstract: A low power, high performance circuit for magnitude and group delay shaping in continuous-time read channel filters is disclosed. The circuit generally comprises a first and a second biquadratic circuit, each having an input, a band pass, and a output low pass node, where the second biquadratic input node is coupled to the first biquadratic output node, and a first and second transconductor coupled to the first biquadratic band pass node and also to the second biquadratic band pass and low pass output nodes, respectively. The first and second transconductors are preferably programmable transconductors.

Abstract: A bandpass filter includes a first and a second transconductor. The first transconductor has a first input connected to ground, and a second input connected to a second input of the second transconductor and to the output of the filter. An output of the first transconductor is connected to a first input of the second transconductor, and to an input of a filter through a first capactor. The output of the second transconductor is connected to ground through a second capacitor, and to a monitor amplifier. An output of the monitor amplifier is connected to the output of the filter. The bandpass filter further includes a third capacitor arranged between the second input and the output of the first transconductor, and a splitter bridge connected to the second input of the second transconductor.