Abstract: A multi-mode amplifier arrangement comprises an amplifier having a plurality of field effect transistors selectable in response to a control signal at a control terminal, said plurality of field effect transistors coupled to an input terminal to receive a signal to be amplified, said amplifier arranged between a supply terminal and a ground terminal. A tunable current source is coupled to the amplifier to provide in operation of the amplifier a constant drain current through the plurality of field effect transistors.

Abstract: An input buffer includes a first stage for receiving an input signal and having a first pair of complementary output signals, the first stage including an input circuit for receiving the input signal, an output circuit for generating the first pair of complementary output signals based on the input signal, a resistance feedback circuit connected to the first pair of complementary output signals and generating a feedback signal, and a common mode circuit for balancing the complementary outputs based on the feedback signal.

Abstract: A fully differential amplifier device includes a first input and a second input, a first output and a second output, and a differential input stage, provided with a first input transistor and a second input transistor. The first input and the first output and the second input and the second output are directly connected selectively in a first operating configuration and disconnected in a second operating configuration. The amplifier device further includes a current-generator circuit connected so as to supply respective first currents to the first and second outputs irrespective of a state of conduction of the first and second input transistors.

Abstract: A folded cascode amplifier having improved slew comprises an input differential transistor pair circuit, a cascode branch circuit coupled to the differential pair circuit, and a boost circuit for increasing branch current when the amplifier is in a slew condition. The additional current increases slew of the amplifier without negatively affecting amplifier characteristics.

Abstract: Disclosed are systems and methods which provide very linear amplification of signals using a linearized transconductance circuit. A transconductance amplifier configuration is shown which provides highly linearized operation utilizing a Darlington pair feedback circuit. Also shown are gain control configurations in which current steering circuitry is adapted to operate in its most linear region.

Abstract: A method and apparatus for combining an alternating current (AC) coupling technique with a low frequency restoration technique to provide AC coupling with low frequency restoration of the attenuated low frequency content. The low frequency restoration circuit operates to extract low frequency information prior to being high-pass filtered by the AC coupling circuit. The low frequency restoration circuit then buffers the low frequency information through a low frequency restoration amplifier, applies a programmable common mode voltage to the buffered, low frequency information, and then restores the buffered, common mode adjusted, low frequency information to the output of the AC coupling circuit.

Abstract: The present invention relates to a differential feedback amplifier circuit with cross coupled capacitors. Wherein, the first and second input terminals of a source follower are respectively coupled to the first and second output terminals of a differential amplifier, and a resistor is respectively coupled between the first output terminal of the source follower and the first input terminal of the differential amplifier and between the second output terminal of the source follower and the second input terminal of the differential amplifier in order to form a feedback loop. In addition, a capacitor is respectively coupled between the first end current source gate of the source follower and the second input terminal of the source follower and between the second end current source gate of the source follower and the first input terminal of the source follower, so as to improve the circuit gain and bandwidth.

Abstract: An inverting input buffer that uses the best features of an AC input buffer (low delay, high speed, high input voltage swing range) and a DC input buffer (stability, reliability, ‘automatic’ high and low data setup, input VIL and VIH “Voltage Input Low” and “Voltage Input High” margins). The delay though the buffer with a nominal load is very small. Optionally, a voltage tolerant input circuit is coupled to the DC input, which enables the DC input buffer to tolerate higher voltage swings, thus allowing a single buffer to switch both high (e.g. 2.5 volts-5 volts in a 1.2 volt system) and low input voltages (e.g. below 2.5 volts in a 1.2 volt system).

Abstract: An offset canceller outputs a signal during its offset compensating operation and compensates for the offset by capacitance or resistance devices connected externally to an operational amplifier. A driving circuit includes plural output circuits #1 to #n+1 for outputting driving signals to plural output terminals #1 to #n on one outputs and for outputting the driving signals on the other outputs coupled to corresponding plural output selectors #1 to #n, which then select one of two signals output from two neighboring output circuits to transmit the selected signals to the output terminals. The output circuits #1 to #n+1 have other outputs coupled to a decision circuit, which compares the signals to a reference voltage and outputs a decision signal representing the result of comparison at a predetermined timing. The output circuits execute the offset cancel operation responsive to the decision signal.

Abstract: A selector switch may be controlled by a single-ended control signal for steering a current through a load or through an auxiliary line. The selector switch may include a first terminal to be coupled to the load, and a second terminal to be connected to the auxiliary line, and two analog switches coupled to respective ones of the first and second terminals and configured to implement a single pole double throw switch so that a conduction or non-conduction state is determined by the single-ended control signal for steering the current through the load or the auxiliary line. The selector switch may also include a circuit defining a positive feedback loop controlling the two analog switches.

Abstract: The present invention relates to a circuit configuration (10) having a feedback operational amplifier (AMP) for amplifying an input signal (Vin) input into the circuit arrangement (10) and outputting the amplified input signal as an output signal (Vout). The circuit amplification (Vout/Vin) may be changed by selectively connecting or disconnecting impedances (R1, . . . RN). Integration elements (INT1. . . INT N) connected upstream from each of the control inputs of transistors (S1, . . . SN) used for this purpose ensure a certain temporal smoothing of the curve of the circuit amplification (Vout/Vin) when connecting or disconnecting an impedance (R1, . . . RN). The integration element particularly ensures that even in the event of a sudden change of the affected activation signal (VD1, . . . VDN), the affected impedance (R1, . . . RN) is not also suddenly disconnected or connected.

Abstract: An integrated amplifier may include a transconductance stage including a differential pair of input transistors of a first type of conductivity, respective resistive loads coupled to said input transistors, and a first bias circuit coupled to the input transistors. The first bias circuit may include a second differential pair of bias transistors having first conduction terminals coupled in common and second conduction terminals coupled to respective conduction terminals of the input transistors. The first bias circuit may also include respective second bias circuits coupled to the bias transistors to enable the input transistors in a conduction state with the input transistors being biased by a same respective bias current that flows through the respective input transistors. The first bias circuit may also include a capacitive network coupled to the bias transistors to define with the input transistors a feedback loop.

Abstract: An amplifier circuit with internal zeros provides a second pole in addition to a first pole and two zeros such that the second pole can prevent excessive gain at high frequency, so as to have high-frequency noise under control.

Abstract: An active balun device is provided. The active balun device includes: a differential input portion for receiving an external single input signal to output two complementary differential signals; and a differential amplifier connected to the differential input portion in cascade to amplify the two differential signals received from the differential input portion. Thus, the active balun device has a sufficient gain and a desired bandwidth in a semiconductor circuit.

Abstract: In an example embodiment, an apparatus, such as a two stage operational amplifier, comprising a first stage amplifier having an input and an output, and a second stage amplifier having an input and an output, the input of the second stage amplifier is coupled to the output of the first stage amplifier. A first bias circuit is operable to set a common mode voltage of the first amplifier. A second bias circuit is operable to set a common mode voltage of the second amplifier. A first feedback circuit is coupled to the first bias circuit and the output of the first stage. The first feedback circuit is operable to control the common mode voltage of the first stage amplifier based on the common mode voltage set by the first bias circuit and the output of the first stage amplifier.

Abstract: An operational amplifier driver capable of canceling an offset voltage of an operational amplifier includes the operational amplifier, first to third switches and a capacitor. The operational amplifier has a chopper, first and second input terminals and an output terminal. The first switch receives an input voltage and is connected to the first input terminal. The second switch is connected to the first input terminal and the output terminal. The third switch is connected the second input terminal and the output terminal. The capacitor is connected to the second input terminal. Because the operational amplifier driver directly charges/discharges the capacitor through the output terminal, and the polarities of the first input terminal and the second input terminal may be changed, the operational amplifier driver can shorten a charge/discharge time of the capacitor and cancel the offset voltage without increasing a level of an input signal.

Abstract: The present invention relates to a circuit configuration having a feedback operational amplifier (AMP), which is implemented as fully differential, for amplifying an input signal differentially input to the circuit configuration and for outputting the amplified input signal as a differential output signal. In order to increase the freedom in setting the input common mode voltage, according to the present invention, a combination made of a coupling resistor (R1b) and a level shifter (I1b, Nsfb) connecting the positive amplifier output (y1) to the inverting amplifier input (x2) and a combination made of a coupling resistor (R1a) and a level shifter (I1a, Nsfa) connecting the negative amplifier output (y2) to the noninverting amplifier input (x1) are provided.

Abstract: An amplifier includes first and second pairs of differentially coupled input transistors. The first current mirror generates a reference current which is mirrored by a second current mirror to produce a mirrored reference current. Current steering circuitry steers the mirrored reference current as a first tail current through the first pair when a common mode voltage associated with a differential input voltage exceeds a first reference voltage. A first portion of the mirrored reference current flows from the first current steering circuitry when the common mode voltage is greater than the first reference voltage to produce a second tail current for the second pair. A second portion of the mirrored reference current is fed back to an output of the first current mirror and summed with the reference current so as to reduce the second portion when the common mode voltage is greater than the first reference voltage.

Abstract: A hysteresis circuit applied to a comparator and an amplifier circuit thereof are provided. A hysteresis circuit is disposed on a positive feedback path of the comparator, such that the comparator resists noise interferences, and the hysteresis circuit has a feature of not affecting the feedback voltage signal, thereby making the hysteresis range of the comparator be more precise.

Abstract: A sensing circuit capable of detecting very low current pulses of the order of 10's and 100's of micro amps. The sensing circuit comprises a common gate amplification stage capable of amplifying a sensed current, a comparison stage having as an input the amplified sensed current and a feedback stage capable of returning an output of the comparison stage to the common gate amplification stage.

Abstract: Control structures are provided to accurately maintain amplifier common-mode levels at the predetermined level of a common-mode reference voltage Vcm. The disclosed control structures provide amplifier feedback along a first feedback path that is configured to provide high gain and low bandwidth to closely maintain amplifier common-mode level at the predetermined level of a common-mode reference voltage Vcm. They also provide amplifier feedback along a second feedback path that is configured to provide wide bandwidth to substantially reduce perturbations of the common-mode level that would have otherwise been induced by input signal transients. In an important amplifier feature, these controls are obtained without use of structures (e.g., capacitors and switching transistors) that use substantial current which reduces amplifier efficiency.

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: According to an example embodiment, an amplitude feedback loop may include an RF amplifier, a detector, a comparator, and a Q-enhancement cell. In an example embodiment, the RF amplifier has an output signal, and the detector has an input coupled to the output signal of the RF amplifier and is configured to detect a level of the output signal of the RF amplifier. The comparator circuit may receive as inputs a reference voltage and the output of the detector. Also, the comparator circuit is configured to output a control signal based on a difference between the reference voltage and the output signal of the power detector. The Q-enhancement cell may be coupled to the RF amplifier and have an input coupled to an output of the comparator circuit. A bias current of the Q-enhancement cell may be adjusted based on the control signal output by the comparator circuit.

Abstract: According to one or more aspects of the present invention, an amplifier arrangement is disclosed. The arrangement comprises a first, a second and a third amplifier. The first and second amplifiers are coupled to one another such that they form a negative feedback loop. In addition, an output node of the first amplifier is connected to a signal input of the third amplifier. An output node of the third amplifier circuit forms the amplifier output of the amplifier arrangement. In addition, the third amplifier circuit is designed for switchably changing its gain on the basis of a signal at an actuating input of the amplifier arrangement.

Abstract: An analog variable gain amplifier (VGA) adjusting a signal level of a mobile communication system is provided. More particularly, design of a VGA using an operational transconductance amplifier (OTA) having a wide linear input/output range is disclosed. The VGA includes two double-differential-pair OTAs and feedback resistors. A first differential input of a first double differential pair OTA receives an input signal from the forward stage, and a second differential input is negatively fed back through a differential output and a passive resistor. An input in which a first block of the connection structure and first and second differential inputs of a second double differential pair OTA are connected receives an output signal of the first block stage. The output is negatively fed back in series through a variable resistor whose resistance varies exponentially with an adjustment voltage from outside.

Abstract: An amplifier unit is provided, with which the need for manufacturing a photoelectric conversion IC in Bi-CMOS process is eliminated, and relatively low process cost of the photoelectric conversion IC is achieved. The input section of a buffer (the base of a transistor Q5) is connected with a plurality of patterns of phase compensation circuits each including a resistor and a capacitor connected in series. A bipolar transistor (Q6) is interposed between a positive power supply line and a capacitor (C2) forming a capacitance of the phase compensation circuit. By switching on/off the bipolar transistor (Q6), the capacitance value and resistance value of the phase compensation circuit are switched. Since the bipolar transistor (Q6) is interposed between the capacitor (C2) and the positive power supply line, base current (Isw) acting as a switch signal does not affect the amplifier unit.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A current-saving differential wideband driver circuit comprises a differential input amplifier for amplifying a differential input signal to produce a differential intermediate signal being comprised of a first intermediate signal and a second intermediate signal, a first transimpedance amplifier comprising a first inverting input, a first non-inverting input, and a first output, and a second transimpedance amplifier comprising a second inverting input, a second non-inverting input, and a second output. The first intermediate signal is applied to the first non-inverting input, the first output is connected to the first inverting input of the first transimpedance amplifier via a first feedback resistor for negative current feedback, the second intermediate signal is applied to the second non-inverting input, and the second output is connected to the second inverting input of the second transimpedance amplifier via a second feedback resistor for negative current feedback.

Abstract: Disclosed herein is technology for, among other things, a current feedback fully differential amplifier. The amplifier includes an input stage operable to sense an input current at a first terminal and a second terminal. The input stage includes a first buffer having an input coupled with the first terminal and an output coupled with said the terminal. The input stage further includes a second buffer having an output coupled with the first terminal and an input coupled with the second terminal.

Abstract: Reducing the bias voltage level required in a boost amplifier enhancing a gain of amplifier comprising first and second amplification stages. In an embodiment, the booster amplifier circuit contains a first transistor receiving both the bias voltage and the input signal respectively on the gate and source terminal and the drain terminal is coupled to second amplification stage of the high gain amplifier.

Abstract: A feedback circuit disposed across input and output terminals of an amplifier is adapted so as not inject DC current back into the input terminal of the amplifier. The feedback circuit includes, in part, first and second current sources, a transistor, and a resistive load. The first current source supplies current to one of the terminals of the transistor in communication with an input terminal of the amplifier. The second current source receives this current and diverts it to a voltage supply. The transistor is maintained in the active region of operation. The resistive load has a first terminal in communication with an output terminal of the amplifier and a second terminal in communication with the transistor. The DC voltages at the two terminals of the resistive load are substantially equal so as to inhibit DC current flow therethrough.

Abstract: A differential amplifier includes a first electrical path formed between a first transistor and a first load impedance; a second electrical path formed between a second transistor and a second load impedance; a tail-current transistor coupled to the first and second transistors; an input end of a feedback amplifier coupled directly to the first and second electrical paths for receiving a differential voltage output signal; and an output end of the feedback amplifier coupled directly to the tail-current transistor for adjusting the current provided through each of the first and second electrical paths. The feedback amplifier includes a non-inverting input node and an inverting input node, each node coupled directly to one or the other of the first and second electrical paths.

Abstract: An apparatus and method for generating differential signals. The apparatus includes a first operational amplifier receiving a first signal, a second operational amplifier receiving a second signal, and a first transistor. The first transistor includes a first gate, a first terminal, and a second terminal. Additionally, the apparatus includes a second transistor. The second transistor includes a second gate, a third terminal, and a fourth terminal. Moreover, the apparatus includes a first resistor coupled to the first terminal and the third terminal, and a second resistor coupled to the second terminal and the fourth terminal. Also, the apparatus includes a first current supplier coupled to the first terminal, a second current supplier coupled to the second terminal, a third current supplier coupled to the third terminal, and a fourth current supplier coupled to the fourth terminal.

Abstract: The present invention relates to a circuit configuration (10) having a feedback operational amplifier (AMP) for amplifying an input signal (Vin) input into the circuit arrangement (10) and outputting the amplified input signal as an output signal (Vout). In order to be able to change the circuit amplification (Vout/Vin) easily and reliably in the circuit configuration (10) and simultaneously keep an impairment of the output signal (Vout) caused by noise relatively low, capacitance values (Cb, C) of the coupling path (12) and of the feedback path (14) are adjusted simultaneously to one another correlated in a special way.

Abstract: In a balanced output circuit, an input signal inputted thereto is provided as a first output signal thereof on one hand, and on the other hand the input signal is inputted to an inverting amplification circuit and is compared with a comparison voltage before the signal is outputted as a second output signal. Based on the comparison of the first and second output signals, the comparison voltage is controlled by a charging voltage of a capacitor such that the DC voltage of the second output signal is equalized to that of the first output signal. Thus, the DC offset voltage between the first output signal (non-inverted output signal) and the second output signal (inverted output signal) can be properly annihilated by a simple circuit.

Abstract: A differential amplification circuit includes a differential amplifier and common mode control circuitry configured to control output common mode of the differential amplifier. However, this control circuitry does not use feedback. The circuitry controls the output common mode in either, or in a combination of two ways, neither of which employs feedback from the output common mode. One control technique uses a dummy circuit and comparator to cancel out the effect of variations in process, temperature and supply voltage on output common mode. Another control technique measures input common mode voltage, compares the measured common mode to a reference, and based on the difference, applies a current to the output that compensates for the variation in output common mode that a given input common mode would otherwise cause.

Abstract: A ratio-independent switched capacitor amplifier includes a first sampling circuit configured to sample a first input voltage as a first sampling voltage and to double a level of the first sampling voltage during an interval in which the first input voltage is cut off; a second sampling circuit configured to sample a second input voltage as a second sampling voltage and to double a level of the second sampling voltage during an interval in which the second input voltage is cut off; and a differential amplifier circuit configured to output a difference between the first sampling voltage and the second sampling voltage.

Abstract: A buffer amplifier, which includes a first differential signal amplifier including first and second NMOSFETs (N-type metal-oxide semiconductor field-effect transistors) amplifying differential input signals; a second differential signal amplifier including first and second PMOSFETs (P-type metal-oxide semiconductor field-effect transistors) amplifying the differential input signals; a first feedback resistor including an end commonly connected to drains of the first NMOSFET and the first PMOSFET and the other end commonly connected to gates of the first NMOSFET and the first PMOSFET; a second feedback resistor including an end commonly connected to drains of the second NMOSFET and the second PMOSFET and the other end commonly connected to gates of the second NMOSFET and the second PMOSFET; and a current source providing a bias current for driving the first and second differential signal amplifiers, is provided.

Abstract: A Miller-compensated amplifier, having an amplifier input and an amplifier output, comprises a first gain stage, a second gain stage, a third gain stage, and a capacitor. The first gain stage has the amplifier input as a first gain stage input thereto and a first gain stage output. The second gain stage has a second gain stage input, coupled to the first gain stage output, and a second gain stage output. The third gain stage has a third gain stage input, coupled to the second gain stage output, and provides an output voltage at the amplifier output. The capacitor is coupled between the amplifier output and the second gain stage input. The second gain stage amplifies a small signal part of a current received thereby and leaves a DC component thereof substantially the same.

Abstract: Common mode management between a DAC, such as a current-steering DAC, and a transconductance filter in a high-frequency transmission system. In one aspect of the invention, a transmission circuit includes a DAC that provides an analog signal from an input digital signal, and a filter such as a transconductance filter connected to the DAC, the filter receiving the analog signal and filtering the analog signal for transmission. A common mode management circuit connected to the DAC and the transconductance filter provides common mode compatibility in the interface connecting the DAC and the transconductance filter.

Abstract: A folded-cascode operational amplifier including a differential input stage (19) and a class AB output stage (20) includes a first slew boost current mirror (13) and a second slew boost current mirror (14) having inputs connected to drains of the input transistors, respectively. Each current mirror amplifies excess tail current steered into it as a result of a large, rapid input signal transition. The amplified excess tail current is used to boost the slew rate of the class AB output stage in accordance with a first polarity of the difference between the first (Vin+) and second (Vin?) input voltages. The drains of the input transistors are maintained at a voltage less than a transistor threshold voltage above the ground except during slewing operation of the operational amplifier to effectively isolate the current mirrors except during slewing operation.

Abstract: Disclosed is a Rail-to-Rail amplifier including a plurality of differential pairs of a first conductivity type and a plurality of differential amplifiers of a second conductivity type each with one of an input pair thereof constituting an input terminal, a differential amplifier that outputs an output voltage according to the range of provided supply voltage, a determination unit for determining whether to stop operations of the differential pairs of the first conductivity type or the second conductivity type according to a predetermined input signal, and a differential pair control unit for stopping the operations of the differential pairs of the first conductivity type or the second conductivity type according to the output signal of the determination unit.

Abstract: An arithmetic amplifying circuit for driving a capacitive load is provided including a voltage follower circuit converting an input signal to impedance, and a resistance circuit which is serially connected between the voltage follower circuit and an output of the arithmetic amplifying circuit. The voltage follower circuit includes a differential section, which amplifies a differential between the input signal and the output signal of the voltage follower circuit, and an output section, which outputs the output signal of the voltage follower circuit based on an output of the differential section, and drives a capacitive load via the resistance circuit.

Abstract: A power amplifier includes a power amplifier core in which a transmit signal having an amplitude-modulated (AM) component and a phase-modulated (PM) component is passed and amplified, the power amplifier comprising a forward path, and an additional amplification device configured to generate an output that is proportional to an output of the power amplifier core, such that the output of the additional amplification device indirectly controls the output of the power amplifier core.

Abstract: An amplifier and method of setting the amplifier is presented. The amplifier is set by setting a mean value between voltage values at first and second outputs of the amplifier. The mean value is pulled towards a certain voltage potential. A circuit node is coupled to the first and to the second output. The circuit node is connected, via at least one resistor and a respective switch, to the certain voltage potential assigned to the respective resistor.

Abstract: A reference voltage circuit having an open-loop buffer driven by a matching buffer included within a closed-loop, generates a stable differential or single-ended voltage while minimizing signal-dependent short-term and long-term drift. The open-loop buffer may be a replica of the closed-loop buffer, reducing the effect of a signal coupled on the voltage reference lines. The reference voltage circuit may be adapted for a switched capacitor ADC.

Abstract: In one embodiment, a programmable gain instrumentation amplifier (PGIA) comprises a pair of current conveyors, each current conveyor having a respective sense node and a respective voltage input, with a gain-setting resistor coupled between the respective sense nodes, and current being sensed on both sides of the gain setting resistor. In one embodiment, each current conveyor comprises a corresponding operational amplifier (op-amp) having a non-inverting input configured as the respective voltage input that may receive a respective input voltage signal, an output and an inverting input, with a respective current conveying element, which may be a FET, configured in a feedback loop between the output and the inverting input. Each current conveyor may be configured to sense a corresponding current flowing through its respective FET, with the corresponding currents forming a differential output current of the PGIA.

Abstract: a circuit for an RFID device in one embodiment includes an operational amplifier having a first input, a second input, and an output where the first input receives an incoming signal, arid the second input is coupled to the output via a feedback loop. An operational amplifier for an RFID device according to another embodiment compares an output of the operational amplifier to an incoming baseband signal, A circuit according to another embodiment includes an operational amplifier having a first input, a second input, and an output, wherein the first input receives an incoming signal, and wherein the second input is coupled to the output via a feedback loop. A comparator having one input is coupled to the output of the operational amplifier, another input receiving the incoming signal, and an output for outputting an outgoing signal. Methods for adjusting a filtering characteristic of an operational amplifier are also disclosed.

Abstract: The input stage of an operational amplifier includes at least four signal-receiving stages adapted to receive four primary input signals. If the voltage level associated with any of the input signal changes, at least one transistor in each of the at least four signal-receiving stages conducts more current and at least one transistor in each of these stages conducts less current. The four signal-receiving stages collectively generate at least four intermediate signals that are delivered to the output stage of the differential amplifier, which in response, generates a pair of differential output signals. Two of the input signals are derived from the pair of differential output signals and are fed back to control the amplifier.

Abstract: An amplifier circuit includes first, second, third and fourth transconductance amplifiers that each have an input, an output and a transconductance gain. The outputs of the first, second and third amplifiers communicate with the inputs of the second, third and fourth amplifiers, respectively. A first resistance has ends that communicate with the input and the output of the second amplifier, respectively. A second resistance has ends that communicate with the input and the output of the fourth amplifier, respectively. Fifth, sixth, seventh and eighth amplifiers each have an input, an output and a gain. The outputs of the fifth, sixth and seventh amplifiers communicate with the inputs of the sixth, seventh and eighth amplifiers, respectively. A third resistance has one end that communicates with the input of the first amplifier and an opposite end that communicates with the output of the eighth amplifier.