Abstract: A differential amplifier that has a current supply and a differential current to voltage converter with a positive current input node, a negative current input node and a voltage output node, has offset voltage trimming. The voltage output node provides an output voltage that is proportional to the difference in current values flowing into the positive current input node and a negative current input node. A trimming circuit has a plurality of trimming control inputs, an inverting trimming output, a non-inverting trimming output and trimming inputs coupled to the current supply. Trimming resistances couple the inverting trimming output to the non-inverting trimming output. Trimming selectors, controllable by a trim code provided to the trimming control inputs, provide for selectively connecting the current supply directly to the non-inverting trimming output while selectively connecting the current supply to the inverting trimming output through a first selected group of the trimming resistances.

Abstract: An amplifier circuit for amplifying a differential input signal includes a first feedback resistance, a second feedback resistance, first transconductance circuitry, and second transconductance circuitry. The first feedback resistance is connected between a first input node and a first output node of the amplifier circuit. The second feedback resistance is connected between a second input node and a second output node of the amplifier circuit. The first transconductance circuitry is arranged to inject a transconductance current at a point along the first feedback resistance, and is configurable to vary the point along the first feedback resistance where the transconductance current is injected. The second transconductance circuitry is arranged to inject another transconductance current at a point along the second feedback resistance, and is configurable to vary the point along the second feedback resistance where the another transconductance current is injected.

Abstract: A feedback circuit disposed across input and output terminals of an amplifier is adapted so as not inject DC current back into the input terminal of the amplifier. The feedback circuit includes, in part, first and second current sources, a transistor, and a resistive load. The first current source supplies current to one of the terminals of the transistor in communication with an input terminal of the amplifier. The second current source receives this current and diverts it to a voltage supply. The transistor is maintained in the active region of operation. The resistive load has a first terminal in communication with an output terminal of the amplifier and a second terminal in communication with the transistor. The DC voltages at the two terminals of the resistive load are substantially equal so as to inhibit DC current flow therethrough.

Abstract: An RF amplifier including first and second branches coupled in parallel between first and second supply voltage terminals, and a differential pair including first and second transistors each having first and second main current terminals, the second main current terminal of the first transistor being coupled by a first capacitor to the first main current terminal of the second transistor, and the second main current terminal of the second transistor being coupled by a second capacitor to the first main current terminal of the first transistor, wherein the first branch includes a first resistor coupled between the first main current terminal of the first transistor and the second capacitor, and the second branch includes a second resistor; coupled between the first main current terminal of the second transistor and the first capacitor.

Abstract: An amplifier circuit for amplifying a differential input signal includes a first feedback resistance, a second feedback resistance, first transconductance circuitry, and second transconductance circuitry. The first feedback resistance is connected between a first input node and a first output node of the amplifier circuit. The second feedback resistance is connected between a second input node and a second output node of the amplifier circuit. The first transconductance circuitry is arranged to inject a transconductance current at a point along the first feedback resistance, and is configurable to vary the point along the first feedback resistance where the transconductance current is injected. The second transconductance circuitry is arranged to inject another transconductance current at a point along the second feedback resistance, and is configurable to vary the point along the second feedback resistance where the another transconductance current is injected.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.

Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.

Abstract: A signal filter circuit, an amplifier circuit, combinations thereof and methods for configuring and using the same are provided. Embodiments of the amplifier circuit may provide precise reproduction and amplification of input signals. The amplifier may be built entirely with discrete components or an integrated circuit may be configured to provide some or all of the modules included in the amplifier.

Abstract: An operational amplifier is provided. The operational amplifier includes a first transistor configured to receive a first input voltage, a second transistor configured to receive a second input voltage, and a current steering module coupled to first and second transistors and configured to receive a reference voltage. The first and second transistors form a differential pair. The first transistor, second transistor, and current steering module are configured such that a current is steered from the current steering module or to the current steering module based on common-mode voltages of the first and second input voltages and the reference voltage to set a common-mode output voltage of the operational amplifier.

Abstract: A buffer circuit is driven with a low voltage and operates at a high speed has first and second comparators constituted by P channel and N channel MOS transistors provided between an input terminal and an output terminal of a buffer amplifier. A predetermined offset voltage is set for the comparing operation, and a switch circuit turns ON/OFF in response to an output signal from the first comparator and the output signal of the second comparator. A leading up of an output voltage from the buffer amplifier is accelerated by the current flowing from a power source line to the output terminal. The buffer circuit also includes an operation restricting circuit for restricting the comparing operation of the second comparator in a range of a dead band of the transistors.

Abstract: This disclosure relates to maintaining constant gain within multi-stage amplifiers.

Abstract: A semiconductor integrated circuit includes a first input terminal configured to input a first input voltage, a second input terminal configured to input a second input voltage, a differential amplifier configured to generate a differential output voltage by amplifying a differential input voltage obtained from a difference between the first input voltage input by the first input terminal and the second input voltage input by the second input terminal, a switch configured to electrically connect or cut off the first input terminal and the second input terminal, and a sample hold unit connected to a power supply which generates a reference voltage and configured to generate an offset correction voltage of the differential amplifier based on the differential output voltage and the reference voltage when the first input terminal and the second input terminal are electrically connected by the switch.

Abstract: Current-controlled CMOS (C3MOS) fully differential integrated wideband amplifier/equalizer with adjustable gain and frequency response without additional power or loading. A novel approach is presented by which adjustable amplification and equalizer may be achieved using a C3MOS wideband data stage. This may be referred to as a C3MOS wideband data amplifier/equalizer circuit. This employs a wideband differential transistor pair that is fed using two separate transistor current sources. A switchable RC network is communicatively coupled between the sources of the individual transistors of the wideband differential transistor pair. There are a variety of means by which the switchable RC network may be implemented, including using a plurality of components (e.g., capacitors and resistors connected in parallel).

Abstract: An amplifier circuit for amplifying an input signal received at an input node of the amplifier circuit. The amplifier circuit comprises a feedback resistance connected between the input node of the amplifier circuit and an output node of the amplifier circuit. Transconductance circuitry is arranged to inject a transconductance current at a point along the feedback resistance. The transconductance circuitry is configurable to vary the point along the feedback resistance where the transconductance current is injected.

Abstract: In a wireless communications system, it is important to realize a limiter operation by which a differential amplifier for amplifying a local signal may stably supply an output signal having a constant amplitude. However, when a signal handled by the system has a high frequency, a gain of the differential amplifier is reduced and the limiter operation may not be performed appropriately. The differential amplifier is configured employing a double cascode connection to enhance an output impedance, an upper transistor of the double cascode connection realizes enhancement in gain and frequency characteristics based on a positive feedback signal, and a lower transistor of the double cascode connection controls an operating point and suppresses an allowable output voltage range by operating in a linear region and based on a negative feedback signal to facilitate the limiter operation.

Abstract: The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.

Abstract: A non-inverting AC/DC input buffer combines the desirable characteristics of an alternating current (AC) input buffer including low delay, high speed, and high input voltage swing range with the desirable characteristics of a direct current (DC) input buffer including stability, reliability, and ‘automatic’ high and low data setup. The AC/DC buffer includes logic to help prevent the DC input buffer from interfering with the AC input buffer until the DC input buffer has completed its operations on a transitioning input. The DC buffer is configured to enable the AC buffer to process low input voltage swings such as, for example, voltage swings less than the difference in power supply voltages.

Abstract: An operational amplifier in accordance with one embodiment of the present invention includes a differential amplifier circuit to perform differential amplification of an input signal with respect to a reference potential Vbias, an output circuit to output a signal amplified by the differential amplifier circuit, a phase compensation capacitance connected between the output of the differential amplifier circuit and the output of the output circuit to compensate the phase of the signal output from the output circuit, and a diode connected in parallel with the phase compensation capacitance.

Abstract: An operational amplifier and a method for amplifying a signal. Embodiments provide a convenient and effective mechanism for reducing die area, design time and design verification time by sharing compensation components between the common-mode and differential feedback networks of the operational amplifier. As such, fewer compensation components are required, thereby reducing component die area. Additionally, given that the compensation components are shared between the common-mode and differential feedback networks, the feedback networks can be stabilized together with fewer compensation components to specify and verify, thereby reducing design and design verification time. Further, embodiments provide a compensation component coupling which does not couple directly to virtual ground, thereby reducing the noise of the operational amplifier.

Abstract: A signal processing circuit includes a differential input circuit, a first DC filter, a second DC filter, a differential transconductance circuit, and a differential converting circuit. The differential input circuit includes first and second input circuits respectively for receiving first and second input signals to generate first and second processed signals. The first DC filter and the second DC filter, respectively coupled to the first and the second input circuits, receive the first and the second processed signals and output first and second voltage signals. The differential transconductance circuit includes first and second transconductance circuits, respectively coupled to the first and the second DC filters, for converting the first and the second voltage signals to first and second current signals.

Abstract: An amplifying circuit includes: an amplifying cell portion configured by cascade-connecting a plurality stage of amplifying cells each including a pair of N-type transistors differentially connected to each other, load resistors and a current source for generating an operating current, and each having a function of amplifying differential signals; a feedback portion configured to feed differential output signals from the amplifying cell in a rear stage side of the amplifying cell portion back to differential input terminals of the amplifying cell on a front stage side; and an input portion configured to supply differential input signals to input terminals in a first stage of the amplifying cell portion.

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: An operational amplifier includes an input stage for generating a first differential output signal pair according to a first differential input signal pair, an output stage for generating a second differential output signal pair according to at least a second differential input signal pair, and a high-pass filtering circuit coupled between the input stage and the output stage for performing high-pass filtering on the first differential output signal pair, for generating the at least a second differential input signal pair.

Abstract: An apparatus includes an electronic amplifier and an electrical feedback line, a plurality of electrical sources, and an electronic controller. The electrical feedback line connects an output of the electronic amplifier to an input thereof. The electrical sources connect to nodes on the electronic feedback line. The electronic controller is configured to adjust the electrical sources in a manner responsive to a current input to the electrical feedback line.

Abstract: Systems and methods to achieve an IC audio volume control requiring minimum silicon area and having an accurate volume control gain setting are disclosed. A resistive element in form of a R/2R ladder is deployed between an output node of an operational amplifier and an input node of the circuit. All resistors of said resistive element are unit resistors having a same resistance, wherein said unit resistors are arranged in parallel or series combinations to achieve a resistance desired. A first number of switches are deployed between nodes of the R/2R ladder and an inverting input of the operational amplifier. Furthermore a second number of switches are deployed between nodes within resistor units of the R/2R ladder and the inverting input. The circuit invented could have a single input or a differential input, or a single ended output or a differential output.

Abstract: A broadband high output current output stage includes at least one first differential pair for enhancing the bandwidth. A second differential pair is further disposed in the circuit. The second differential pair is coupled to one of the first differential pair, such that a large output voltage swing is distributed to all transistors to avoid breakdowns thereof. A feedback unit is connected between each bias unit and the first differential pair. The first compensation unit compensates the electric characteristic of the high-frequency zero of the feedback unit and the bias unit, thereby broadening the linear bandwidth of the frequency response. The second compensation units are disposed between the first differential pairs. Each second compensation unit compensates the high-frequency zero of the node where each two first differential pairs are cascaded, thereby further broadening the linear bandwidth of the frequency response.

Abstract: An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized.

Abstract: Provided is a transconductance amplifier capable of suppressing variation in the range of a linear relationship between an input voltage and an output current depending on the magnitude of a tuning voltage Vctrl, thereby adjusting transconductance over a wider range of operating input voltages. The transconductance amplifier is configured by a differential pair formed of MOS transistors (111, 112) having a common source, MOS transistors (113, 114), amplifiers (106, 107), a voltage generator circuit (100), and a differential-pair input voltage generator circuit (120). An input differential common voltage Vcm of all differential signals inputted to the differential pair is adjusted so that a difference between Vcm and Vctrl is equal to a constant, in accordance with a change in the tuning voltage Vctrl that controls the transconductance. This enables keeping constant the range in which the transconductance amplifier can achieve good linearity.

Abstract: Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.

Abstract: An apparatus includes an electronic amplifier and an electrical feedback line, a plurality of electrical sources, and an electronic controller. The electrical feedback line connects an output of the electronic amplifier to an input thereof. The electrical sources connect to nodes on the electronic feedback line. The electronic controller is configured to adjust the electrical sources in a manner responsive to a current input to the electrical feedback line.

Abstract: Provided is a variable gain circuit in which it is not necessary to provide a plurality of phase compensation capacities while stability of a circuit is maintained regardless of a set variable gain. A variable gain circuit comprises a precedent stage amplifier circuit for amplifying an external input signal, a subsequent stage amplifier circuit for amplifying an output signal of the precedent stage amplifier circuit, a phase compensation circuit having a fixed capacitative element and connected between an output terminal and an input terminal of the subsequent stage amplifier circuit, and a gain setting circuit adapted to be capable of setting a gain value of the whole of the precedent stage amplifier circuit and the subsequent stage amplifier circuit to a plurality of values, wherein one of the gain value and a transconductance value of the precedent stage amplifier circuit can be set in conjunction with the other.

Abstract: An output circuit includes an analog amplifier circuit including a differential amplifier stage configured to receive an input voltage, and first to nth output systems (n is a natural number more than 1); first to nth output nodes; an output pad; and first to nth electrostatic protection resistances. An ith output system (i is a natural number between 2 and n) of the first to nth output systems includes an ith PMOS transistor having a drain connected with the ith output node of the first to nth output nodes and a gate connected with a first output of the differential amplifier stage; and an ith NMOS transistor having a drain connected with the ith output node and a gate connected with a second output of the differential amplifier stage. The first to nth electrostatic protection resistances are respectively connected between the first to nth output nodes and the output pad.

Abstract: The invention provides an apparatus and a method for performing a calculation operation with at least one input signal consisting of signal sections, wherein each signal section of said input signal has a constant amplitude. The apparatus comprises a signal transformation unit for transforming at least one input signal into a first intermediary signal having a virtual amplitude with respect to at least one carrier signal. The calculation unit is provided for performing the calculation operation on said first intermediary signal to generate a second intermediary signal. A signal re-transformation unit re-transforms the second intermediary signal into an output signal consisting of signal sections, wherein each signal section of said output signal has a constant amplitude.

Abstract: It is desired for semiconductor devices to reduce an inrush current and an overshoot. According to the voltage regulator circuit of the present invention, when a power supply is turned on, a switch SW1 is turned on in response to a control signal CTR1, a switch SW2 is turned off, and a reference voltage Vref is input to the first (+IN) and second (?IN) inputs of a differential amplifier AMP1 as a common voltage. When a common voltage is supplied to the first (+IN) and second (?IN) inputs, the current I flows into a smoothing capacitor C1 from the high-voltage power supply (VDD) via the differential amplifier AMP1 is regulated to be small. Namely, an inrush current can be reduced. Further, according to the voltage regulator circuit 30 of the present invention, the increase of the output voltage Vout from the differential amplifier AMP1 is relaxed so that the overshoot can be suppressed.

Abstract: An offset voltage correction circuit for a differential amplifier comprising NMOS transistors serving as a pair of differential transistors, and PMOS transistors serving as a pair of load transistors connected between outputs of the pair of differential transistors and a power source. The offset voltage correction circuit is equipped with a voltage generator for generating, between a source of any one of the pair of load transistors and the power source, a constant voltage for correcting an offset voltage of the differential amplifier.

Abstract: An apparatus having means for amplifying a differential voltage signal. The means for amplifying includes at least an input stage and an output stage. The output stage includes means for preventing a trade off between a reduction in noise of an output voltage signal and an increase in a dynamic range of the output voltage signal.

Abstract: A circuit includes a differential amplifier unit that receives an input signal at a non-inverting input thereof, a constant current source, a load circuit, an output transistor that receives an output of the differential amplifier unit as an input and drives a load circuit, a phase compensation circuit including a variable resistor and a capacitor connected in series between the input of the output transistor and a feedback path, an output current monitor circuit that detects an output current flowing through the output transistor, and a bias voltage generation circuit that varies a resistance value of the variable resistor in accordance with a result of the detection of the output current by the output current monitor circuit. A signal obtained by voltage dividing an output of the output transistor by resistors is supplied to an inverting input of the differential amplifier unit.

Abstract: The invention relates to a circuit for adjusting an impedance between two terminals, said impendance including the input impedance of the circuit. The aim of the invention is to enlarge the adjustment range and to stabilize—the operating behavior of such a circuit. For this purpose, the circuit comprises amplifiers, adjusting means with which amplification of at least one amplifier and/or the circuit can be changed in general and the impedance between the two terminals can be modified by influencing the one or more adjusting means.

Abstract: A differential amplifier unit and a feedback unit are provided The differential amplifier unit includes first and second transistors and first to fourth loads. Each of the first and second transistors is provided with a current input end, a current output end connected to a lower potential power source and a control end. The first and second loads are cascade connected between a higher potential power source and the current input end of the first transistor. The third and fourth loads are cascade connected between the higher potential power source and the current input end of the second transistor. The feedback unit generates first and second feedback currents based on first and second output voltages The feedback unit inputs the first and second feedback currents to a third node connecting the first and second loads and a fourth node connecting the third and fourth loads.

Abstract: An amplification circuit includes a semiconductor amplification element, a current feedback circuit that is connected to a terminal close to a ground side of the semiconductor amplification element and can control gain reduction, and a voltage feedback circuit that is connected between an input terminal and an output terminal of the semiconductor amplification element and can control feedback voltage. The feedback voltage of the voltage feedback circuit may be varied according to the gain reduction controlled by the current feedback circuit.

Abstract: A low power high dynamic range microphone amplification system is disclosed. The system includes a current sensing amplifier for receiving an input current signal representative of auditory information and for providing an amplifier output signal. The current sensing amplifier includes a DC bias network that includes a cascode filter.

Abstract: A balanced amplifier (1) is provided with: a first operational amplifier (11) whose reverse-phase input terminal is connected to an input voltage source (30) and whose reverse-phase input terminal is connected to an output terminal of the first operational amplifier; a second operational amplifier (12) whose positive-phase input terminal is connected to the input voltage source and whose reverse-phase input terminal is connected to an output terminal of the second operational amplifier; and a voltage division circuit (20i, 20j, 20k, 20l) for dividing a reference voltage supplied from a reference voltage source (40), the reference voltage source being connected to a positive-phase input terminal of each of the first operational amplifier and the operational amplifier through the voltage division circuit.

Abstract: A new offset canceling circuit for a differential circuit is disclosed whose input offset voltage may be cancelled independent of the variation of the input level, accordingly, enables the cut-off frequency of the canceling circuit unchanged. The offset canceller of the invention provides a buffer amplifier and a filter. The filter includes a capacitance multiplier including an operational amplifier (Op-Amp) operating in the inverting mode and a capacitor connected between the input and output of the Op-Amp. The Op-Amp operating in the inverting mode whose closed loop gain is solely determined by resistors, and the capacitance of the capacitor is multiplied by the closed loop gain of the Op-Amp by the Miller effect.

Abstract: An input stage receives a differential input signal at first and second input nodes and provides a differential output current at first and second output nodes. The differential output current includes a component taken from the input nodes through first and second impedances, and an additional component generated in response to a sample of the voltage of the differential input signal. A transconductance cell having cross-coupled inputs may generate the additional component of the output current.

Abstract: An operational amplifier has an input stage that branches a first current according to first and second input signals. An output stage generates an output signal from a second current and one of the branch currents in the input stage. A first transistor supplies the first current to the input stage. A second transistor supplies the second current to the output stage. A first gate line supplies a first bias potential to the gate terminal of the first transistor. A second gate line supplies a second bias potential to the gate terminal of the second transistor. The first gate line and the second gate line are electrically isolated from each other, preventing unwanted feedback of the output signal to the input stage by leakage through the gate lines.

Abstract: An amplifier structure includes shield conductors that are provided spatially adjacent to elongated feedback signal lines that couple a feedback circuit to an amplifier input. The shield conductors are provided between the feedback signal lines and a ground plane, which interrupts a parasitic capacitance that otherwise would be established between the feedback signal line and ground. The shield conductors are electrically coupled to the amplifier's outputs which create a capacitance between the output terminal and the feedback signal line. In some embodiments, the capacitance generated between the output terminal and the feedback signal line can suffice as a capacitor in a feedback path of the amplifier and be contained in an integrated circuit die on which the amplifier is manufactured. Optionally, a structure may be provided that eliminates common mode signals on the feedback lines while simultaneously preserving the common mode signals on the amplifier output terminals.

Abstract: A system for processing signal communications between a frequency translation module and an integrated receiver decoder. According to an exemplary embodiment, the decoder and the frequency translation module comprise a signal processing apparatus comprising an input for receiving an frequency shift keyed modulated signal, an amplifier having negative feedback coupled to said input, wherein said input is further coupled to a first source of reference potential and a second source of reference potential; and a tank circuit coupled between said differential amplifier and an output.

Abstract: The invention provides an operational amplifier. In one embodiment, the operational amplifier includes an input stage circuit, a feedback circuit, a fixed stage circuit, and an output stage circuit. The input stage circuit receives a positive input voltage and a negative input voltage, and amplifies the positive input voltage and the negative input voltage to output a first positive output voltage and a first negative output voltage. The feedback circuit generates a reference positive output voltage equal to the first positive output voltage according to the positive input voltage and the negative input voltage. The fixed stage circuit equally amplifies the first negative output voltage and the reference positive output voltage to generate a second positive output voltage and a second negative output voltage. The output stage circuit generates an output voltage according to a difference voltage between the second positive output voltage and a second negative voltage.

Abstract: An amplifier circuit according to the present invention includes a plurality of input nodes receiving a plurality of input voltages (VI1 to VIR), a plurality of differential amplifiers provided corresponding to the plurality of input nodes, each having one input which receives a voltage of the corresponding input node, and a control circuit generating a control voltage (CONTROL) that follows a minimum voltage or a maximum voltage of the plurality of input voltages (VI1 to VIR) from outputs of the plurality of differential amplifiers and supplying the generated control voltage (CONTROL) as a common value to the other inputs of the plurality of differential amplifiers.