Abstract: Consistent with an example embodiment, there is an electronic circuit for amplification of bipolar symmetric current signals. The electronic circuit has a pair of complimentary current mirrors. Depending on the polarity of the bipolar current signal one or the current mirrors is active while the other current mirror is in an off state. This way adding a biasing current to the input signal is avoided which substantially reduces noise.

Abstract: Circuitry for driving a pin includes a first resistive circuit connected to the pin, a first transistor circuit to connect the first resistive circuit to a logic level voltage in response to a trigger voltage, the first transistor circuit and the first resistive circuit together defining a termination impedance, and a driver circuit to apply the trigger voltage to the first transistor circuit. The driver circuit includes counterparts to the first resistive circuit and the first transistor circuit. The counterparts define a counterpart impedance that is controlled to control the trigger voltage and thereby control the termination impedance.

Abstract: A buffer circuit is arranged for offset cancellation between an input voltage and a buffered voltage. The buffer circuit includes two bias current sources, two p-type transistors, and two n-type transistors. Further, the base-emitter voltages of the two p-type transistors and the two n-type transistors are arranged to form a translinear loop. The translinear loop is arranged to provide the buffered voltage from the input voltage. One of the bias sources is arranged to provide a bias current to one of the p-type transistors, and the other bias circuit is arranged to provide a bias current to one of the n-type transistors. One of the bias current circuits is arranged to actively sense the reverse saturation currents of the p-type transistors and the n-type transistors, and to provide its bias current so that the offset voltage between the input voltage and the buffered voltage is substantially cancelled.

Abstract: The present invention provides a semiconductor test device that can output a higher voltage as a driver output without increasing power consumption of a high-speed driver, so as to test a device under test. In order to achieve this, the semiconductor test device for switching a driver output between a plurality of voltages and a higher voltage that is higher than said plurality of voltages and outputting said driver output to test a device under test, includes: a first buffer portion operable to output said plurality of voltages by a push-pull circuit of an emitter follower serving as a source and an emitter follower serving as a sink; and a second buffer portion operable to output said higher voltage by a push-pull circuit of said emitter follower serving as said sink of said first buffer portion and an emitter follower serving as a source of said higher voltage.

Abstract: The present invention achieves technical advantages as an operational amplifier (30) having both a high slew rate and a full power bandwidth with low distortion by providing resistors (R6, R7, R9, R10) in place of active loads coupled to a differential pair (Q22, Q25, and Q23, Q24) of transistors in a folded cascode input stage (34). By utilizing passive resistors instead of active loads, no saturation occurs during high slew rate signals. The present invention achieves technical advantages of higher slew rate and lower noise without sacrificing power consumption.

Abstract: A high output current wideband output stage/buffer amplifier that has reduced quiescent current requirements. The output stage/buffer amplifier includes a diamond follower circuit having a pair of complementary output load-driving bipolar junction transistors (BJTs), a pair of pre-driver BJTs, and a plurality of current boost BJTs. As the base current of one of the driver transistors starts to increase in response to an increasing load current, the current through a corresponding pre-driver transistor decreases, thereby increasing the collector current of a corresponding boost transistor. The increased collector current of the boost transistor is fed back to a current mirror, causing a concomitant increase in the base current of the driver transistor.

Abstract: It is an object of the present invention to provide an output circuit capable of reducing a consumption current while an output current is suppressed in a case where limitation is placed on an output voltage so as not to fall to a predetermined voltage or less in an output circuit the emitter of which is grounded, the base of which serves as an input node for a control current and the collector of which serves as an output node. Provided are a base current supply section for supplying a base current to the output transistor according to an input signal from the outside, and a base current control section for detecting an inter-terminal voltage between the collector and emitter of the output transistor to control a base current supplied from the base current supply section so as not to cause the inter-terminal voltage to fall to a value lower than a predetermined voltage.

Abstract: A bipolar rail-to-rail class-AB output stage that provides improved AC performance in low voltage applications. The bipolar output stage includes an input buffer stage, first and second complementary common emitter stages, and first and second control circuits biased and configured to assure class-AB operation of the first and second common emitter stages, respectively. The input of the bipolar output stage is applied to the input buffer stage, and the output of the bipolar output stage is provided by the second common emitter stage. The combination of the first common emitter stage and the first AB-control circuit operates as a current booster stage for the second common emitter stage, thereby obviating the need for a large power supply.

Abstract: A driver circuit of an image display apparatus comprises driver circuit with a class A/B push-pull stage (T3, T5). The driver circuit contains an n-type pull transistor (T3), an n-type control transistor (T2) with a main current channel terminal coupled to a control electrode of the pull transistor (T2) and a voltage source (V) applying a predetermined voltage over a series connection of the control electrode-main current channel terminals of the control transistor (T2) and the pull transistor (T3). The current from the control transistor (T2) flows to a p-type push transistor (T5) via a current mirror (T4, T5). An input transistor (T1) draws all of the current from the control transistor (T2) via a node (142) between the control transistor (T2) and the pull transistor (T3) to control the ratio between the currents through these transistors (T2, T3).

Abstract: An output stage for a Class-G amplifier includes four current mirrors, (CmpL) powered by a first low voltage supply (VspL), (Cmph) powered by a first high voltage supply (Vsph), (CmmL ) powered by a second low voltage supply (VsmL), and (Cmmh) powered by a second high voltage supply (Vsmh). The outputs of the current mirrors are connected together to form an output of the output stage. A buffer (10), whose input forms an input to the output stage, includes a first transistor (19) and a second transistor (27) connected in an emitter follower configuration, which are used to steer the buffer's output either through the first transistor (19) to a first switch (69) or through the second transistor (27) to a second switch (84). The first switch (69), which is controlled by a first comparator (68) connects a collector of the first transistor (19) to either the input to the first current mirror (CmpL) or the input to said second current mirror (Cmph).

Abstract: Disclosed are systems and methods which provide very linear amplification of signals using a linearized transconductance circuit. A transconductance amplifier configuration is shown which provides highly linearized operation utilizing a Darlington pair feedback circuit. Also shown are gain control configurations in which current steering circuitry is adapted to operate in its most linear region.

Abstract: The invention concerns a power amplifier consisting of three stages: a first feedback-free stage amplifying the input signal in current; a second stage amplifying in voltage the signal output from the first stage and comprising two direct current feedback half-circuits symmetrically implanted and operating over the whole frequency spectrum; a third feedback-free stage amplifying the current derived from the second stage and powering a loudspeaker.

Abstract: A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.

Abstract: An operational amplifier for increasing the response speed of its output voltage relative to an input signal while increasing the tolerable amplitude of the output voltage. The operational amplifier includes a PNP output transistor connected to a high potential power supply, an NPN output transistor connected between the PNP output transistor and a low potential power supply, and a drive unit, which drives each output transistor in accordance with an input current. The drive unit includes a current source, a first current mirror circuit, and a second mirror circuit. The input current is supplied to a node between the first and second current mirror circuits. The base of the NPN output transistor is connected to the node, and the base of the PNP output transistor is connected to a further node between the current source and the first current mirror circuit.

Abstract: The invention concerns a power amplifier consisting of three stages: a first feedback-free stage amplifying the input signal in current; a second stage amplifying in voltage the signal output from the first stage and comprising two direct current feedback half-circuits symmetrically implanted and operating over the whole frequency spectrum; a third feedback-free stage amplifying the current derived from the second stage and powering a loudspeaker.

Abstract: An amplifier comprising a Low Noise Amplifier (LNA) to amplify a Radio Frequency (RF) signal. The LNA having a transconductance and including an input stage to receive the RF signal. The LNA again varying as a function of changes in conditions. A bias assembly to generate a bias current to bias the LNA input stage. The bias assembly configured to reduce variation of the LNA gain to changes in conditions.

Abstract: An apparatus for indicating a difference between a first voltage and a second voltage includes: (a) an input unit for receiving the first voltage at a first locus and receiving the second voltage at a second locus; the input unit quanitifying the difference; (b) an output unit coupled with the input unit and cooperating with the input unit to generate an output signal for effecting the indicating; and (c) a signal treating unit coupled with the output unit, the first locus and the second locus, and employing at least one algorithmic relation with at least one of the first voltage and the second voltage to generate at least one bias current for effecting a substantially balanced response by said output section in said generating said output signal as said difference varies. The at least one drive current has nonnegative values as the difference ranges in value.

Abstract: An arrangement and a method for automatically controlling the volume in an audio signal reproduction device. A digital signal processing circuit, which is arranged in the audio signal path for influencing the audio signal anyway, is used to reduce the reproduction volume in the event of an overdrive condition of the power amplifier. The overdrive condition is indicated by an overdrive signal attained by the power amplifier. In the process, the decrease and increase in the volume is carried out using various time constants, and disturbing control oscillations are neutralized by inserting a counter which must be decremented prior to a raising of the volume.

Abstract: A high output amplifier includes a comparison amplifier having a first input, a second input, and an output, wherein a set voltage is applied to the first input, a voltage of the output is coupled to the second input, and the output is generated in response to a difference between the voltage applied to the first input and the voltage coupled to the second input. The high output amplifier also includes a low-pass filtering device that receives and performs low-pass filtering on the output of the comparison amplifier, a conversion device that converts the output of the low-pass filtering device to complementary signals, and a push-pull output device, driven by the complementary signals, that supplies electrical current to a load, wherein an increase in the electrical current supplied by the push-pull output device is decreased by changes in the load due to the low-pass filtering device.

Abstract: A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.

Abstract: An op amp includes a pair of buffer amplifiers interposed between the current switch and the output transistors in an output stage based on the Monticelli architecture. The buffer amps buffer the output transistors' gate capacitances, thereby allowing the output transistors to be nearly any desired size without adversely affecting the op amp's dynamic performance. This enables the op amp's compensation capacitors to set the amplifier's bandwidth, and allows the secondary pole to be at a higher frequency. The buffer amplifiers can also provide gain which effectively multiplies the transconductance of the output transistors and further extends out the secondary pole location. In addition, the buffer amplifiers can be used to provide voltage level translation between the current switch and output transistors, which can provide additional headroom for the op amp's gain stage.

Abstract: A circuit is arranged as a class B amplifier with a rail-to-rail output swing and a small deadband. The circuit has two parallel input stages that each use an amplifier configured as a unity gain voltage follower. The output of each stage drives a high current output transistor. The output transistors are complementary transistors arranged in a common source configuration. The common source configuration operates as a complementary class B amplifier, which conducts no quiescent bias current. An offset voltage is introduced in each input stage, which creates a small deadband in the output voltage as it switches between sinking current and sourcing current. The offset voltage is selected to ensure that the output transistors are not both simultaneously activated.

Abstract: An amplifier having an improved output current drive capability includes an input stage and an output stage. An input of the output stage is operatively coupled to an output of the input stage. The amplifier further includes a current regeneration circuit operatively coupled to the input of the output stage in a feedback arrangement, the current regeneration circuit feeding back a current to the output circuit in accordance with a predetermined scale factor, the fed back current being proportional to an input current supplied to the output stage. The input current supplied to the output stage is dynamically adjustable by the current regeneration circuit in response to an input current requirement at the output stage.

Abstract: A differential amplifier has two amplifier paths. The second amplifier path is operated in the opposite direction relative to the first amplifier path. The outputs of the two amplifier paths form a differential output and are in each case connected to one another via a respective load resistor at a node. The operating point of the two amplifier paths is set by the voltage that is present at the node. The differential load is divided into two individual resistors and the voltage present between the individual resistors serves for setting the operating point of the amplifier paths. The bandwidth and the gain can be influenced by varying the resistances of the load resistors.

Abstract: The present invention provides an high beta, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage over conventional methods disclosed is up to &bgr;2 rather than a single beta. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form: &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, speed performance is increased and bandwidth is extended.

Abstract: The present invention provides for an output stage which couples with an input stage and is configured to limit a reflection current which is reflected back into the input stage to enhanced an output voltage to drive a variety of loads. The present output stage limits the reflection current by compensating for at least one bias current at the input stage output. The output stage further reduced a quiescent current needed to maintain the output stage in an active state without adversely affecting the output voltage supplied to the load. The output stage includes a first and second current driving stage, a first and second current compensation circuit and an output circuit. The first and second current driving stages couple with both the input stage and the output circuit.

Abstract: An amplifier having an improved output current drive capability includes an input stage and an output stage. An input of the output stage is operatively coupled to an output of the input stage. The amplifier further includes a current regeneration circuit operatively coupled to the input of the output stage in a feedback arrangement, the current regeneration circuit feeding back a current to the output circuit in accordance with a predetermined scale factor, the fed back current being proportional to an input current supplied to the output stage. The input current supplied to the output stage is dynamically adjustable by the current regeneration circuit in response to an input current requirement at the output stage.

Abstract: An output stage amplifier circuit in accordance with the present invention overcomes many shortcomings of the prior art. A output stage amplifier circuit for providing a high output voltage and current reference signal suitably includes an output buffer configured with a compensation circuit for reducing disturbances introduced into the output stage amplifier circuit by voltage supply rails, such as parasitic ringing and other disturbances. The compensation circuit can suitably comprise a first compensation device, such as at least one capacitor, and a second compensation device, such as at least one capacitor. The compensation devices are suitably coupled between an input terminal of the output stage amplifier circuit and a pair of transistors proximate a pair of output transistors of the output stage amplifier circuit, and are configured to provide “pole-zero” compensation to the output stage amplifier circuit.

Abstract: The amplifier output stage circuit includes: a translinear loop 30 having first and second input nodes Vin+ and Vin−; a first transistor Q7 coupled between a first output node of the translinear loop 30 and a first supply node V+; a first output transistor Q9 coupled between an output node 36 of the circuit and the first supply node V+, and having a base coupled to a base of the first transistor Q7; a second transistor Q10 coupled between a second output node of the translinear loop 30 and a second supply node V−; a second output transistor Q12 coupled between the output node 36 of the circuit and the second supply node V−, and having a base coupled to a base of the second transistor Q10.

Abstract: An improved class-G amplifier (FIG. 2) is provided by adding a first capacitor (82) between the input of current mirror (18) and node p, and by adding a second capacitor (84) between the input of current mirror (20) and node m. The added capacitors (82) and (84) can be sized to stabilize frequency responses when high power supplies are enabled. The added capacitors (82) and (84) further function to reduce transient currents during switching through the crossover points between first upper and lower power supplies (Vsp1, Vsph) and between second upper and lower power supplies (Vsm1, Vsmh).

Abstract: The present invention provides technical advantages as a class AB output driver (400) with minimal cross-over distortion. If the differential input to the driver is I+&dgr;I/2 and I−&dgr;I/2, then the current gain is the average of &bgr;n and &bgr;p, more specifically, (&bgr;n−&bgr;p)*I+((&bgr;n+&bgr;p)/2)* &dgr;I. The offset current (&bgr;n−&bgr;p)*I is taken out with a feedback loop.

Abstract: Arrangements of Class AB (push-pull) amplifiers, one in a higher voltage configuration and one in a lower voltage configuration, to achieve a high intercept at low power as well as a low noise figure in a complementary technology allowing for higher performance at lower power. In an illustrative embodiment, the invention includes a first circuit for receiving an input signal; a second circuit for shifting a level of the input signal; and a third circuit for amplifying the input signal. In the illustrative embodiment, the third circuit includes first and second transistors Q3 and Q4 connected in a push-pull configuration. In the illustrative embodiment, the first and second transistors Q3 and Q4 are connected to form Class AB amplifiers and the first transistor Q3 is of a first type and the second transistor Q4 is of a second type. The teachings of the present invention are illustrated in a differential amplifier.

Abstract: A class ‘AB’ amplifier output stage has an active current bias source that provides base drive current to the output transistors that is proportional to the signal input voltage level. The output transistor currents are modulated with the input signal such that the quiescent supply current is reduced to a very small level.

Abstract: An amplifier circuit that includes an amplifier stage and an output stage, and local feedback between these stages to drive a biasing string associated with the amplifier stage using the potential at the output stage. In one embodiment, the local feedback line is coupled between the output stage and the biasing string to remove the loading effect of the biasing string on the amplifier stage. In another embodiment, the local feedback line is coupled between the switches of the amplifier stage and the switches of the output stage to bias the amplifier stage using the output stage.

Abstract: A method for adjusting the output response of a complementary bipolar operational amplifier includes: providing a first bipolar transistor 14; providing a second bipolar transistor 16 coupled to the first bipolar transistor 14; providing a first current source 26 coupled to a base of the first bipolar transistor 14; providing a second current source 28 coupled to a base of the second bipolar transistor 16; providing a third bipolar transistor 10 coupled to the base of the first bipolar transistor 14; providing a fourth bipolar transistor 12 coupled to the base of the second bipolar transistor 16; providing a first resistor 20 coupled between a base of the third transistor 10 and a common node; providing a second resistor 18 coupled between a base of the fourth transistor 12 and the common node; providing a capacitor 30 coupled to the common node; providing a first input stage current source 24 coupled to the first resistor 20; providing a second input stage current source 22 coupled to the fourth resistor 18;

Abstract: A musical amplifier that includes a vacuum tube and a transistor. The vacuum tube is connected to the gate of the transistor, so that the current flow through the transistor is controlled by the vacuum tube. According to one example of the invention, the vacuum tube-transistor arrangement is set up in a “push-pull” arrangement, where a vacuum tube-transistor combination controls positive voltages, and another vacuum tube-transistor combination controls the negative voltages delivered by the system, the system output being at approximately zero voltage when not under load. Also, the use of the “Edison effect,” referred to as “thermionic emission” from vacuum tubes to variably regulate output transistor bias current resulting in substantially reduced total harmonic distortion is also disclosed.

Abstract: A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

Abstract: A first amplifying transistor is connected between a first supply terminal and an output terminal, the latter being grounded via a loudspeaker system, and another such transistor between a second supply terminal and the output terminal. A first and a second drive transistor are Darlington connected respectively to the first and the second amplifying transistor. A first biasing circuit is connected between the first supply terminal and the base of the first drive transistor, and a second biasing transistor between the second supply terminal and the base of the second drive transistor. In order for an idling current of stable magnitude to flow immediately when the amplifier circuit is powered on, without need for preadjustment of circuit elements, an improved third biasing circuit is connected between the bases of the two drive transistors. The third biasing circuit comprises two biasing transistors and a serial circuit of two resistors.

Abstract: A current-to-current impedance converter re-circulates the driver transistor collector current back into the output current path to generate an error current that has two portions including a DC offset portion and a second order in 1/&bgr; portion. Since the error current has no first order in 1/&bgr; portion, the current-to-current ronverter exhbits very low distortion.

Abstract: A class AB amplifier having an output stage comprising complementary common source transistors (T1, T2) has means for setting the quiescent current. These comprise a bias resistor (R1) through which a bias current is passed and which is connected between the gates of transistors (T1 and T2) to set their voltages. The current through the bias resistor (R1) is derived from two reference transistors (T3 and T4) which each have the desired quiescent current passed through them by current sources (3, 5). The gate voltages of the reference transistors (T3, T4) are applied across a reference resistor (R2) and the current through the reference resistor (R2) is mirrored (T5 to T9) to the bias resistor (R1).

Abstract: A push-pull amplifier circuit includes a push-pull output circuit having a P-channel FET 11 and an N-channel FET 10 connected in series between supply potentials VDD and VSS, a gate potential difference circuit 16A having ends OP and ON connected to the gates of the FET 11 and FET 10, respectively, wherein the voltage VPN between OP and ON is adjusted depending on a control signal VG3, an input circuit 17 for changing potentials of OP and ON in response to an input voltage VI while keeping the voltage VPN between OP and ON substantially constant, a constant current source 40 for outputting a reference current IS, and an idle current detecting and comparing circuit 30 for detecting a current proportional to an idle current flowing through the FET 11 and FET 10 and generating a control signal VG3 for the circuit 16A so that the detected current approaches a reference current IS.

Abstract: An output stage of a complementary bipolar operational amplifier includes: a first bipolar transistor 14; a second bipolar transistor 16 coupled to the first bipolar transistor 14; a third bipolar transistor 10; a fourth bipolar transistor 12; a first resistor 42 coupled between a base of the first bipolar transistor 14 and the third bipolar transistor 10; a second resistor 43 coupled between a base of the second bipolar transistor 16 and the fourth bipolar transistor 12; a first current source 26; a second current source 28; a third resistor 40 coupled between the first current source 26 and the third transistor 10; a fourth resistor 41 coupled between the second current source 28 and the fourth transistor 12; a fifth resistor 19 coupled between a base of the third transistor 10 and a common node; a sixth resistor 18 coupled between a base of the fourth transistor 12 and the common node; a first input stage current source 24 coupled to the base of the third transistor 10; and a second input stage current sou

Abstract: In an amplifier with improved, high precision, high speed and low power consumption architecture, comprising an input stage (1), an intermediate stage (2) and an output stage (3), the intermediate stage (2) is provided by combining two complementary class AB operating halves (2a, 2b) which are driven by a complementary input stage, which is, in turn, class AB operating, one of said halves having a low limited current gain (GU), conveniently but not necessarily controlled, and the other one having a high or very high current gain (GD) which can, but not necessarily, be controlled. Suitably the input class AB operating input stage (1) of this amplifier provides two pairs or one pair of antiphase output currents (IR and IL), apt to be used to feed both halves (2a, 2b) of the intermediate stage.

Abstract: An operational amplifier includes a differential amplifier stage having positive and negative input terminals formed by a pair of differential amplifier circuits, a current mirror stage having a pair of current mirror circuits coupled to the differential amplifier stage and producing a common output, and a buffer circuit having a current source connected to the common output of the current mirror stage, wherein the buffer circuit includes a plurality of first input transistors and plurality of second input transistors. The buffer circuit has a diamond arrangement formed of a first output transistor, a second output transistor, at least one of the first input transistors, and at least one of the second input transistors.

Abstract: The present invention teaches a variety of output stages for amplifying high speed signals while keeping distortion low and using a low supply voltage. The invention includes the use of dual complementary signal paths that include a complementary push-pull output stage. Bias circuits are used to keep the paths symmetrical and positive feedback is used to oppose output loading effects.

Abstract: The present invention teaches output stages having distortion performance improved relative to prior art class-AB output stage distortion performance. The general concept is to constantly bias the feed-forward circuitry of the output stage into a low-distortion operating state. This can be done through several different methods, each of which has its own particular circuit requirements. For example, in one embodiment the bias circuitry generates a near constant bias current suitable for forcing the feed-forward circuitry into a low-distortion operating state regardless of the output stage output value.

Abstract: The present invention is directed to a buffer stage for buffering and isolating a signal source from an external load. The stage has a signal input terminal for receiving an input signal from said signal source and a signal output terminal for providing an output signal, corresponding to said input signal, to the external load. The stage comprises an input section including at least two driver transistors each arranged so as to operate with a predetermined bias current. The stage further comprises an output section including at least two output transistors each arranged so as to operate with a predetermined quiescent current, and a voltage source, coupled to the input and output sections and constructed and arranged so as to set the quiescent currents flowing through the output transistors substantially independent of the size of the bias current flowing through the driver transistors.

Abstract: Disclosed is an audio amplifier with a tracking power supply that uses inductive power converters to provide positive and negative amplifier operating potentials of a magnitude that exceeds the DC voltage available to power the amplifier. The tracking power supply includes both a positive-going tracking-up converter and a negative-going tracking-up converter. Each of the tracking-up converters include an inductor, a capacitor, a diode, and a pulse-width modulator. The pulse-width modulator of the positive-going tracking-up converter produces signals representative of the positive amplitude of the audio signal being amplified and the pulse-width modulator of the negative-going tracking-up converter produces signals representative of the negative amplitude of the signal being amplified.

Abstract: A load short-circuit protective circuit device having broad protective operation range and capable of maintaining protective operation until short-circuit of output transistors is released (reset) without using thyristor circuit has an output transistor for generating power amplified signal, detection circuit for detecting a collector current and a collector voltage of the output transistor; and a protective operation circuit for performing protective operation for the output transistor when the current detected by the detection circuit reach predetermined current value and the voltage detected by the detection circuit enters within a set value range.

Abstract: A balanced photoreceiver which includes one or more photodiodes coupled to an amplifier that includes a common base configured input stage which operates over a frequency band from DC to millimeter wave frequencies. In one embodiment of the invention, the amplifier is formed as a three-stage direct coupled amplifier which includes a direct coupled complementary common base configured input stage, a complementary common emitter configured Darlington pair intermediate stage and a complementary common collector configured output stage. The common collector configured output stage is used to recombine the complementary current outputs from the input and intermediate stages. The photoreceiver in accordance with the present invention provides relatively superior output waveform symmetry over an increasing power input.