Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.

Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.

Abstract: A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies.

Abstract: Disclosed here is a TV system with an integrated wireless power transmitter. The wireless power transmitter enables the TV system to provide a power source in the form of pockets of energy. A wireless power receiver may be coupled to the electrical devices to receive an electrical power source and transfer it to the electrical device. The receivers in the devices may capture energy from the pockets of energy formed by the wireless transmitter component in the TV system in order to power an electrical device.

Abstract: In one aspect a system is provided. The system a plurality of flash compare modules to output a set of unordered output signals based on an analog input signal; a plurality of device selection modules that receive the unordered output signals and generate ordered signals representing the analog input; and a temperature and voltage compensation module for receiving one or more of temperature and voltage signals from at least a temperature and voltage sensor module that senses one or more of temperature and voltage values that are used to compensate for changes in output signals caused by changes in one or more of die temperature and core voltage.

Abstract: A system is provided with circuits and methods for dynamically reducing interference to maintain linear system operation and mitigate interference degradation to desired signal components. The system can include a binning subcircuit system configured to divide the digitized input signal into a plurality of spectral bins each having a power level. A power analysis subcircuit can be coupled to the binning subcircuit and configured to compare a collective power level of spectral bins to a threshold level that would produce nonlinear system operation. Based upon the collective power level exceeding the threshold level, outputting a gain control signal to a variable gain amplifier so that the system remains linear. This dynamic gain control can be applied to systems that receive and/or transmit signals. Residual interference components that degrade signal components can be dynamically removed by excision and the distortion introduced by the excision process can be reduced with equalization circuitry.

Abstract: To provide a bandwidth extension method which allows reduction of computation amount in bandwidth extension and suppression of deterioration of quality in the bandwidth to be extended. In the bandwidth extension method: a low frequency bandwidth signal is transformed into a QMF domain to generate a first low frequency QMF spectrum; pitch-shifted signals are generated by applying different shifting factors on the low frequency bandwidth signal; a high frequency QMF spectrum is generated by time-stretching the pitch-shifted signals in the QMF domain; the high frequency QMF spectrum is modified; and the modified high frequency QMF spectrum is combined with the first low frequency QMF spectrum.

Abstract: Disclosed is an amplifier circuit having a single-ended input and differential outputs. The differential outputs are achieved using a first output branch and a second output branch, each including a common source FET (CS-FET) and a common gate FET (CG-FET) connected in series between ground and a corresponding out node connected to a load. An input signal is applied to the CS-FET in the first output branch and an intermediate signal at an intermediate node between the CS-FET and the CG-FET in the first output branch is applied to the CS-FET in the second output branch. The CG-FET in the first output branch and the CS-FET in the second output branch are equal in size such that their transconductances are approximately equal, such that currents in the two output branches are inverted and the outputs at the output nodes of the two output branches are differential outputs.

Abstract: Feedback compensation for multistage amplifiers. In some embodiments, an amplifier can include a first stage, a second stage, and a third stage implemented in series between an input node and an output node. The amplifier can further include a first feedback path implemented between an output of the third stage and a node between the first and second stages, with the first feedback including a first capacitance. The amplifier can further include a second feedback path implemented between the output of the third stage and an output of the second stage. The second feedback pack can include a transconductance element and a second capacitance arranged in series. In some embodiments, such an amplifier can be configured as an operational-amplifier.

Abstract: An apparatus of processing a signal or a biosignal, and a method of processing a signal or a biosignal are provided. The method of processing signal involves receiving a first reference signal having a frequency component of a measurement signal to be applied to a subject, receiving a second reference signal having a frequency component within a frequency bandwidth of an amplifier, and converting a first signal measured from the subject to a second signal within the frequency bandwidth of the amplifier, based on the first reference signal and the second reference signal.

Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.

Abstract: A key fob includes a power amplifier including an output having an output impedance. A radio frequency antenna connected to the power amplifier output represents a first load impedance to the power amplifier output in a space substantially free of interference for radio frequency transmissions, and a second load impedance to the power amplifier output when a hand of a user is capacitively coupled to the antenna. The difference between the second load impedance and the output impedance of the power amplifier is less than the difference between the first load impedance and the output impedance.

Abstract: The present invention provides methods of administering Factor IX; methods of administering chimeric and hybrid polypeptides comprising Factor IX; chimeric and hybrid polypeptides comprising Factor IX; polynucleotides encoding such chimeric and hybrid polypeptides; cells comprising such polynucleotides; and methods of producing such chimeric and hybrid polypeptides using such cells.

Abstract: An imager tile including four-side buttable sub-imager pixel arrays with on-chip digitizing electronic readout circuit. Pixel groupings formed from among the plurality of imagers. Readout electronics including a buffer amplifier for each of the pixel groupings are connected to respective outputs of buttable imagers. Shared analog front ends connect to respective buffer amplifiers of pixel groupings. An analog-to-digital converter at a common centroid location relative to the shared analog front ends includes three data lines—selection input/output line to individually select an output, a clock input line, and a shared digital output line. A pixel output from a respective buffer amplifier is addressable by data provided on the selection input/output line, and the pixel output is provided on the shared digital output line. The I/O lines connected to a programmable logic device where the imager serial data input is output as a massively parallel data stream.

Abstract: An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive.

Abstract: An amplifier arrangement for amplifying an audio input signal AES into an audio output signal AAS, having a conditioning apparatus for converting the audio input signal AES into a conditioned intermediate signal ZS. The conditioning apparatus includes an audio input interface for accepting the audio input signal and a digital data processing device. The amplifier arrangement also includes an amplifier apparatus for amplifying the intermediate signal ZS into the audio output signal AAS and the amplifier apparatus has at least one operating voltage BS. The amplifier arrangement also includes a limiting module for limiting the audio output signal AAS by changing a gain parameter VK.

Abstract: A method of controlling an automatic gain in a receiver includes receiving an input signal through an antenna of the receiver, by an automatic gain control unit of the receiver, setting a final RF gain, and by the automatic gain control unit, setting an IF gain in a state that the final RF gain is set.

Abstract: Consumption current may be reduced in a power amplifier module in which a power supply voltage supplied to a power amplification transistor is controlled according to the level of output power. The power amplifier module includes an amplification transistor supplied with the power supply voltage according to the level of output power to amplify a radio-frequency signal, a bias control circuit for generating a bias voltage according to the power supply voltage, and a bias circuit for supplying a bias current according to the bias voltage to the amplification transistor, wherein current flowing through the amplification transistor when the radio-frequency signal is not input is varied according to the level of output power.

Abstract: A digital pre-distortion arrangement is disclosed. The arrangement comprises a respective filter bank for each of two or more initial signals to be amplified simultaneously by a non-linear power amplifier, N combiners, N pre-distorters and a multiplexer. Each respective filter bank comprises N interrelated filters. Multiplexed impulse responses of the interrelated filters define an overall filter function comprising a pass band associated with a transmission frequency of the initial signal. Each respective filter bank is configured to filter the respective initial signal in each of the interrelated filters to produce N digital filtered signals. The initial signal and each of the digital filtered signals have sample rate R. Each of the combiners is configured to combine corresponding digital filtered signals of each of the two or more initial signals to produce a composite digital signal having sample rate R.

Abstract: A power amplifier includes an amplification transistor which performs power amplification, a bias circuit which outputs a bias voltage to a base of the amplification transistor, a control terminal to which a control voltage is applied for controlling switching between an operating state and a stopping state of the bias circuit, and a bias voltage adjustment circuit connected to the control terminal. The bias voltage adjustment circuit includes a variable capacitance element which is connected to the control terminal and whose capacitance value decreases as the control voltage increases, a discharge circuit which discharges electric charge accumulated in the variable capacitance element to the control terminal, and a control circuit which is connected to the bias circuit and controls the bias voltage. The bias voltage adjustment circuit outputs, to the bias circuit, a bias voltage adjustment signal which increases the bias voltage for a predetermined period after the control voltage is applied.

Abstract: A device includes a load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, the load circuit configured to resonate at a harmonic of the amplified communication signal.

Abstract: An electronic device according to one or more embodiments of the present invention comprises an output line, a current mirror circuit and a comparator. Current signals from a plurality of signal sources are output to the output line. The current mirror circuit is electrically connected to the output line. The comparator is configured to compare a mirrored current signal from the current mirror circuit with a reference current signal. The comparator is configured to output a signal representing a comparison result of amplitudes of the mirrored current signal and the reference current signal.

Abstract: A high-frequency power amplifier includes: a semiconductor substrate; transistor cells separated from each other and located on the semiconductor substrate; and testing electrodes respectively connected to individual transistor cells, wherein an electrical signal and power to individually operate each corresponding transistor cell are supplied to each transistor cell, independently, from outside, using the testing electrodes.

Abstract: A biasing circuit for an acoustic transducer is provided with: a voltage-booster stage, which supplies, on a biasing terminal, a boosted voltage for biasing a first terminal of the acoustic transducer; and filtering elements, set between the biasing terminal and the acoustic transducer, for filtering disturbances on the boosted voltage. The biasing circuit is further provided with switches, which can be actuated so as to connect the first terminal to the biasing terminal of the voltage-booster stage, directly during a start-up step of the biasing circuit, and through the filtering elements at the end of the start-up step.

Abstract: An arrangement and method for converting an input signal z(t) into a mechanical or acoustical output signal p(t) comprising an electro-magnetic transducer using a coil at a fixed position and a moving armature, a sensor, a parameter measurement device and a controller. The parameter measurement device identifies parameter information P of an nonlinear model of the transducer considering and the saturation and the geometry of the magnetic elements. A diagnostic system reveals the physical causes of signal distortion and generates information for optimizing the design and manufacturing process of this transducer. The controller compensates for nonlinear signal distortion, stabilizes the rest position of the armature and protects the transducer against mechanical and thermal overload.

Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.

Abstract: A photoelectric sensor amplifies a received light intensity signal generated through light projection processing and light receiving processing, and performs detection processing using the amplified received light intensity signal. The photoelectric sensor is provided with a variable resistor that generates an adjustment command signal that changes linearly with respect to sensitivity adjustment manipulations performed by a user. Further, the sensor is provided with an amplifier including a variable gain amplifier configured such that the aforementioned adjustment command signal is inputted thereto. Further, the variable gain amplifier is adapted to convert the signal into a gain control signal that changes exponentially with respect to sensitivity adjustment manipulations and, further, is adapted to perform amplification processing using a gain according to the gain control signal.

Abstract: A driving apparatus for an electrode in a capacitive touch control system is provided. The driving apparatus includes a signal generating module and an adjusting module. The signal generating module generates a driving signal. The adjusting module is connected between the signal generating module and the electrode, and generates an adjusted signal according to the driving signal to replace the driving signal. The adjusting module controls a rising edge or a falling edge of the waveform of the adjusted signal, so that a high-frequency component in the adjusted signal is less than that in the driving signal.

Abstract: An automatic gain control apparatus includes: a first counter configured to calculate a first count value that is the number of times when a voltage of an input signal exceeds a first voltage threshold within a predetermined period; a second counter configured to calculate a second count value that is the number of times when the voltage of the input signal drops below a second voltage threshold in the predetermined period; and an over-range detector configured to detect an over-range, based on a comparison result obtained by comparing either one of each of the first count value and the second count value and a calculation result of the first count value and the second count value with a predetermined threshold, and output a detection result.

Abstract: A low noise amplifier is disclosed. The low noise amplifier comprises a current mirror circuit, a bias circuit, a cascode amplifying circuit and a power gain compensating circuit. The current mirror circuit is used for providing a first current and third current. The bias circuit is used for receiving a first current and third current and outputting a first bias voltage and a second bias voltage according to the first current and third current. The cascode amplifying circuit respectively receives the first bias voltage and the second bias voltage, and accordingly to work at an operation bias point. The power gain compensating circuit is used for receiving a RF output signal and accordingly outputs a gain compensating signal to the current mirror circuit so as to dynamically adjust current value of the first current and third current and further to compensates power gain of the low noise amplifier in order to increase 1 dB gain compression point (P1 dB).

Abstract: An amplifier having a switchable common gate gain buffer is disclosed. In an exemplary embodiment, an apparatus includes a plurality of selectable gain channels that provide constant input impedance at a common input to receive an input signal and generate an output signal having at least one of selected gain and current characteristics. At least two gain channels utilize transistors having different transconductance values. The apparatus also includes at least one impedance network coupled to at least one gain channel to provide the constant input impedance.

Abstract: The present disclosure includes programmable stabilization circuits and methods. In one embodiment, a power amplifier in a wireless transmitter includes a transistor comprising a gate, a source, and a drain. Feedback from the drain to the gate is modified dynamically to stabilize the amplifier under changing operating conditions. In one embodiment, a series RC circuit is configured between the drain the gate and the RC circuit value is adjusted based on different power supply voltage modes.

Abstract: A device that incorporates teachings of the present disclosure may include, for example, a controller to provide low loss connectivity to a plurality of coaxial ports over a wide range of frequencies from D.C. to 2 GigaHertz in a coaxial network providing Ethernet networking, detune secondary coaxial splitters in the coaxial network that reduces an output-to-output isolation loss among secondary coaxial splitter output ports, and enable re-distribution of modulated radio frequency video signals from any point on the coaxial network to any alternative point on the coaxial network. Other embodiments are disclosed.

Abstract: A gain controlling system, a sound playback system, and a gain controlling method thereof are disclosed. The gain controlling system includes a main gain control unit, a sub gain control unit, and a logic control unit. The main gain control unit has a first step-by-step adjusting magnitude; the sub gain control unit has a second step-by-step adjusting magnitude; wherein the second step-by-step adjusting magnitude is smaller than the first step-by-step adjusting magnitude. The logic control unit is used for controlling the main and the sub gain control unit to transform an analog signal into a converted signal according to an adjustment command signal and further determining whether an adjusting magnitude required by the adjustment command signal is larger than a maximum gain range of the sub gain control unit. If yes, the logic control unit controls the main control unit and the sub gain control unit repeatedly.

Abstract: Amplifiers with boosted or deboosted source degeneration inductance are disclosed. In an exemplary design, an apparatus includes an amplifier circuit and a feedback circuit. The amplifier circuit receives an input signal and provides an output signal and includes a source degeneration inductor. The feedback circuit is coupled between a node of the amplifier circuit and the source degeneration inductor. The feedback circuit provides feedback to vary an input impedance of an amplifier including the amplifier circuit and the feedback circuit. The feedback circuit may be programmable and may be enabled to provide feedback or disabled to provide no feedback. Alternatively, the feedback circuit may always be enabled to provide feedback. In either case, the feedback circuit may have a variable gain to provide a variable input impedance for the amplifier.

Abstract: A simplified VCA circuit is presented. The VCA of the present invention uses fewer components and is less complex than prior art OTA-based VCAs. Further, the VCA of the present invention has improved total harmonic distortion (THD) and DC offset characteristics as compared to prior art VCAs. The VCA may be used to prevent clipping with the addition of clipping detection circuitry.

Abstract: A variable gain amplifier (100) includes a transistor (110), an FB impedance section (120), a source impedance section (130), a drain impedance section (140), a gain controller (150), and a frequency characteristic controller (160). The gain controller (150) varies impedance of one of the FB impedance section (140), the source impedance section (130), and the drain impedance section (140), and outputs a gain control signal. The frequency characteristic controller (160) varies the impedance of different impedance section, based on the gain control signal.

Abstract: A two-stage RF amplifier is provided. The first stage is a common-emitter transistor arrangement with a purely reactive degeneration impedance and an output impedance with a reactive component matched in frequency response to the degeneration impedance. The second stage is a buffer amplifier. The first amplifier can be designed for high gain which is flat over frequency by virtue of the reactive degeneration impedance. The first amplifier provides input matching, and the buffer provides output matching, with decoupling between the input and output.

Abstract: The electronic circuit is arranged for the fast, automatic gain control of an input amplifier. It includes a non-linear amplifier-comparator for comparing a reference signal (VR) to an amplitude signal (VP) at the output of the input amplifier. The amplifier-comparator performs dual slope adaptation of the input amplifier gain according to a defined deviation threshold between the two input signals. The amplifier-comparator includes two branches each with three transistors connected in series between the terminals of a supply voltage source. First and second polarization transistors (M5, M6) are connected to the first and second input transistors (M1, M2) controlled by the first and second input signals, which are respectively connected to a first diode-connected transistor (M3) and a second transistor (M4) of a current mirror. A non-linear transconductance element (RNL) connects the sources of the input transistors to define a dual slope gain adaptation of the non-linear amplifier-comparator.

Abstract: An amplifier circuit and an operation method thereof are provided. The amplifier circuit includes two stages of amplifiers. When the amplifier circuit is operated in a high gain mode, the two stages of amplifiers are operated normally to provide high gain. When the amplifier circuit is operated in a low gain mode, the second stage of amplifier is turned off, and the first stage of amplifier is coupled to output terminals of the amplifier circuit through signal isolation elements so as to form a single stage of amplifier. Therefore, the amplifier circuit can change the total gain value thereof according to a requirement of gain.

Abstract: An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Abstract: A system and method for modulating the sound pressure that is output from an audio transducer is disclosed. In one embodiment, the method includes receiving an audio signal and placing the audio signal across a voice coil of the transducer. In addition, a voltage is applied across a field coil of the transducer, the field coil being separate from the voice coil. And the voltage that is applied across the field coil is adjusted so as to modulate the sound pressure output from the audio transducer.

Abstract: A tunable wideband distribution circuit for transmitting a wireless signal over a transmission line is disclosed. The tunable wideband distribution circuit may include a programmable gain buffer, wherein the gain of the programmable gain buffer is based at least in part on a frequency of the wireless signal. The tunable wideband distribution circuit may also include a tuning element configured to modify an effective impedance of the transmission line based at least on the frequency of the wireless signal, wherein the tuning element is electrically coupled to the transmission line.

Abstract: An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage. The detection circuit detects disturbances occurring in a first supply voltage and provides detection results. The control amplifier circuit controls a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detection results. The output stage circuit includes a first output power transistor coupled to the control amplifier circuit at the first control node and a second output power transistor coupled to the control amplifier circuit at the second control node. The first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.

Abstract: A power amplifier has power detection capabilities that include a radio frequency (RF) power amplifier that has a gain stage that includes a gain stage input, a gain stage output, and a feedback loop coupled between an input and an output of the power amplifier. A detection circuit has a first detection circuit input electrically coupled to the gain stage input and has a detection circuit output. An amplitude control circuit and a phase control circuit are electrically coupled together in series between the gain stage output and a second detection circuit input. The amplitude control circuit and the phase control circuit produce a signal that is received by the second detection circuit input so that the detection circuit can detect a signal at the detection circuit output that is proportional to a the forward power output of the power amplifier and is insensitive to power amplifier output load mismatch.

Abstract: An apparatus and method is disclosed to compensate for one or more offsets in a communications signal. A communications receiver may carry out an offset adjustment algorithm to compensate for the one or more offsets. An initial search procedure determines one or more signal metric maps for one or more selected offset adjustment corrections from the one or more offset adjustment corrections. The offset adjustment algorithm determines one or more optimal points for one or more selected offset adjustment correction based upon the one or more signal maps. The adaptive offset algorithm adjusts each of the one or more selected offset adjustment corrections to their respective optimal points and/or each of one or more non-selected offset adjustment corrections to a corresponding one of a plurality of possible offset corrections to provide one or more adjusted offset adjustment corrections. A tracking mode procedure optimizes the one or more adjusted offset adjustment corrections.

Abstract: The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier is described. The multi-stage amplifier comprises a first amplification stage configured to provide a stage output voltage at a stage output node. Furthermore, the amplifier comprises an intermediate amplification stage comprising an amplifier current source configured to provide an amplifier current and an amplifier transistor arranged in series with the amplifier current source. A gate of the amplifier transistor is coupled to the stage output node of the first amplification stage. The intermediate amplification stage is configured to provide an amplified or attenuated stage output voltage at a midpoint between the amplifier current source and the amplifier transistor.

Abstract: A digital demodulation circuit amplifies a received signal of an intermediate frequency with a variable gain control amplifier so as to convert it into a baseband signal, which is separated into a common-mode component and an orthogonal component. A first gain control voltage is generated based on the common-mode component and the orthogonal component. Additionally, a temperature correction value is generated by smoothing a pulse-width modulation signal, having a pulse width corresponding to ambient temperature, and by adding a predetermined gain and an offset thereto. A second gain control voltage is generated by adding the temperature correction value to the first gain control voltage. The variable gain control amplifier amplifies a received signal with the second gain control voltage. Thus, it is possible to achieve a temperature compensation function and an automatic gain control function in the digital demodulation circuit with a simple circuit configuration.

Abstract: An RF amplifier includes an input stage, a buffer stage, and an output stage. The input stage is configured to provide attenuation and impedance matching for an input radio frequency (RF) signal by providing shunt and series variable resistance current paths and RF power to RF current conversion. The input stage routes the RF current between the current paths resulting in an attenuation of the RF input current. The buffer stage is configured to provide an intermediate RF current which tracks the current level of the attenuated RF input current, thereby providing isolation between the input and output stages. The output stage is configured to provide RF current to RF power conversion, utilizing the intermediate RF current to provide an RF signal having an RF output power proportional to the RF input power.

Abstract: A programmable gain amplifier includes a sampling circuit, a source follower, a first capacitor and an error amplifier. The sampling circuit is configured to perform correlated double sampling on an input signal using a reference voltage. The first capacitor is connected between the sampling circuit and the source follower. The error amplifier is connected between an input terminal of the source follower and an output terminal of the source follower. The error amplifier is configured to reset a voltage of the output terminal of the source follower to the reference voltage during a source follower reset operation.