Including Current Mirror Amplifier Patents (Class 330/288)
  • Patent number: 6710661
    Abstract: The present invention relates to an amplifier CD including a first and a second transistor T1 and T2, connected in series between a power supply terminal VCC and ground terminal. According to the invention the transfer terminal of the first transistor T1 is connected to the bias terminal of the second transistor T2 and forms an input of the amplifier CD, the bias terminal of the first transistor T1 being connected to a reference potential terminal. An amplifier CD in accordance with the invention has low input impedance and a low common-mode output level.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: March 23, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Fabio Braz, Patrick Leclerc, Lionel Guiraud
  • Patent number: 6680651
    Abstract: A current mirror for providing a large current ratio and a high output impedance even in radio frequency operation and a differential amplifier including the same are provided. The current mirror includes a current source for supplying a reference current, a reference transistor, an output transistor, and a proportional-to-absolute temperature (PTAT) voltage generator. The current source has a first terminal connected to a first reference voltage and a second terminal. The reference transistor has a control electrode, a first current carrying electrode connected to the second terminal of the current source, and a second current carrying electrode connected to a second reference voltage. The output transistor has a control electrode, a first current carrying electrode connected to an output terminal to which a mirrored current flows, and a second current carrying electrode connected to the second reference voltage.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: January 20, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyun-seok Kim
  • Patent number: 6664941
    Abstract: An amplifier circuit including an input stage and an output stage which are cascade-connected between a signal input terminal to which an input signal is input and a signal output terminal to which a capacitive load is connected, and which includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: December 16, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Takeshi Shima
  • Patent number: 6646481
    Abstract: Improved techniques for controlling current flow in an amplifier circuit provide steering of analog outputs of digital to analog converters and a full range of voltage output without necessitating a full range amplifier configuration and can be realized in a small space on an IC chip.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: November 11, 2003
    Assignee: Winbond Electronics Corporation
    Inventors: Tim Blankenship, Stephen Bily
  • Patent number: 6642792
    Abstract: A differential amplifier circuit section (10), which realizes a reduction in power consumption of a signal amplification device, converts an input voltage signal into a current signal and then outputs the signal to a current mirror circuit section (12). Because an input-side current path of the current mirror circuit section (12) does not include a resistor and a current signal is not converted into a current signal at an output terminal (14) of the differential amplifier circuit section (10), a power supply voltage (VDD) can be reduced to the value of product of source-drain voltages of transistors (MP2, MN2, and MN3). The current signal supplied to the input-side current path of the current mirror circuit section (12) is mirrored in the output-side current path and is then converted into a voltage signal through a resistor (RL) disposed in the path to be generated from an output terminal (18).
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: November 4, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Seiji Takeuchi, Tatsuya Takahashi
  • Publication number: 20030201831
    Abstract: A low quiescent power class AB current mirror circuit includes a first input transistor for receiving an input current and a second output transistor for providing an output current; the first and second transistors having bases connected together; and a first current supply for sinking current from the bases in response to a decrease in input current to lower the quiescent point of the transistors.
    Type: Application
    Filed: June 2, 2003
    Publication date: October 30, 2003
    Inventors: David Hall Whitney, Chau Cuong Tran
  • Publication number: 20030189462
    Abstract: A trans-conductance filter circuit with an expanded cut-off frequency range is provided. The cut-off frequency of a trans-conductance filter circuit is changed by varying the current mirror ratio of a current mirror circuit. This mirror ratio is varied by changing the output current of a constant current source, or by switching among the respective action states of multiple transistors the actions of which are invoked within constant current regions. The variable cut-off frequency range can be expanded without losing the constant current attributes of the transistors.
    Type: Application
    Filed: March 6, 2003
    Publication date: October 9, 2003
    Applicant: FUJITSU LIMITED
    Inventor: Kouji Okada
  • Patent number: 6630866
    Abstract: The present invention provides an high beta, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage over conventional methods disclosed is up to &bgr;2 rather than a single beta. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form: &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, speed performance is increased and bandwidth is extended.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: October 7, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Neil Gibson, Marco Corsi, Tobin Hagan
  • Publication number: 20030184386
    Abstract: A low power current feedback amplifier having a lower output impedance input stage is provided. To reduce the output impedance, an input stage comprises a closed-loop input buffer. An exemplary input buffer comprises a closed-loop current feedback amplifier configured within the overall current feedback amplifier, wherein the output of the input buffer corresponds to the inverting node of the overall current feedback amplifier. The closed-loop configuration of the input buffer is facilitated by the use of an internal feedback resistor coupled from an inverting input terminal of the input buffer to the output of the input buffer, which corresponds to the inverting input terminal of the overall current feedback amplifier. The closed-loop input buffer realizes a low output impedance since the loop gain reduces the output impedance of the input buffer. With a lower output impedance, the bandwidth of the current feedback amplifier becomes more independent of the gain, even at low current implementations.
    Type: Application
    Filed: November 27, 2002
    Publication date: October 2, 2003
    Applicant: Texas Instruments Incorporated
    Inventors: Alan L. Varner, Ahmad Dashtestani, Joel M. Halbert, Michael A. Steffes
  • Patent number: 6624701
    Abstract: A current amplifier includes an input branch having a first input; an output branch coupled to said input branch; a bias branch suitable for biasing said input branch. The input branch comprises at least one switch commanded by a first bias voltage supplied by said bias branch so as to substantially block the current flowing in said input branch and consequently substantially block the current flowing in said output branch when the current applied to said first input is null.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: September 23, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventor: Francesco Chrappan Soldavini
  • Patent number: 6617915
    Abstract: A low power wide swing current mirror circuit wherein the signal current is separated from the bias current, and a bias current sink is connected in parallel with a current mirror so as to shunt the bias current to the circuit common.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: September 9, 2003
    Assignee: Zarlink Semiconductor (U.S.) Inc.
    Inventor: Reghu Rajan
  • Patent number: 6617928
    Abstract: The bias control selectively provides for bias of a power amplifier based upon a bandgap voltage generated by the bias control, or by a bias voltage external to the bias control. A controller controls the selection of either the bandgap voltage or external bias voltage. The bias control is fabricated in a first semiconductor material capable of operating at low voltage supply levels, such as complementary metal oxide semiconductor (CMOS) material and may be fabricated on an integrated circuit common with a power amplifier.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: September 9, 2003
    Assignee: Skyworks Solutions, Inc.
    Inventors: Hugh J. Finlay, Mark Bloom, Thomas Fowler
  • Patent number: 6605998
    Abstract: A linear transconductance amplifier which is easily implemented with LSI and superior in a frequency characteristic. The linear transconductance amplifier includes N-channel MOS transistors M1, M2, M3 and M4 having their sources grounded, a current mirror circuit 1 for outputting a constant current 4Ib, and a current mirror circuit 2 in which the ratio between the input current and the output current is 2:1. Gates of the MOS transistors M1 and M3 are connected to each other to constitute an input terminal IN1. The constant current 4Ib is separated into two currents, one of which is the sum ISQ+ of the drain currents ID3 and ID4 of the MOS transistors M3 and M4 and the other of which is the input current ISQ− of the current mirror circuit 2. The sum of the drain current ID1 of the MOS transistor M1 and the output current ISQ−/2 of the current mirror circuit 2 determine the differential output current I+.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: August 12, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Katsuji Kimura
  • Patent number: 6606001
    Abstract: There is disclosed high-speed current-mirror circuitry and methods of operating the same. An exemplary impedance-peaking current mirror comprises a N-channel drive transistor and a N-channel mirror transistor. The N-channel drive transistor has a source coupled to ground, a drain coupled to a current source and a gate coupled to the drain via a series connection of a resistor and an inductor. The N-channel mirror transistor has a source coupled to ground, a gate coupled to the drain of the N-channel drive transistor, and a drain coupled to a positive power supply via an impedance load.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: August 12, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Ramsin M. Ziazadeh, Jitendra Mohan, Devnath Varadarajan, Vjay Ceekala
  • Patent number: 6603358
    Abstract: The integrated circuit includes a power FET for generating an output voltage, a pilot FET for sensing current through the power driving device and generating a reference voltage, and an amplifier circuit for comparing the reference voltage of the pilot device with the output voltage of the power driving device. The amplifier circuit includes a differential pair of matched bipolar junction transistors (BJTs) having a common base. A first BJT of the differential pair being diode-connected. The amplifier circuit controls the gates of the power FET and the pilot FET.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: August 5, 2003
    Assignee: Intersil Americas Inc.
    Inventors: William Shearon, Salomon Vulih, Donald Preslar
  • Patent number: 6590433
    Abstract: A bi-directional buffer includes the capability to turn the current mirror off when the bi-directional buffer is in the receive mode and quickly turn the current mirror on when the bi-directional buffer goes into the transmit mode. This is accomplished in part by a pair of switches included in the current mirror, which are controlled by enable signals. The switches are configured such that the output transistor of the current mirror is turned on when the bi-directional buffer is in the transmit mode, and turned off when the bi-directional buffer is in the receive mode. Further, a pull up circuit may be added to the current mirror to more quickly bring the gate of the output transistor of the current mirror to its conduction threshold voltage.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: July 8, 2003
    Assignee: Agere Systems, Inc.
    Inventors: James T. Clee, Bernard L. Morris, James E. Guziak
  • Patent number: 6587000
    Abstract: Current mirror circuit includes first constant current source, first and second MOS transistors, and first and second operational amplifiers. First constant current source outputs constant current to a first node based on a first reference voltage. First MOS transistor has source grounded, gate connected to the second MOS transistor and drain connected to the first node. Second MOS transistor has source grounded, gate connected to the first MOS transistor and drain connected to a second node. First operational amplifier has first input terminal connected to the first node, second input terminal connected to a third node connected to a second reference voltage and an output terminal connected to the gates of the first and second MOS transistors. Second operational amplifier has first input terminal connected to the third node, second input terminal connected to the second node and output terminal connected through feedback circuit to the second node.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: July 1, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Naoto Oikawa
  • Patent number: 6587001
    Abstract: An electronic circuit device for driving a load comprises a load terminal, a control terminal and a power terminal for connection to a source of electric power. The load terminal may be in an emitter or a source circuit of the circuit device, and connects to a power supply return terminal by means of three electric elements connected in parallel, namely, the capacitance of a load, a bias current supply, and a current bypass. A voltage sensor is connected between the control terminal and the load terminal for sensing a voltage drop developed between the control terminal and the load terminal. The voltage sensor it is operative to activate the bypass to conduct current in parallel with current flow of the current source in the situation wherein the voltage drop exceeds a threshold. Thereby, the circuit device drives the load in one direction, and the current source and the bypass drive the load in the opposite correction.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: July 1, 2003
    Assignee: Raytheon Company
    Inventors: Richard H. Wyles, John L. Vampola
  • Patent number: 6586990
    Abstract: An operational amplifier, which generates an output voltage at an output terminal that is equal to an input voltage, comprises: a differential circuit, which compares the input voltage and the output voltage; first and second output transistors, which are controlled by the output of the differential circuit to drive the output terminal; and an offset cancel circuit, connected with the differential circuit, for storing an offset amount of this differential circuit, wherein, in the offset cancel period in which the offset amount is stored by the offset cancel circuit, the output terminal is driven by the second output transistor, and in the operational amplifier operation period following the offset cancel period, the output terminal is driven by the first output transistor.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: July 1, 2003
    Assignee: Fujitsu Limited
    Inventors: Shinya Udo, Masatoshi Kokubun
  • Patent number: 6573795
    Abstract: A low quiescent power class AB current mirror circuit includes a first input transistor for receiving an input current and a second output transistor for providing an output current; the first and second transistors having bases connected together; and a first current supply for sinking current from the bases in response to a decrease in input current to lower the quiescent point of the transistors.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: June 3, 2003
    Assignee: Analog Devices, Inc.
    Inventors: David Hall Whitney, Chau Cuong Tran
  • Patent number: 6566959
    Abstract: In an amplifying circuit composed of a basic amplifier and a bias circuit thereof, a drive transistor drives a load transistor, and a reference current source biases a drive-side and a load-side supporting bias transistors with a constant current for generating a bias voltage of the load transistor. Also, a load resistor or a drive-side common-gate transistor is inserted between the drive transistor and the load transistor. Also, a load-side common-gate transistor is inserted between the load transistor and a power supply. In addition, the bulks and sources of the load transistor and the load-side supporting bias transistor are short-circuited.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: May 20, 2003
    Assignee: Fujitsu Limited
    Inventors: Satoshi Ide, Norio Ueno
  • Patent number: 6566955
    Abstract: An improved transresistance amplifier for generating an output voltage from an input current includes: a current buffer for shifting a dominant pole associated with the input current to a higher frequency, thereby increasing the bandwidth of the transresistance amplifier; a current amplifier for amplifying the buffered input current, thereby generating a high transresistance for the transresistance amplifier; and an I/V amplifier for converting the buffered and amplified input current into the output voltage. The current amplifier includes a current mirror and a current source that draws current from the mirrored side of the current mirror.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: May 20, 2003
    Assignee: Shenzhen STS Microelectronics Co. Ltd.
    Inventor: Shunbal Tang
  • Patent number: 6556082
    Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: April 29, 2003
    Assignee: EiC Corporation
    Inventors: Nanlei Larry Wang, Sarah Xu, Shuo-Yuan Hsiao
  • Publication number: 20030071688
    Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.
    Type: Application
    Filed: October 12, 2001
    Publication date: April 17, 2003
    Applicant: EiC Corporation
    Inventors: Nanlei Larry Wang, Sarah Xu, Shuo-Yuan Hsiao
  • Publication number: 20030067353
    Abstract: A low voltage current mirror circuit (also referred to as a bias circuit) for establishing a plurality of bias voltages from an input current supplied to an input terminal of the circuit includes an input stage, a current stage connected to the input stage, a feedback stage connected to the current stage, a reference bias stage connected to the feedback stage and the current stage. The circuit establishes first and second bias voltages suitable for biasing current sources of a first type, and third and fourth bias voltages suitable for biasing current sources of a second type complementary to the first type. The bias voltages track the input current over variations in at least one of process, temperature and power supply voltage.
    Type: Application
    Filed: November 6, 2002
    Publication date: April 10, 2003
    Inventor: Lawrence M. Burns
  • Patent number: 6545540
    Abstract: A current mirror circuit incorporates a resistor-capacitor (RC) filter circuit in the base-coupling path of input and output current mirror transistors, to realize a highly integrated low pass filter current mirror architecture, that reduces implementation complexity, and complies with reduced power supply parameters of a subscriber line interface circuit. A filter resistor is connected in series between the bases of the input and output current mirror transistors. A filter capacitor is coupled between the base of the output transistor and the power supply rail. The effect of this low pass filter circuit is such that the output current is equal to the frequency content of the input current below the cut-off frequency as defined by the RC time constant of the filter.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: April 8, 2003
    Assignee: Intersil Americas Inc.
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6538632
    Abstract: To provide thin-film transistor circuits used for a driving circuit that realizes a semiconductor display capable of producing an image with high resolution and high precision without image unevenness. TFTs with small channel widths are used to form an analog buffer which comprises a differential amplifier circuit and a current mirror circuit and which is used in a driving circuit of an active matrix semiconductor display. A plurality of such analog buffer circuits are connected in parallel to secure an analog buffer that has a sufficient current capacity.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: March 25, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6531923
    Abstract: A low voltage current mirror circuit (also referred to as a bias circuit) for establishing a plurality of bias voltages from an input current supplied to an input terminal of the circuit includes an input stage, a current stage connected to the input stage, a feedback stage connected to the current stage, a reference bias stage connected to the feedback stage and the current stage. The circuit establishes first and second bias voltages suitable for biasing current sources of a first type, and third and fourth bias voltages suitable for biasing current sources of a second type complementary to the first type. The bias voltages track the input current over variations in at least one of process, temperature and power supply voltage.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: March 11, 2003
    Assignee: Broadcom Corporation
    Inventor: Lawrence M. Burns
  • Patent number: 6531922
    Abstract: The present invention is directed to advantages discovered in connection with controlling DC current passing between and adversely affecting cascaded current-mode blocks. According to a particular example application, the present invention includes first and second cascaded current-mode circuit blocks, and a circuit-replication and comparison block adapted to replicate the operation and output impedance of the first current-mode circuit block and to replicate the operation and input impedance of the second current-mode circuit block. This replication-comparison block includes a differential comparator adapted to detect and correct for a voltage differential corresponding to current passing from the first current-mode circuit block and the second current-mode circuit block. This approach can result in a number advantages relating to improvements in terms of various operational aspects including, for example, reductions in power consumption.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: March 11, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Abolfazl Khosrowbeygi, Hongyu Li
  • Patent number: 6529079
    Abstract: An improved amplifier circuit is disclosed. In one embodiment, the amplifier circuit includes an amplifier transistor that has a base terminal connected to receive an input signal. The amplifier circuit also includes a reference voltage source that generates a reference voltage at a reference voltage output node. A local bias circuit provides a bias voltage to the base terminal of the amplifier transistor. The local bias circuit includes a first transistor that has an emitter terminal coupled to the reference voltage output node, a collector terminal coupled to a supply voltage node, and a base terminal connected to the collector terminal. The local bias circuit also includes a second transistor that has a base terminal coupled to the base terminal of the first transistor, a collector terminal coupled to the supply voltage node, and an emitter terminal coupled to the base terminal of the amplifier transistor.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: March 4, 2003
    Assignee: TriQuint Semiconductor, Inc.
    Inventors: Thomas R. Apel, Robert E. Knapp
  • Patent number: 6529080
    Abstract: An apparatus comprising an amplifier and a circuit. The amplifier may be configured to amplify an input signal. The circuit may be configured to (i) control the amplifier, (ii) compensate for non-linear characteristics of the amplifier, (iii) increase third-order intercept (TOI) and (iv) increase the output 1 dB compression point (P1 dB).
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: March 4, 2003
    Assignee: Sirenza Microdevices, Inc.
    Inventors: David J. Seymour, Randy L. Cochran, Timothy M. Gittemeier
  • Publication number: 20030030492
    Abstract: A current mirror for providing a large current ratio and a high output impedance even in radio frequency operation and a differential amplifier including the same are provided. The current mirror includes a current source for supplying a reference current, a reference transistor, an output transistor, and a proportional-to-absolute temperature (PTAT) voltage generator. The current source has a first terminal connected to a first reference voltage and a second terminal. The reference transistor has a control electrode, a first current carrying electrode connected to the second terminal of the current source, and a second current carrying electrode connected to a second reference voltage. The output transistor has a control electrode, a first current carrying electrode connected to an output terminal to which a mirrored current flows, and a second current carrying electrode connected to the second reference voltage.
    Type: Application
    Filed: April 26, 2002
    Publication date: February 13, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Hyun-seok Kim
  • Patent number: 6516069
    Abstract: A large-time-constant microphone filter which contains resistance and capacitance as its constituent and can be formed in the same semiconductor chip as a microphone unit is achieved, which results in downsizing and cost reduction of the microphone unit. A transistor of a current mirror circuit is used as a resistance of a microphone filter, utilizing a differential resistance produced by a channel length modulation effect of the transistor or an Early effect. When variations in the drain-source voltage of the transistor occur, the drain-source current of the transistor slightly varies in linear characteristics and the transistor serves a high value of resistance. Being a current mirror circuit, the microphone filter is resistant to characteristic variations due to temperature changes and can be formed in a semiconductor chip without a significant increase in chip area.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: February 4, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takanobu Takeuchi, Toru Araki
  • Patent number: 6515546
    Abstract: A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains die mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: February 4, 2003
    Assignee: Anadigics, Inc.
    Inventor: Henry Z. Liwinski
  • Patent number: 6507246
    Abstract: A circuit is presented which sets the transconductance of a FET using a resistor. The circuit comprises a resistor and first and second FETs series-connected in sequence between a supply voltage and a circuit common point, and third and fourth FETs and a bias current source series-connected in sequence between the supply voltage and the circuit common point. The drain and gate of the fourth FET are connected to the gate of the second FET and the gates of the first and third FETs are cross-coupled to the drains of the third and first FETs, respectively. The bias current source provides a starting current for the circuit. When so arranged, and with the threshold voltages of the first and second FETs matched, the transconductance of the second FET is directly proportional to 1/R1. The circuit can in turn be used to bias other transistors in a reproducible way to fix the transconductance of an amplifier according to the selected resistor value.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: January 14, 2003
    Assignee: Analog Devices, Inc.
    Inventor: A. Paul Brokaw
  • Publication number: 20030006844
    Abstract: The present invention relates to an amplifier CD including a first and a second transistor T1 and T2, connected in series between a power supply terminal VCC and ground terminal. According to the invention the transfer terminal of the first transistor T1 is connected to the bias terminal of the second transistor T2 and forms an input of the amplifier CD, the bias terminal of the first transistor T1 being connected to a reference potential terminal. An amplifier CD in accordance with the invention has low input impedance and a low common-mode output level.
    Type: Application
    Filed: June 3, 2002
    Publication date: January 9, 2003
    Inventors: Fabio Braz, Patrick Leclerc, Lionel Guiraud
  • Patent number: 6492874
    Abstract: An active bias circuit 30 connected to a power amplifier PA maintains a power amplifier DC quiescent current at a fixed value over a wide temperature range. The active bias circuit 30 includes first and second current mirror circuits 32, 34. The power amplifier PA is an element of the second current mirror circuit 34. A temperature compensation circuit 42 is connected to the first current mirror circuit 32 for providing temperature compensation therewith. A first reference voltage source is connected to the first current mirror circuit 32 by way of the temperature compensation circuit 42 for providing a first reference voltage Vref to the first current mirror circuit 32. A current sink 36 is connected to a transistor of the first current mirror circuit 32 and a voltage source adjustment circuit 38 is connected to the first current mirror circuit 32 for setting a voltage provided to the first current mirror circuit 32.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: December 10, 2002
    Assignee: Motorola, Inc.
    Inventor: Chuming David Shih
  • Patent number: 6492869
    Abstract: A linear amplifier comprises a first current-mirror circuit including a first transistor whose base and collector are short-circuited for diode connection and whose collector is connected via a first resistance to a power-supply terminal, a second current-mirror circuit including a second transistor whose collector and base are connected to power-supply terminals, and an amplification transistor whose emitter is grounded. The base of the first transistor and the emitter of the second transistor are connected to the base of the amplification transistor.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: December 10, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuhiko Kuriyama
  • Publication number: 20020180531
    Abstract: A low quiescent power class AB current mirror circuit includes a first input transistor for receiving an input current and a second output transistor for providing an output current; the first and second transistors having bases connected together; and a first current supply for sinking current from the bases in response to a decrease in input current to lower the quiescent point of the transistors.
    Type: Application
    Filed: November 8, 2001
    Publication date: December 5, 2002
    Inventors: David Hall Whitney, Chau Cuong Tran
  • Patent number: 6489849
    Abstract: An interpolator utilizes two ranks of transistors to generate a plurality of interpolator currents within the confines of a low power supply voltage. The first rank of transistors are underdriven, thereby generating a plurality of partially switched currents having shallow Gaussian-shaped functions. The partially switched currents are then spatially amplified by the second rank of transistors to reduce the overlap of the currents from adjacent transistors. The first rank of transistors are driven ratiometrically by the difference of two control currents, thereby eliminating errors caused by inaccurate resistors and current sources. A biasing op-amp senses the interpolator currents and servos the first rank of transistors, thereby regulating the interpolator currents to a value determined by a reference voltage which is temperature compensated. Thus, the biasing op-amp automatically compensates for temperature variations and manufacturing uncertainties in devices throughout the entire interpolator.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: December 3, 2002
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 6486739
    Abstract: A power amplifier circuit comprises an amplifying transistor and a dc bias circuit, which comprises an enhanced Wilson current mirror as a self-bias boosting circuit for biasing the amplifying transistor through a bias resistor. The current source and the bias resistor are configured to make the charging rate faster than the discharging rate. Furthermore, the current source of the enhanced Wilson current mirror dictates the quiescent current of the amplifying transistor. Preferably, the quiescent current may be set as in direct proportion to the current source by scaling the emitter area ratios between transistor pairs.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: November 26, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Sifen Luo
  • Patent number: 6480069
    Abstract: An active load circuit is provided, which is suitable for achieving an operational amplifier circuit, and which may cope with both output current capability and lower consumption current, with less offset, and may be capable of operating at higher speed in case of transient response. The active load circuit is comprised of MOS transistors Tr1 and Tr5 for forming a first current mirror circuit, MOS transistors Tr11 and Tr3 for forming a second current mirror circuit, and resistors R1 and R2. The sources of output transistors Tr5 and Tr11 of respective current mirror circuits are connected to the sources of input transistors Tr3 and Tr1 of the other current mirror circuits and then to the resistors R1 and R2.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: November 12, 2002
    Assignee: Fujitsu Limited
    Inventor: Katsuyuki Yasukouchi
  • Patent number: 6480178
    Abstract: An amplifier circuit comprising an input stage and an output stage which are cascade-connected between a signal input terminal to which an input signal is input and a signal output terminal to which a capacitive load is connected and which includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: November 12, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Takeshi Shima
  • Publication number: 20020135424
    Abstract: A current mirror circuit includes a first constant current source, a first MOS transistor, a second MOS transistor, a first operational amplifier and a second operational amplifier. The first constant current source which outputs a constant current to a first node based on a first reference voltage. The first MOS transistor which has a source grounded, a gate connected to the second MOS transistor and a drain connected to the first node. The second MOS transistor which has a source grounded, a gate connected to the first MOS transistor and a drain connected to a second node. The first operational amplifier which has a first input terminal connected to the first node, a second input terminal connected to a third node which is connected to a second reference voltage and an output terminal connected to the gates of the first and second MOS transistors.
    Type: Application
    Filed: March 22, 2002
    Publication date: September 26, 2002
    Applicant: NEC CORPORATION
    Inventor: Naoto Oikawa
  • Patent number: 6456163
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a bias circuit directly connected to said amplifying transistor. The bias circuit includes a bias transistor having a control terminal and an inductor coupled to the control terminal, and the bias transistor also has an output terminal directly connected to the amplifying transistor. A resistor is connected in series with the inductor, and the series-connected components are connected in the circuit between the control terminal and a power supply terminal. By providing an inductor in the amplifier in this manner, loading effects on the amplifying transistor at high frequencies is substantially reduced.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 24, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Sifen Luo, Tirdad Sowlati
  • Patent number: 6452450
    Abstract: A transconductance amplifier-based, rectifier circuit architecture is configured to programmably provide normal or inverted, half-wave or full-wave rectification of a single ended or differentially derived input signal. The output current produced by commonly connected outputs of current mirror circuits of the transconductance amplifier's output stage from its power supply terminals is coupled through a first pair of opposite polarity rectifier elements to a first pair of rectifier terminals. The current mirrors include additional current mirror outputs coupled to auxiliary current mirror stages, whose outputs are coupled through a second pair of opposite polarity rectifier elements to a second pair of rectifier terminals. Respective ones of the first and second pairs of rectifier terminals are programmably coupled to ground or to a single ended input terminal of an output amplifier stage.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: September 17, 2002
    Assignee: Intersil Americas Inc
    Inventor: Leonel Ernesto Enriquez
  • Patent number: 6452456
    Abstract: A single-ended circuit, such as an LNA (300), in accordance with the present invention includes an input power matching circuit (310) and a bias circuit (305) connected to an output transistor (Qin) which provides the amplification. A degeneration inductance (Le) and load impedance (Lo) couple to the emitter and collector of the output transistor (Qin), respectively. The bias circuit (305) is configured to eliminate base shot-noise of the mirror transistor (Q1) which generates the amplification. The bias circuit (305) in accordance with the present invention also eliminates the noise of the bias resistor (Rx1) that is included within the bias circuit (305). Specifically, the bias circuit (305) includes a current reference source (Iref) and an emitter follower circuit (315) connected to a current mirror circuit (Q1, Q2, Rx2) that connects to a bias resistor(Rx1). This bias circuit (305) can be implemented in a wide-class of single-ended circuits.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: September 17, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Ranjit Gharpurey, Gugliemo Sirna
  • Patent number: 6452453
    Abstract: The constant-current generator comprises a bias transistor whose drain and gate are connected to each other, and an outputting transistor. The threshold voltage of the outputting transistor is smaller than that of the bias transistor. The outputting transistor has the same source voltage and the same gate voltage as those of the bias transistor. Therefore, the gate-to-source voltages of the outputting transistor and the bias transistor are always kept equal. On the other hand, the drain-to-source current of the outputting transistor becomes larger than that of the bias transistor in accordance with the difference between the threshold voltages of the outputting transistor and the bias transistor. Accordingly, the outputting transistor can output a stable drain-to-source current even when the drain voltage of the bias transistor has shifted to lower the gate-to-source voltage thereof.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Shinya Fujioka, Akihiro Funyu
  • Patent number: 6452454
    Abstract: A system is disclosed for improving the operation of a circuit having one or more semiconductor devices as temperature varies over the circuit's typical range of operating temperatures. In an environment of a current mirror, the invention can be used to reduce variation in the reference current as temperature changes. This is particularly desirable at low operating voltages. In one embodiment, the invention is configured as a current compensation module connected to a current mirror regulator node. At normal temperature, the current mirror reference current and the compensation module are configured to provide the desired amount of reference current to the current mirror. At temperatures above normal, the current compensation module automatically conducts more current than at normal temperature. At temperatures below normal, the current compensation module conducts less current than at normal temperature.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: September 17, 2002
    Assignee: Conexant Systems, Inc.
    Inventors: Eric Shawn Shapiro, Shiaw Wen Chang
  • Publication number: 20020125954
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a bias circuit directly connected to said amplifying transistor. The bias circuit includes a bias transistor having a control terminal and an inductor coupled to the control terminal, and the bias transistor also has an output terminal directly connected to the amplifying transistor. A resistor is connected in series with the inductor, and the series-connected components are connected in the circuit between the control terminal and a power supply terminal. By providing an inductor in the amplifier in this manner, loading effects on the amplifying transistor at high frequencies is substantially reduced.
    Type: Application
    Filed: March 8, 2001
    Publication date: September 12, 2002
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Sifen Luo, Tirdad Sowlati