Including Plural Amplifier Channels Patents (Class 330/295)
  • Publication number: 20150017934
    Abstract: An amplifying device of an embodiment includes: a first amplifier amplifying a first component of an input signal; a first output circuit having an input connected to an output of the first amplifier and converting impedance seen from an output of the first output circuit to make the converted impedance seen from the first amplifier; a second amplifier amplifying a second component of the input signal with a bias deeper than that of the first amplifier; a second output circuit having an input connected to an output of the second amplifier, having a longer electrical length than that of the first output circuit part, and converting impedance seen from an output of the second output circuit to make the converted impedance seen from the second amplifier; and a combiner combining the first component amplified by the first amplifier and the second component amplified by the second amplifier.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 15, 2015
    Inventors: Atsushi YAMAOKA, Keiichi Yamaguchi
  • Publication number: 20150008982
    Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 8, 2015
    Applicant: Broadcom Corporation
    Inventors: Kuo-J Huang, Delong Cui, Jun Cao, Afshin Doctor Momtaz, Iuri Mehr, Ramon Alejandro Gomez
  • Publication number: 20150008983
    Abstract: An amplifying apparatus, including an amplitude-phase conversion unit to separate an input signal into first and second signals, wherein a phase difference between the first and second signals depends on an amplitude of the input signal, a first amplifying unit, a first matching circuit including a main line and a first harmonic processing circuit, wherein a length of the line of the first harmonic processing circuit short-circuits a harmonic, a second amplifying unit, a second matching circuit including a main line and a second harmonic processing circuit, wherein a length of the line of the second harmonic processing circuit short-circuits a harmonic, and an output synthesis unit to synthesize outputs from the first and second matching circuits, wherein a distance from the first amplifying unit to the first harmonic processing circuit differs from a distance from the second amplifying unit to the second harmonic processing circuit.
    Type: Application
    Filed: June 30, 2014
    Publication date: January 8, 2015
    Inventors: TORU MANIWA, Shigekazu Kimura, Nobuhisa Aoki
  • Patent number: 8928402
    Abstract: A device including a Doherty amplifier, the Doherty amplifier having an amplifier input and output. At least one main amplifier is coupled to the input via a main input impedance and to the output via a main output impedance and additional amplifiers, each amplifier being coupled to the input via respective additional input impedances. Each additional amplifier has a respective additional amplifier output coupled to a respective pair of additional impedances connected in series and having a respective connection node between them. The device also has a first additional amplifier having their respective additional impedances coupled between its respective output and the amplifier output, the pair of additional impedances having first and second impedances, the first impedance being connected to the respective additional amplifier output and to the connection node, the second impedance being coupled between their respective connection node and the connection node of the previous additional amplifier.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: January 6, 2015
    Assignee: NXP, B.V.
    Inventor: Radjindrepersad Gajadharsing
  • Patent number: 8928413
    Abstract: A method, device and system is disclosed for high efficiency power amplification of a signal over a broad range of output power. Two broad-banded, parallel-tuned class E power amplifiers are combined through a lossless half wave transmission line combiner and configured to operate in an outphased arrangement to permit amplitude modulation. Asymmetrical shunt tuned switches are tuned for efficient amplitude modulation while asymmetrical drain inductors provide enhanced efficiency at outphased conditions over that of a symmetrical circuit. The drain source inductors and transmission components are tuned for maximum efficiency at full power output and for minimum dissipation a zero power output. At zero degrees outphasing, the circuit operates as a conventional Class-E power amplifier. However, at 180 degrees outphasing, each quarterwave line in the combiner reflects back all incident power, permitting the circuit to operate as an unloaded resonant switching circuit.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: January 6, 2015
    Assignee: Rockwell Collins, Inc.
    Inventor: David W. Cripe
  • Patent number: 8928401
    Abstract: Signals are processed to facilitate the mitigation and/or cancellation of undesirable components within the signal. As consistent with one or more embodiments, input/delay circuits offset the phase of an input signal, as presented to respective amplifiers. The phase offset is used, upon combination of the outputs of the respective amplifiers, to cancel the undesirable components of the signal. Such an approach may, for example, involve phase offset in a digital domain, with correction upon combination of the signals as presented in an analog domain.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: January 6, 2015
    Assignee: NXP, B.V.
    Inventors: Jos Verlinden, Remco van de Beek, Massimo Ciacci
  • Publication number: 20150002226
    Abstract: A system and method for a package including a wire bond wall to reduce coupling is presented. The package includes a substrate, and a first circuit on the substrate. The first circuit includes a first electrical device, a second electrical device, and a first wire bond array interconnecting the first electrical device and the second electrical device. The package includes a second circuit on the substrate adjacent to the first circuit, the second circuit includes a second wire bond array interconnecting a third electrical device and a fourth electrical device. The package includes a wire bond wall including a plurality of wire bonds over the substrate between the first circuit and the second circuit. The wire bond wall is configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 1, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Shun Meen Kuo, Margaret Szymanowski, Paul Hart
  • Publication number: 20150002227
    Abstract: A microwave integrated circuit includes a substrate and a power amplifier on the substrate. The power amplifier includes a power divider circuit having an input configured to receive an input RF signal, a base amplifier having an input coupled to a first output of the power divider circuit and a peaking amplifier having an input coupled to a second output of the power divider circuit and an output coupled to an output combining node. The power amplifier further includes an impedance inverter circuit coupling the output of the base amplifier to the output combining node and a load matching circuit having an input coupled to the output combining node and an output configured to be coupled to a load.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Applicant: Cree, Inc.
    Inventors: William Pribble, James Milligan, Simon Wood
  • Publication number: 20150002229
    Abstract: A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals.
    Type: Application
    Filed: April 24, 2014
    Publication date: January 1, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: SHUN MEEN KUO, PAUL R. HART, MARGARET A. SZYMANOWSKI
  • Publication number: 20150002228
    Abstract: An amplifier with improved noise reduction is disclosed. In an exemplary embodiment, an apparatus includes at least one capacitor configured to receive an adjustable current and generate a corresponding ramp voltage configured to control coupling between a main amplifier output and a secondary amplifier output. The apparatus also includes at least one comparator configured to adjust the adjustable current to generate the ramp voltage with selected ramp-up or ramp-down voltage characteristics.
    Type: Application
    Filed: November 12, 2013
    Publication date: January 1, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Wenchang Huang, Vijayakumar Dhanasekaran
  • Publication number: 20150002230
    Abstract: A Doherty amplifier has at least one peaking amplifier which has first and second drain connections, wherein the first drain connection is connected to the output network, and the other second drain connection is connection to the load. By providing two drain connections, separate package leads to the peaking amplifier can be taken into account when designing the impedance inverter and an output impedance. In this way, the circuit operation can be optimised both for the impedance inversion function and for driving the output load.
    Type: Application
    Filed: June 11, 2014
    Publication date: January 1, 2015
    Inventor: Jawad Qureshi
  • Patent number: 8922281
    Abstract: In a power amplifier, in response to a power mode signal at a predetermined level, a first switch circuit supplies a signal to first and second amplifier devices that perform parallel operations. In response to the power mode signal at another level, the first switch circuit supplies a signal to the first amplifier device and stops supplying the signal to the second amplifier device such that the first amplifier device performs a standalone operation. One end of an impedance adjusting circuit is connected to a connection node between the outputs of the first and second amplifier devices, the other end of the impedance adjusting circuit is connected to one end of a second switch circuit, and the other end of the second switch circuit is connected to a ground potential. The impedance adjusting circuit includes a reactance element.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: December 30, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Wataru Takahashi, Toshiki Matsui, Jun Sakatsume
  • Patent number: 8922279
    Abstract: This invention provides a voltage controlled variable gain amplifier circuit that varies its gain linearly and continuously against a gain control voltage VC. The voltage controlled variable gain amplifier circuit includes a first differential amplifier, a second differential amplifier, a gain control voltage/current conversion circuit and a reference current generation circuit. The first differential amplifier and the second differential amplifier are connected in series. The gain control voltage/current conversion circuit converts the gain control voltage VC into a gain control current IC that varies linearly against the gain control voltage VC. Drain currents Id1 and Id2 of first and second differential input transistors vary linearly against the gain control current IC.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 30, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Taichiro Kawai, Takashi Tokano
  • Publication number: 20140375389
    Abstract: Radio frequency (RF) amplification devices are disclosed that include Doherty amplification circuits and methods of operating the same. In one embodiment, a Doherty amplification circuit includes a main carrier RF amplifier, a peaking RF amplifier, and a periodic quadrature coupler. To provide Doherty amplification, the peaking RF amplifier is configured to be deactivated while an RF signal is below a threshold level and is configured to be activated while the RF signal is above the threshold level. The periodic quadrature coupler is configured to combine a first RF split signal from the main carrier RF amplifier and a second RF split signal from the peaking RF amplifier into the RF signal, such that the RF signal is output from an output port while the peaking RF amplifier is activated. The periodic quadrature coupler allows the Doherty amplification circuit to provide broadband amplification in various RF communication bands.
    Type: Application
    Filed: June 25, 2014
    Publication date: December 25, 2014
    Inventors: Hamhee Jeon, Kevin Wesley Kobayashi
  • Patent number: 8917141
    Abstract: An amplifier circuit is disclosed for providing a radio frequency output signal having a variable signal envelope, comprising a main amplifier device and an auxiliary amplifier and a combiner network for combining an output signal from said first amplifier device and a second output signal from said second amplifier device to provide a combined output signal of variable signal envelope to a load, and a signal processing circuit comprising an input and a non-linear processing section to provide at least said second radio frequency output signal with a signal envelope that has a non-linear dependency from an amplitude characteristic of the input signal such that the degree of non-linearity of the non-linear dependency varies dependent on the amount of change per time unit of the amplitude characteristic of the input signal. Further, a method of power amplifying a radio frequency signal having a variable signal envelope is disclosed.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: December 23, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Richard Hellberg, Tony Fonden, Mats Klingberg
  • Patent number: 8917144
    Abstract: A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 23, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhiro Iyomasa, Takayuki Matsuzuka
  • Patent number: 8917145
    Abstract: There is provided an amplifier circuit. The amplifier circuit includes an amplifying unit including at least one transistor; at least one first bias circuit unit including a resistor and connected to the at least one transistor; and at least one second bias circuit unit connected between an input terminal to which an input signal is applied and the at least one transistor so as to block an input signal having a frequency higher than a first frequency or having a frequency lower than a second frequency. The amplifier circuit according to embodiment of the present invention may prevent thermal runaway, remove a harmonic component from an input signal to be amplified and suppress oscillations.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: December 23, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Jean Song, Jun Goo Won, Youn Suk Kim, Shinichi Iizuka, Ju Young Park, Ki Joong Kim
  • Publication number: 20140368275
    Abstract: An amplifier in Doherty configuration includes a circuit (32) having a delay line consisting of a constant-impedance transmission line (12) and a device (10) adapted to vary the electric length of the transmission line (12). The device (10) includes a metallic body (14) with an outer wall (16) and an inner wall (22) adapted to define a cavity (20). The walls (16,22) define a slot (24).
    Type: Application
    Filed: December 7, 2012
    Publication date: December 18, 2014
    Applicant: ONETASTIC S.R.L.
    Inventor: Carlo Bombelli
  • Publication number: 20140368297
    Abstract: Power-dividing and/or power-combining circuits have inputs, outputs, at least three electrical pathways, and at least three electronic devices, such as amplifiers, with substantially equal input and output reflection At least one of the electronic devices is in each of the electrical pathways. In one embodiment, multiple phase shift components, such as delay lines, are electrically connected to the electronic devices in each of the electrical pathways. These phase shift components are selected so that a vector sum of the reflected signals from the electronic devices to the inputs and/or the outputs is substantially minimized. In another embodiment, a serial bus extends from the inputs/outputs and at least three pathways in the circuit.
    Type: Application
    Filed: June 20, 2013
    Publication date: December 18, 2014
    Inventors: Ali M. Darwish, Hingloi Alfred Hung
  • Publication number: 20140368274
    Abstract: An outphasing amplification apparatus includes: a signal decomposition unit for decomposing an input signal into a first signal and a second signal having predetermined amplitude values, respectively; a first amplification element for amplifying the first signal, and output a first amplification signal; a second amplification element for amplifying the second signal, and output a second amplification signal; and a combiner for combining the first amplified signal and the second amplified signal, wherein the combiner includes a first input transmission line having an impedance converter, a second input transmission line not having an impedance converter, and a combination unit configured to combine a signal produced by the first amplification signal passing through the first input transmission line to have been subjected to impedance conversion by the impedance converter, and a signal produced by the second amplification signal passing through the second input transmission line not having been subjected to imp
    Type: Application
    Filed: June 2, 2014
    Publication date: December 18, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Shigekazu Kimura
  • Patent number: 8912865
    Abstract: There are provided a power combiner implemented by a printed circuit board, a power amplifying module having the same, and a signal transceiving module.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: December 16, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ki Joong Kim, Youn Suk Kim, Jun Goo Won, Jae Hyouck Choi, Sang Wook Park, Chul Hwan Yoon
  • Patent number: 8912846
    Abstract: A Doherty amplifier (1) is described which comprises an input terminal (102) for receiving an input signal (101) and an output terminal (103) for providing an amplified signal (104) of the input signal (101). The Doherty amplifier (1) comprises a carrier amplifier stage (300) with a first signal input (311) and a second signal input (312) and a peak amplifier stage (400) with a third signal input (411) and a fourth signal input (421). A signal splitter (200) splits and delays the input signal (101) so that the signal at the first signal input (311) and the signal at the second signal input (321) are 180° apart in phase and that the signal at the third signal input (421) and the fourth signal input (431) are also 180° apart in phase.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: December 16, 2014
    Assignee: Kathrein-Werke KG
    Inventor: Udo Karthaus
  • Patent number: 8912847
    Abstract: A power amplifier circuit (DIPPA), comprising a driver stage (DR) which is applicable to provide a preamplified driver signal (S_DR) dependent on a predetermined transmit signal. The power amplifier circuit (DIPPA) comprises also a frequency selector (DIP) which is electrically coupled to the driver stage (DR) and which is applicable to separate the driver signal (S_DR) into a first and second signal (S—1, S—2). The first signal (S—1) is associated to a first predetermined and the second signal (S—2) is associated to a second predetermined frequency band. The power amplifier circuit (DIPPA) comprises at least a first and second power amplifier stage (PA1, PA2). The first and second power amplifier stage (PA1, PA2) are electrically coupled to the frequency selector (DIP). The first and second power amplifier stage (PA1, PA2) is operable to provide a first and second amplified signal (S_A1, S—2), respectively, dependent on the first and second signal (S—1, S—2), respectively.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: December 16, 2014
    Assignee: Epcos AG
    Inventors: Erwin Spits, Leon C. M. van den Oever
  • Patent number: 8907722
    Abstract: A traveling wave amplifier (TWA) with suppressed jitter is disclosed. The TWA includes a plurality of unit amplifiers with the differential arrangement comprised of a pair of transistors and a cascade transistors connected in series to the switching transistors. The unit amplifiers further includes current sources to provide idle currents to the cascade transistors. Even when the switching transistors fully turn off, the idle currents are provided to the cascade transistors, which set the operating point of the cascade transistor in a region where an increase of the base-emitter resistance is suppressed.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: December 9, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taizo Tatsumi, Keiji Tanaka, Sosaku Sawada
  • Patent number: 8907728
    Abstract: An amplifier including a high supply voltage source and a low supply voltage source and two parallel signal paths. Each signal path is connected to the high and the low supply voltage sources and includes a first amplifier and a second amplifier. The two signal paths are connected to each other only at a common input node and a common output node, so that the respective first amplifiers operate independently of each other. The first amplifiers are configured to convert at least a part of an input voltage signal into a signal current. The signal paths are configured so that the signal current in use drives the respective second amplifier to provide an amplified output current to the common output node.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: December 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Gavin Watkins
  • Publication number: 20140354362
    Abstract: A system and method of calibrating an amplifier are presented. The amplifier has a first amplification path and a second amplification path. A first state of the amplifier is identified defining a first phase shift of the first path and a second phase shift of the second path resulting in a maximum efficiency of the amplifier when an attenuation of the first path and an attenuation of the second path are set to first attenuation values. The attenuation of the first path and the attenuation of the second path is set to achieve a maximum efficiency of the amplifier when the phase shift of the first path and the phase shift of the second path are set according to the first state.
    Type: Application
    Filed: August 20, 2014
    Publication date: December 4, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Abdulrhman M.S. Ahmed, Paul R. Hart, Ramanujam Shinidhi Embar
  • Patent number: 8902000
    Abstract: Disclosed is a signal splitting apparatus useable in a power amplifier having two or more power amplifiers. The apparatus includes a direct gain component; and a derived gain component connected to the direct gain component. The derived gain component derives the derived gain by imposing a constraint which is valid over the entire dynamic range of the input signal, e.g. the sum of the power of the direct split signal and the derived split signal are constrained to be substantially equal to the power of the input signal. The use of combining additional direct gain and derived gain components, as well as a delay element, are disclosed so as to enable n-component splitting that for adaptation to different applications by the use of suitable coefficients.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: December 2, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Chunlong Bai, Bradley John Morris
  • Publication number: 20140347133
    Abstract: A Doherty amplifier has different drain voltages applied to the power transistors of the main and peaking stages. The impedance inverter comprises at least one first series phase shifting element between the output of the main amplifier and the Doherty amplifier output and at least one second series phase shifting element between the output of the peaking amplifier and the Doherty amplifier output. This provides a wideband combiner. The combination of this wideband combiner and different drain drive levels provides an improved combination of efficiency and bandwidth.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventor: Jawad Qureshi
  • Publication number: 20140347134
    Abstract: The present invention provides a new structure of Doherty power amplifier. The present invention reduces use of ¼ wavelength lines and lowers the Q point of the Doherty power amplifier. The present method extends the DPA bandwidth with a simpler and more convenient design and facilitates the design of a narrowed size.
    Type: Application
    Filed: December 12, 2012
    Publication date: November 27, 2014
    Applicant: ALCATEL LUCENT
    Inventors: Yang Yang, Lintao Liu, Xianguang Guo, Kaijie Jin, Zhengde Yang, Qiu Zhong
  • Patent number: 8896374
    Abstract: Exemplary embodiments are directed to devices and methods for sharing an energy storage element within an electronic device. A device may include a plurality of transmit paths. The device may further include a voltage supply including an energy storage element coupled to each transmit path of the plurality of transmit paths.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: November 25, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Roy Howard Davis
  • Patent number: 8896373
    Abstract: The present invention is directed to an amplifier system that includes a main amplifier configured to amplify and a peak amplifier that operates only in a high power mode. An impedance matching network is coupled to at least the peak power amplifier. An impedance transformation device is coupled to at least a portion of the impedance matching network. The impedance transformation device is configured as a balun in the high power mode. The balun includes a first input and second input coupled to the main amplifier and the peak amplifier respectively. The impedance transformation device is configured as an unbalanced line impedance transformer in the low power mode because the predetermined output impedance substantially grounds the second input. The Doherty device is characterized by an impedance transformation ratio of at least 4:1 and a relative bandwidth greater than or equal to 40%.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 25, 2014
    Assignee: Anaren, Inc.
    Inventor: Chong Mei
  • Patent number: 8897730
    Abstract: Embodiments provide a radio frequency (RF) power amplifier (PA) circuit having a high-power mode and a low-power mode. The RF PA circuit may include a high-power amplifier to provide an amplified RF signal on a first path, and a low-power amplifier to provide an amplified RF signal on a second path. The first path and second path may intersect at a junction node. A switch may be coupled between the low-power amplifier and the junction node to switch the circuit between the high-power mode and the low-power mode. A matching circuit may be coupled on the second path to match an output impedance of the low-power amplifier to a junction impedance of the junction node at a fundamental frequency of the RF signal, and to present an open circuit at a third harmonic of the RF signal. The matching circuit may facilitate high efficiency for the RF PA circuit.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: November 25, 2014
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Jun Zhao
  • Patent number: 8896372
    Abstract: A first amplification section and a second amplification section included in an amplification apparatus amplify two constant amplitude signals generated by vector decomposition. An impedance inverting circuit inverts the impedance of the signal amplified by the second amplification section. A combining circuit corrects the phases of the signal amplified by the first amplification section and the signal whose impedance is inverted by the impedance inverting circuit, and combines and outputs these signals. The combining circuit includes a line which is (?/4)+? in length and which is an asymmetrical circuit element and a line which is (?/4)?? in length and which is an asymmetrical circuit element.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: November 25, 2014
    Assignee: Fujitsu Limited
    Inventor: Toru Maniwa
  • Publication number: 20140340157
    Abstract: A power amplifier comprising a plurality of primary amplifying channels arranged to each receive an input signal from one or more signal sources for generating a primary amplified output in each of the plurality of primary amplifying channels, a secondary amplifying channel in communication with the one or more signal sources wherein the secondary amplifying channel is arranged to receive one or more signal components each associated with the input signal received by each of the plurality of primary amplifying channels to form a merged input signal for generating a secondary amplified output, and an electric junction arrangement being in electrical communication with the primary amplified output of each of the primary amplifying channels and the secondary amplified output of the secondary amplifying channel.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Inventors: Quan Xue, Shichang Chen
  • Publication number: 20140341319
    Abstract: There is disclosed an amplifier arrangement comprising a plurality of amplifiers each arranged to amplify one of a plurality of different input signals, the arrangement comprising an envelope tracking modulator for generating a common power supply voltage for the power amplifiers, and further comprising an envelope selector adapted to receive a plurality of signals representing the envelopes of the plurality of input signals, and adapted to generate an output envelope signal representing the one of the plurality of envelopes having the highest level at a particular time instant as the input signal for the envelope tracking modulator.
    Type: Application
    Filed: August 4, 2014
    Publication date: November 20, 2014
    Inventor: Gerard Wimpenny
  • Publication number: 20140342683
    Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.
    Type: Application
    Filed: July 30, 2014
    Publication date: November 20, 2014
    Inventors: Kumiko TAKIKAWA, Satoshi TANAKA, Yoshiyasu TASHIRO
  • Patent number: 8890618
    Abstract: A zero-voltage-switching contour based outphasing power amplifier having two class-E power amplifiers connected in an out-phasing architecture coupled on opposite sides of a load being driven. The pair of class-E power amplifiers receive separate digital drive signals with an amount of phase difference that is adjusted based on the load. Variable capacitor arrays are coupled in parallel on the class-E power amplifiers and controlled in response to system parameters including duty cycle of the input signal. Efficiency of the power amplifier is maintained despite variation in output loading.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: November 18, 2014
    Assignee: The Regents of the University of California
    Inventors: Sudhakar Pamarti, Nitesh Singhal
  • Patent number: 8890615
    Abstract: The output impedance of an amplifier is substantially matched to an input impedance of a receiver using a buffer circuit. The buffer circuit includes a primary transistor and a secondary transistor. A first back gate terminal of the primary transistor is coupled to a second back gate terminal of the secondary transistor and the primary transistor is configured to have an output for the buffer circuit. An input signal is received from the amplifier at a gate terminal of the secondary transistor. The first back gate terminal of the primary transistor is responsively driven independently from the output of the buffer circuit to effectively adjust a transconductance of the primary transistor and substantially match an output impedance of the amplifier with an input impedance of the receiver.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: November 18, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Steven E. Boor
  • Publication number: 20140333383
    Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.
    Type: Application
    Filed: July 22, 2014
    Publication date: November 13, 2014
    Inventor: Peter V. Wright
  • Publication number: 20140327483
    Abstract: An RF power amplifier circuit is disclosed. A driver amplifier stage includes a first set of a plurality of amplifier transistors in a cascode configuration, a driver amplifier stage input, and a driver amplifier stage output. A final amplifier stage includes a second set of a plurality of amplifier transistors in a cascode configuration, a final amplifier stage input connected to the driver amplifier stage output, a final amplifier stage output, and a power supply input. An envelope signal amplifier has an input connectible to an envelope signal source, and an output capacitively coupled to the power supply input. A power converter input is connected to the power supply input to provide supplemental power to the final amplifier stage based on an envelope signal from the envelope signal source that corresponds to an input RF signal.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 6, 2014
    Applicant: RFAXIS, INC.
    Inventor: FLORINEL BALTEANU
  • Publication number: 20140327484
    Abstract: Embodiments of the present invention include a method and system for control of a multiple-input-single output (MISO) device. For example, the method includes partitioning a waveform constellation space into a plurality of regions, where each region of the plurality of regions is associated with one or more control functions of the MISO device. The method also includes transitioning the MISO device between a plurality of classes of operation based on the one or more control functions.
    Type: Application
    Filed: May 13, 2014
    Publication date: November 6, 2014
    Applicant: ParkerVision, Inc.
    Inventors: David F. SORRELLS, Gregory S. RAWLINS
  • Patent number: 8878605
    Abstract: An amplifier circuit includes a digital amplifier configured to amplify an input signal to output a first output signal, an analog amplifier configured to amplify the input signal to output a second output signal, a check circuit configured to produce a check signal responsive to frequencies of the input signal, and a selector circuit configured to select and output one of the first output signal and the second output signal in response to the check signal.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: November 4, 2014
    Assignee: Fujitsu Limited
    Inventors: Huan Shi, Hisanori Murata
  • Publication number: 20140320213
    Abstract: An amplifier circuit is disclosed for providing a radio frequency output signal having a variable signal envelope, comprising a main amplifier device and an auxiliary amplifier and a combiner network for combining an output signal from said first amplifier device and a second output signal from said second amplifier device to provide a combined output signal of variable signal envelope to a load, and a signal processing circuit comprising an input and a non-linear processing section to provide at least said second radio frequency output signal with a signal envelope that has a non-linear dependency from an amplitude characteristic of the input signal such that the degree of non-linearity of the non-linear dependency varies dependent on the amount of change per time unit of the amplitude characteristic of the input signal. Further, a method of power amplifying a radio frequency signal having a variable signal envelope is disclosed.
    Type: Application
    Filed: April 10, 2012
    Publication date: October 30, 2014
    Inventors: Richard Hellberg, Tony Fondén, Mats Klingberg
  • Publication number: 20140320214
    Abstract: A multi-way Doherty power amplifier, DPA, is disclosed, comprising a first path comprising a carrier amplifier or at least one carrier amplifier segment partitioned from the carrier amplifier; a second to N-th paths each comprising at least one carrier amplifier segment and/or at least one peaking amplifier segment partitioned from a peaking amplifier; and a power splitter for splitting an input power signal to each of the at least one carrier amplifier segment and/or at least one peaking amplifier segment in a same path, wherein N is an integer not less than 2; a signal preparation unit configured for generating separately input power signal for the first path and each of the second path to N-th paths; and an impedance inverting network configured for combining output signal power from each path. The performance of each amplifier cell can be maximized independently without any compromises made for each other.
    Type: Application
    Filed: December 15, 2011
    Publication date: October 30, 2014
    Applicant: Telefonaktiebolaget L M Ericsson (Publ)
    Inventor: Linsheng Liu
  • Publication number: 20140312975
    Abstract: A device includes a Doherty amplifier having a main path and a peaking path. The Doherty amplifier includes a main amplifier configured to amplify a signal received from the main path and a peaking amplifier configured to amplify a signal received from the peaking path when the signal received from the peaking path exceeds a predetermined threshold. The device includes a first driver amplifier connected to the main path of the Doherty amplifier. The first driver amplifier is configured to exhibit an amplitude and phase distortion characteristic that is an inverse of an amplitude and phase distortion characteristic of the main amplifier. The device includes a second driver amplifier connected to the peaking path of the Doherty amplifier. The second driver amplifier is configured to exhibit an amplitude and phase distortion characteristic that is an inverse of an amplitude and phase distortion characteristic of the peaking amplifier.
    Type: Application
    Filed: April 23, 2013
    Publication date: October 23, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Srinidhi R. Embar, Abdulrhman M. S Ahmed, Joseph Staudinger
  • Publication number: 20140312988
    Abstract: A Ka-band high power amplifier structure having minimum processing and assembling errors, which uses a technique in which input and output waveguide flanges of individual amplifiers which are connected in parallel are connected to a waveguide divider and a waveguide combiner from above, and uses a waveguide transition patch implemented on an interconnect substrate for coupling to the individual amplifier to avoid the use of an input and output connector pin and an interconnector.
    Type: Application
    Filed: October 4, 2012
    Publication date: October 23, 2014
    Inventor: Moohong Lee
  • Publication number: 20140312976
    Abstract: Apparatus are provided for amplifier systems and related integrated circuits are provided. An exemplary integrated circuit includes a main amplifier arrangement, first impedance matching circuitry coupled between the output of the main amplifier arrangement and a first output of the integrated circuit, a peaking amplifier arrangement, and second impedance matching circuitry coupled between the output of the peaking amplifier arrangement and a second output of the integrated circuit. In one exemplary embodiment, the first impedance matching circuitry and the second impedance matching circuitry have different circuit topologies and different physical topologies.
    Type: Application
    Filed: April 20, 2011
    Publication date: October 23, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Basim H. Noori, Gerard J. Bouisse, Jeffrey K. Jones, Jean-Christophe Nanan, Jaime A. Pla
  • Publication number: 20140312977
    Abstract: Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Inventors: Daniel Lee Kaczman, James Phillip Young
  • Publication number: 20140312978
    Abstract: A high-frequency module includes a wiring substrate including an electrode pattern layer and a via electrode, a plurality of amplifier circuits that are configured to respectively amplify signals in different frequency bands received at the input terminal, and a plurality of matching circuits and a plurality of filter circuits that are provided in correspondence with the respective amplifier circuits and that are connected sequentially to output sides of the respective amplifier circuits. A plurality of signal paths that extend from the output sides of the respective amplifier circuits to the antenna terminal through the corresponding matching circuits and the filter circuits are provided. The electrode pattern layer and the via electrode are grounded and at least one of the electrode pattern layer and the via electrode is arranged between the signal paths.
    Type: Application
    Filed: July 3, 2014
    Publication date: October 23, 2014
    Inventor: Hiroyuki NAGAMORI
  • Publication number: 20140306765
    Abstract: One aspect of the present invention provides a method for improving power amplification efficiency of a Doherty power amplifier. The method is applied to a Doherty power amplifier that has two paths of Doherty circuit units connected in parallel. The method includes: when output power of the Doherty power amplifier is within a low out power range, adjusting, by a bias circuit, gate voltages of main power amplifiers and peak power amplifiers in the two paths of Doherty circuit units connected in parallel, in order to cause the peak power amplifiers to be in an off state, and the main power amplifiers in the two paths of Doherty circuit units connected in parallel to be in a main power amplification state and a peak power amplification state respectively.
    Type: Application
    Filed: May 28, 2014
    Publication date: October 16, 2014
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Xikun ZHANG, Yawen ZHANG, Song LI, Qiao WU, Xuekun LI