Abstract: A relaxation oscillator includes a first capacitor at the terminals of which there is a first voltage V.sub.1, a circuit to charge the first capacitor from a power supply voltage, a circuit to discharge the first capacitor, and a switch which alternately charges and discharges the first capacitor responsive to a control signal. The relaxation oscillator also includes a relaxation circuit to generate the oscillation signal and the control signal from the first voltage. The oscillator also includes a regulation circuit to cause the first voltage applied to the relaxation circuit to be approximately equal to a reference voltage. The circuit for charging the first capacitor includes a resistance R.sub.1. The relaxation oscillator is particularly applicable to phase locked loops.

Abstract: A voltage compensated oscillator circuit having a resistor capacitor (RC) circuit for setting a frequency of oscillation for the oscillator circuit. A switching circuit with hysterisis is coupled to the RC circuit for providing upper and lower threshold limits. The upper and lower threshold limits being used for controlling the direction of switching of the oscillator circuit. By adjusting the upper and lower threshold limits, one may compensate for voltage signal fluctuations so that the frequency of oscillation will not change due to power supply voltage fluctuations.

Abstract: An oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature, and it includes an oscillation generator, two independent current generators, a transition detector and a clock inhibitor. The outputs of the two programmable, independent current generators are combined to provide a capacitor charging current that is independent of temperature. The oscillator is capable of three modes of operation: fast mode, slow/low power mode and sleep mode, which are controlled by the transition detector in response to external control signals. When the transition detector transitions from one mode to another, it controls the clock inhibitor to block a clock output of the oscillator generator for a predetermined number of clock cycles to allow the clock output to stabilize. The oscillator is implemented on a single, monolithic integrated circuit.

Abstract: A voltage-controlled oscillator VCO capable of reliably generating an oscillation even if it, after stopping with electric charges remaining on both of its capacitors, is restarted under the same conditions. Even if the VCO is started with charges remaining on capacitors, N-channel transistors are both turned on because outputs of differential circuits are both at H level. N-channel transistors are both turned off because their gates are connected with the drains of the N-channel transistors. Therefore, in no case, the levels at points C and D as outputs on both sides of latch circuit go to L level at the same time.

Abstract: A precision relaxation oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature. The invention has a oscillation generator and two independent current generators. The outputs of the two programmable, independent current generators are combined to provide a capacitor charging current which is independent of temperature. The precision relaxation oscillator with temperature compensation is implemented on a single, monolithic integrated circuit.

Abstract: In a method of calibration of a voltage controlled oscillator (VCO), the VCO (100) provides an output signal which is used to drive a dividing oscillator (10) such as a relaxation oscillator (RO). The RO has at least two states, one in which the RO provides an output signal which has a first frequency that is related to the VCO output signal by a first ratio (e.g. 1/N) and one in which the relaxation oscillator provides a RO output signal which has a second frequency that is related to the VCO output signal by a second ratio (e.g. 1/(N+1)). By measuring the first and second frequencies (and knowing the relationship between the first and second ratios), the VCO frequency is calculated and stored (110). Several VCO frequencies can be calculated and stored for several applied voltages. As a result the VCO can be driven to any selected frequency in the calibrated range and can be used to provide an injection frequency for a radio.

Abstract: An ultra-low power, fast start fuze oscillator contained in a fast moving projectile which contains a programmable projectile fuze. It is an RC oscillator which uses a low power comparator, three biasing resistors, a timing resistor and a timing capacitor to produce an output frequency as low as 8 kHz with a frequency error of less than .+-.0.1% over a -40.degree. C. to +60.degree. C. temperature range. At the same time, it is capable of surviving a high g environment (30,000 g to 60,000 g) in a reliable manner. Furthermore, the oscillator draws a very low amount of power, using a maximum of about 20 uA of current and has a start-up time limited to a maximum of 1.5 msec. An additional circuit can be connected to the positive supply voltage input of a lower current version of an RC oscillator to jump start the RC oscillator, thereby improving start-up time to 1.5 msec while reducing the current drain to 15 uA.

Abstract: An integrated RC oscillator circuit includes a reference voltage generator, a fine tuner, a charging/discharging oscillator, a frequency counter, and a comparator. The reference voltage generator generates stable reference voltages Vref, Vref 1 to Vref 31, 3/4Vref and 1/2Vref. The fine tuner receives as inputs a reset signal, Vref and Vref 1 to Vref 31 and outputs a reference voltage PVref (0<P<1). The charging/discharging oscillator receives as inputs an enable signal, PVref, Vref, 3/4Vref and 1/2Vref and outputs a square wave signal whose frequency is determined by a resistor, a capacitor and the value of P. The frequency counter receives as inputs the reset signal, a timing reference clock and the square wave signal, it counts the frequency of the square wave signal and outputs the frequency value, and it also outputs a PROGRAM signal to the fine tuner.

Abstract: A precision oscillator includes a capacitor, a charging current source, a discharging current source, a switch for alternatingly connecting the capacitor to the charging current source and the discharging current source, and a hysteretic comparator connected to the capacitor for producing an oscillating signal responsive to charging and discharging the capacitor. The oscillator may also preferably include a duty cycle controller connected to at least one of the charging current source and the discharging current source for setting the charging current and/or the discharging current to thereby set a duty cycle of the oscillating signal by setting a ratio of the charging and discharging currents. The charging current source may have a current setting input for permitting setting of a charging current to the capacitor, and the discharging current source may have a current setting input for permitting setting of a discharging current from the capacitor.

Abstract: There is provided a CR oscillating circuit from which oscillation frequency is obtained as targeted, when MOS capacitors having large voltage dependency are used therein. The circuit is constructed such that bias voltage is applied always to the two MOS capacitors by connecting the two MOS, capacitors in series in the opposite direction from each other and by connecting further a MOSFET.

Abstract: An oscillator circuit is described which produces a periodic oscillator output signal. The frequency of the oscillator output signal is essentially independent of the supply voltage provided to the oscillator circuit. The oscillator circuit includes a capacitor which is periodically charged and discharged. A high trip point inverter and a low trip point inverter detect the voltage level of the capacitor and set and reset, respectively, a flip-flop. The flip-flop produces an output signal which controls the charge and discharge of the capacitor through charging and discharging circuit paths, respectively. The impedance presented by the charging and discharging circuit paths varies as a function of the supply voltage, such that the high and low trip point inverters are switched at a frequency which is essentially independent of the supply voltage magnitude. The oscillator output signal is derived from the flip-flop output signal.

Abstract: A precision oscillator circuit having a wide adjustable operating frequency range and an adjustable duty cycle. The precision oscillator use a window comparator circuit for monitoring a voltage of a capacitive element. The window comparator circuit has a first operating voltage edge and a second operating voltage edge wherein the first operating voltage edge latches an output signal of the window comparator circuit at one level when the voltage of the capacitive element is greater than the first operating voltage edge. The second operating voltage edge brings the output signal of the window comparator circuit back to an initial level when the voltage of the capacitive element is greater than the second operating voltage edge. A precision current reference source is coupled to the capacitive element and to the window comparator circuit. The precision current reference is used for generating currents which are insensitive to temperature, supply voltage, and process variations.

Abstract: A first capacitor is charged by a driving current. A second capacitor is charged by a driving current. A first discharging transistor discharges the first capacitor in accordance with a charged voltage of the second capacitor. A second discharging transistor discharges the second capacitor in accordance with a charged voltage of the first capacitor. The oscillation circuit generates an oscillation signal in accordance with the charged voltages of the first and second capacitors. An oscillation restarting circuit, when the first and second discharging transistors simultaneously perform discharging and thus oscillation stops, causes the discharging of the second discharging transistor to stop, and thereby, restarts the oscillation.

Abstract: A system and method for ensuring a substantially constant oscillator frequency that is substantially independent of the operating temperature and is substantially independent of variations of the supply voltage level where the oscillator is an on-chip oscillator without requiring significantly additional logic, e.g., not requiring the use of multiple comparators and enabling post packaging modifications of the oscillator frequency. The present invention utilizes one or more paired resistors as part of the RC oscillator where each of the one or more pairs are matched according to their temperature coefficient. That is, each pair includes a resistor with a positive temperature coefficient and a resistor with a corresponding negative temperature coefficient. In addition, the present invention enables post packaging modifications to the resistors based upon one or more program signals that can modify the resistance by forming a short circuit around one or more resistor pairs.

Abstract: An oscillation circuit for producing an output whose frequency accords with an input voltage value, comprises a first constant current source whose current has a value according to the input voltage value; a charge capacitor to be charged by the first constant current source; a comparator having one input terminal connected to a charge terminal of the charge capacitor to be charged and an other input terminal supplied with a first reference voltage, for comparing inputs to both input terminals with each other and outputting an output signal having a high level or a low level; and first switch means for pulling down a potential of the charge terminal of the charge capacitor to a second reference voltage lower than the first reference voltage under control by an output of the comparator.

Abstract: An improved oscillator circuit 400 having a frequency that is substantially independent of temperature. The improved oscillator circuit is particularly well suited for use in an integrated circuit device to produce a clock signal, such as a refresh clock for a dynamic random access memory (DRAM) integrated circuit. The current i.sub.c produced is temperature independent so that the refresh frequency for the DRAM integrated circuit is stable over temperature.

Abstract: The frequency of an integrated oscillator is held constant by using temperature compensation to compensate for the component variations due to temperature variations. A voltage controlled oscillator, which has temperature dependent components, is compensated with a temperature dependent control voltage. The frequency of many kinds of oscillators such as a relaxation oscillators and ring oscillators can be held constant when the operating current is held constant. The operating current is often derived from a current source, which is a voltage to current converter with a current equal to the ratio of a control voltage to a resistance. Since semiconductor resistance has a positive temperature coefficient is used to obtain a temperature invariant current source. The positive temperature coefficient is obtained with the difference junction voltage of two forward-biased pn junction voltages. The magnitude can be controlled by junction areas of the two junctions. The magnitude can also be amplified.

Abstract: A pure MOS-implementable oscillator requires no trimming to make the oscillation frequency Vdd independent, but permits trimming to compensate for process and fabrication variations. A current generator creates a core reference current Iosc0, mirrored programmable trim currents, and dynamic reference voltages that do not require a constant Vdd source. A programmable delay unit provides value-programmable capacitors that receive mirrored currents A.times.(M/N).times.Iosc0, where A is a MOS channel W/L ratio constant, and M and N are integers. The currents create ramp-like voltage signals across the capacitors, the slewrate being A.times.(M/N).times.Iosc0/capacitance. A comparator unit compares the ramp-like signals, which ramp-down from Vdd, against a (Vdd-Vt) reference voltage (Vt being a MOS threshold voltage). The comparator unit outputs complementary signals that toggle a set-reset flipflop, whose output is the oscillator output signal.

Abstract: A controllable oscillator having a comparison unit, upstream of whose signal input an impedance converter is connected, and having two current mirror circuits which are provided as current sources and via which the oscillator frequency and the output impedance of the impedance converter are controlled. The range of adjustment of the oscillator frequency is expanded by the controlled output impedance.

Abstract: An oscillator that has a substantially-constant voltage source configured such that it does not require the voltage source to be tuned to a particular voltage to oscillate a particular frequency. The oscillator has greater precision and reliability since the inputs of the comparator are periodically switched to reduce the effects of comparator bias and to equalize the voltage stresses on the inputs of the comparator. Greater precision is also achieved through the use of a discrete resistor and a discrete capacitor to define the frequency of the oscillator. The present invention provides an oscillator and method to generate a periodic signal that is tamperproof because the circuitry that defines the period is either integrated onto the integrated circuit or contained within the package containing the integrated circuit.

Abstract: An oscillation apparatus is provided with a present value generating unit for generating a present value which is monotonously increased or decreased with the passage of time; a threshold value generating unit for generating a threshold of which a value is periodically varied; a comparing and detecting unit for comparing the present value generated in said present value generating unit with the threshold generated in said threshold value generating unit; a present value reset unit for resetting the present value to a predetermined initial value whenever said comparing and detecting unit detects a fact that the present value reached the threshold; and a signal generating unit for generating sequentially signals of which a period is defined by a time interval of timing-to-timing in which said comparing and detecting detects a fact that the present value reached the threshold.

Abstract: A method and system for reducing power consumption in a processor core. A state machine is used to coordinate a frequency from a clock signal generator with a voltage from a voltage regulator which is sufficient to allow operation of the processor at that frequency. Both the clock signal generator and the voltage regulator must be able to generate at least two frequencies or voltages, respectively. A level of processor need is tracked and the lowest frequency/voltage pair that will allow the processor core to satisfy the need is selected. The level of processor need is monitored either periodically or continually such that a new frequency/voltage pair can be dynamically selected as the application mix changes.

Abstract: A microcontroller circuit having firmware selectable oscillator trimming includes, in combination, a microcontroller, an oscillator located within the microcontroller for providing a system clock signal for the microcontroller, and a memory portion for providing trimming data to the oscillator for trimming frequency of the system clock. The microcontroller circuit includes microcontroller logic which has the trimming data stored therein for transfer to the memory portion. Additionally, the microcontroller logic permits the user to alter the trimming data after it has been transferred to the memory portion, thereby permitting the user to alter the amount of modification of the system clock frequency from the amount associated with the trimming data.

Abstract: A current-controlled oscillator with first and second differential comparators (640, 840) serving as inputs, first and second voltage independent multi-layered integrated capacitors (600, 800) corresponding to the first and second comparators (640, 840), and a RS latch (700) for switching operation between the two comparators (640, 840) thereby achieving oscillation. The multi-layered integrated capacitors (600, 800) are designed to provide voltage independent capacitance.

Abstract: An op amp clamp for charging or discharging a capacitor prevents the voltage on the capacitor from going beyond a reference voltage determined by a reference clamp voltage applied to an input of a differential amplifier. The second input of the differential amplifier is connected to the capacitor. The output of the differential amplifier is provided in a feedback loop to the capacitor. The feedback loop includes a charging circuit or a discharging circuit depending upon the function of the op amp clamp. The feedback loop may be arranged with a current mirror in which current generated by the output of the differential amplifier is mirrored in the charging or discharging circuit. A signal to activate charging or discharging is applied at the output of the differential amplifier to activate or deactivate the current mirror.

Abstract: The present invention relates to a system and method for reducing the power consumption of a computer system, more specifically a notebook computer system. The system comprises a programmable frequency generator and a programmable power supply which alters the current operating frequency and voltage of the computer's microprocessor to match current operating conditions. If the microprocessor is not doing any meaningful work, the programmable frequency generator and the programmable power supply can reduce both the operating frequency and voltage thereby lowering the power consumption of the computer system based on the formula: power=voltage.sup.2 .times.frequency. It should be noted that the programmable frequency generator and the programmable power supply may be attached to other system components in the computer system that consume a large amount of the computer system's power.

Abstract: A programmable oscillator comprising a switching circuit, a first driver circuit, and a second driver circuit, the oscillator being programmable to switch at a first switching frequency or a second switching frequency by utilizing only one external capacitor and two external resistors. Only one driver circuit is active at a time to charge and discharge the capacitor at one of the switching frequencies. The driver circuits are made active or inactive by a control circuit.

Abstract: A relatively low frequency oscillator in junction with a much higher frequency oscillator is used to produce a clock that is both accurate and minimizes power consumption. The high frequency oscillator is enabled only during a small portion of the clock's operation and is used to gauge the output of the low frequency oscillator. The output of the high frequency oscillator is counted during its operation period, and the amount counted is accumulated for subsequent time periods. When the accumulated count reaches a predetermined value, a clock output is provided.

Abstract: An oscillator circuit capable of being fully implemented in integrated circuit form and having a first current source for charging a first capacitor so as to produce a time varying voltage which is sensed by a first comparator when the voltage reaches a predetermined threshold level. The circuit further includes a second current source for charging a second capacitor so as to produce a further time varying voltage which is sensed by a second comparator when the voltage reaches the predetermined threshold voltage. The output of first and second comparators are combined so as to produce the output clock signal, with the first cycle segment of the clock having a duration determined by the first comparator output and the second cycle segment of the clock having a duration determined by the second comparator output.

Abstract: An analog oscillator for an integrated circuit operates at low frequency with reduced sensitivity to noise and can be implemented with a capacitor that takes up a small amount of die space. The oscillator charges a capacitor by generating a current with a charge current source and then shunting a portion of the current away from the capacitor with a shunt current source. The current sources are implemented in bipolar transistors which are operated at high current to reduce sensitivity to noise. The capacitor is charged slowly by a small difference current which is equal to the difference between the current from the charge current source and the current from the shunt current source. A Schmitt trigger comparator compares the capacitor voltage to a reference voltage and controls a discharge current source which discharges the capacitor. The current sources include current mirrors and are temperature compensated.

Abstract: A dual-multivibrator circuit using a pair of mutually triggering multivibrator sections is connected to operate in a free-running mode when no external synchronization signal is applied to the circuit input, and in synchronism with a master pulse train of substantially the same pulse repetition rate when such a master pulse train is applied to the circuit input.

Abstract: A voltage controlled oscillator has a linear voltage to current characteristic from ground to the supply voltage. This oscillator includes a voltage to current converter which employs two output current paths. The first output current path includes an N-type MOSFET whose gate receives the input voltage. A level shifter circuit receives the input voltage and provides an output voltage shifted up by an amount equal to the input threshold voltage of an N-type MOSFET. A clamp circuit connected to the output of the level shifter circuit prevents this output voltage from becoming greater than a voltage equal to the sum of the input threshold voltage of an N-type MOSFET and the input threshold voltage of a P-type MOSFET. The gate of the second N-type MOSFET receives the output of the level shifter as clamped by the clamp circuit. A current mirror circuit supplies a current control to ring oscillator, whose frequency depends upon the current. A second embodiment includes a new ring oscillator.

Abstract: An improved timer oscillation circuit capable of synchronizing an oscillation frequency, which is determined by a time constant of a resistance and a capacitance, to a clock signal, which includes a first voltage comparator, controlled by a clock signal, for charging a first voltage on a second capacitance and for outputting a result obtained by comparing the charged voltage on the second capacitance and a voltage from the first capacitance; and a second voltage comparator, controlled by the clock signal, for charging a voltage outputted from the first capacitance on a third capacitance and for outputting a result by comparing the charged voltage and an electric potential of the second voltage, so that it can be advantageously adopted to a digital circuit by outputting an oscillation signal having a cycle determined by a time constant of a resistance and a capacitance and which is synchronized to a clock signal.

Abstract: An accurate integrated oscillator circuit includes a first circuit generating a substantially temperature independent, or a linearly temperature dependent, reference current and a second circuit which is programmable to incrementally increase the reference current to a desired current level. A third circuit includes first and second capacitors and an oscillator output switchable between first and second output levels. The third circuit is responsive to a first charge value on the first capacitor, due to the reference current flowing therethrough, to switch the oscillator output to the first level while resetting the second capacitor to its uncharged state, and to a second charge value on the second capacitor, due to the reference current flowing therethrough, to switch the oscillator output to the second level while resetting the first capacitor to its uncharged state. The oscillator circuit is preferably formed of a single integrated circuit and has an adjustable center frequency.

Abstract: This is an integrated timing circuit which can be formed on a microprocessor chip. The circuit uses an oscillator having a delay line and a variable delay element. The delay line and the delay element vary together to hold the velocity of signal propagation in the circuit substantially constant. The output, of the oscillator is coupled to one input of a comparator circuit. A series of inverter circuits, each of which has a respective variable delay are connected to the input of the oscillator and to a second input of the comparator circuit such that the comparator circuit senses the difference between the output signal of the inverter series and the output signal of the oscillator circuit to provide an error signal proportional to the sensed difference. A feedback loop is provided, to the variable delay means in said oscillator and to the inverter circuits to correct for the sensed difference, to establish a uniform and stable time standard at the output of the oscillator.

Abstract: An accurate RC oscillator circuit located within a microcontroller chip for generating a signal of a predetermined frequency that accurately oscillates between two precise voltage levels, i.e., a low voltage (VL) and a high voltage (VH) is disclosed. The oscillator circuit uses first and second comparators having their outputs respectively coupled to set and reset inputs of a flip flop. The output of the flip flop is coupled to a series RC network for controlling the charging and discharging of the voltage across a capacitor of the RC network. The interconnection of the series RC network is coupled to an input of both the first and second comparators. The other input of the first comparator is coupled to a circuit for applying a modified high threshold version (VH') of the high voltage such that the signal generated by the oscillator circuit does not exceed the precise high voltage (VH).

Abstract: An oscillating circuit including a capacitor, a charge circuitry and a control circuitry. The charge circuitry includes first and second current generators having respectively first and second current values that are opposite in direction and a switching circuit designed to couple alternately the generators to the capacitor. The control circuitry has a voltage input coupled to the capacitor and an output coupled to control inputs of the switching circuit and includes a comparator with hysteresis having a lower threshold and an upper threshold. The difference between the upper threshold and the lower threshold is chosen to be substantially proportional to the ratio of the product to the sum of the two current values such that the oscillation frequency and the duty cycle do not depend on the supply voltage, the temperature and the process.

Abstract: A relaxation oscillator of reduced complexity is described which can be constructed as part of a silicon integrated circuit. The current controlled oscillator includes complementary field effect transistors operating in enhancement mode. The drain of one FET is connected to the gate of the other FET and vice versa. The resulting CMOS circuit functions as a four-layer diode. A resistor is connected between the drains of both transistors. A storage capacitor is connected between the sources of both transistors. A current source is connected to charge the storage capacitor such that the frequency of an oscillator output signal is determined by the current generated by the current source.

Abstract: A voltage controlled oscillator having substantial frequency dependence on a parallel RC timing element including a voltage-variable resistance element, such as a MOSFET biased in the triode region. One terminal of the timing element can be connected to ground. The voltage used to tune the timing element, to lock the voltage controlled oscillator to a reference frequency can be used to control similar timing elements integrated upon the same circuit, for example a continuous-time filter in an ethernet transceiver. The oscillator frequency is substantially independent of variations in supply voltage.

Abstract: A clock overdrive function is provided which advantageously facilitates testing of circuits incorporating timing circuits. The clock overdrive function allows a tester to furnish a clock pulse timing reference to drive a circuit containing a system clock, thereby overdriving the system clock signal. Overdriving of the system clock signal allows precise control of circuit timing. A method of overdriving a system clock signal includes the steps of forming a low reference voltage and a high reference voltage, applying a timing signal having a timing signal voltage at an external pin, comparing the timing signal voltage at the external pin to the low reference voltage and the high reference voltage, driving the circuit with the system clock timing signal when the timing signal voltage at the external pin is less than the low reference voltage and driving the circuit with the timing signal at the external pin, otherwise.

Abstract: A communication circuit system of an IC card etc.

Abstract: In a semiconductor device having a CR oscillation circuit and a reset circuit, the semiconductor device includes a common terminal for constituting the CR oscillation circuit and the reset circuit. A voltage level at which the device falls into a reset state is lower than a low level voltage of an oscillation waveform and the device does not falls into the reset state during oscillation. As a result, the number of terminals of the device can be decreased to permit a larger number of functions to be included in a package having an equal number of pins, and the number of components externally equipped can be decreased to reduce expense of the components and management therefor.

Abstract: There is disclosed a voltage-controlled oscillator circuit capable of being operated at low power supply voltages and accomplishing low electric power consumption. The circuit permits the duty cycle to be controlled well. The circuit is capable of operating at high speeds. The circuit comprises a first and a second dynamic latch circuits producing oscillation output. Each dynamic latch circuit consists of a series combination of a P-channel MOS transistor and an N-channel MOS transistor. An output terminal is connected to the junction of these two transistors. The output from each latch circuit is inverted according to the voltage at the gate of each MOS transistor and dynamically latches the state of the output. This inversion is performed by turning on the MOS transistors by first and second capacitive elements and by first and second comparator circuits. The capacitive elements are charged and discharged by the outputs from the dynamic latch circuits.

Abstract: A pulse width modulation control circuit of the present invention causes variation amplitudes of a sawtooth voltage in a sawtooth oscillator being synchronized by an external signal to be lowered thereby improving characteristics with respect to both a noise and a system control. The pulse width modulation control circuit includes a sawtooth oscillating means for generating a sawtooth voltage after receiving the synchronizing signal, that is, a synchronizing frequency; a sawtooth controller for receiving the sawtooth voltage generated from the sawtooth oscillating means, also receiving a reference voltage with respect to the sawtooth voltage, and outputting a current controlling constantly an amplitude of the sawtooth voltage to the sawtooth oscillating means; and a pulse width modulating means for receiving an output voltage, also receiving a reference voltage with respect to the output voltage, then receiving the sawtooth voltage generated from the sawtooth oscillating means 100, modulating a pulse width.

Abstract: A quadrature oscillator is provided constructed of NOR gates in the manner of a non-linear circuit which is inherently unstable and which cycles sequentially through four distinct states at a rate determined by the constitution of the NOR gates. The quadrature oscillator includes first and second stages that each include first and second NOR gates. The output of the first NOR gate of the first stage is connected as an input to the second NOR gate of each of the first and second stages. The output of the second NOR gate of the first stage is connected as an input to the first NOR gate of each of the first and second stages. The output of the first NOR gate of the second stage is connected as an input to the first NOR gate of the first stage and the second NOR gate of the second stage. The output of the second NOR gate of the second stage is connected as and input to the second NOR gate of the first stage and the first NOR gate of the second stage.

Abstract: An oscillator includes a small on-chip floating capacitor having equal parasitic leakages on each of its two plates. The oscillator is fully differential and, being responsive only to differential signals, ignores common mode parasitic leakages of the capacitor. This feature allows for a minimizing of the size of the capacitor as well as enabling the oscillator to operate on purely DC currents which, in turn, allows the output state of the oscillator to toggle without creating current spikes on the supplies. By eliminating these spikes, the oscillator does not suffer from substrate crosstalk problems and thus may be used in mixed signal applications without perturbing the operation of sensitive analog circuitry.

Abstract: A low power consumption oscillator circuit. The oscillator circuit comprises a capacitor coupled to a first resistor that is capable of delaying discharge of the capacitor. The oscillator circuit further comprises a first inverter coupled to the capacitor and having a first input. The first inverter is capable of applying charge to the capacitor when a first voltage potential on the first input is above a first threshold voltage of the first inverter. The first inverter is capable of removing charge from the capacitor when a second voltage potential on the first input is below a second threshold voltage of the first inverter. The oscillator circuit further comprises threshold detection circuitry having a second circuitry is coupled to the first input of the first inverter, and the second input is coupled to the capacitor.

Abstract: An RC oscillator includes an RC network for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

Abstract: An oscillator for generating a varying amplitude feed forward power factor correction (PFC) modulation ramp signal includes a clock generating circuit and a ramp generating circuit. The PFC ramp signal generated by the ramp generating circuit is used within a power factor correction circuit of a switching mode power converter. The timing capacitor used within the ramp generating circuit is charged from the full wave rectified line input voltage so that the amplitude of the generated ramp output signal will follow the full wave rectified input signal, thereby maintaining the current loop bandwidth at a constant value and improving the transient response of the circuit. A one-shot circuit is coupled between the discharge transistor of the clock generating circuit and the discharge transistor of the ramp generating circuit for synchronizing the clock and ramp reference signals generated by the oscillator so that the frequency of the ramp reference signal is equal to the frequency of the clock signal.

Abstract: A frequency multiplier circuit generates an supplemental high-frequency timing signal from a single, low-frequency current-controlled oscillator (CCO). The current-controlled oscillator (CCO) generates a controlled discharge current and a controlled bias current which are controlled in parallel to substantially eliminate inaccuracies in a characteristic frequency-current curve of the current-controlled oscillator. The frequency multiplier circuit generates a high-frequency timing signal using the digitally-controlled CCO and avoids the usage of a phase-locked loop (PLL) technique. Specifically, a frequency multiplier includes a current-controlled oscillator having a plurality of input lines connected to receive a digital current select signal and having an output terminal connected to carry a timing signal at a current-controlled oscillator frequency f.sub.CCO set in accordance with the current select signal.