Abstract: An oscillator for a power converter control outputs a pulse train based on a charging time of a capacitor linked to a variable current source. A digital to analog converter (DAC) controls the variable current source in conjunction with a switch to determine the charging time of the capacitor. By varying the digital DAC input, the charging time of the capacitor is modified, thereby modifying the frequency of the pulse train. A comparator compares the capacitor voltage to a toggled threshold, which switches depending on whether the capacitor is charging or discharging. The comparator output supplies the pulse train that can be used in a half bridge switching arrangement for the power converter, which can also serve as an electronic ballast for a lamp.

Abstract: An on-chip oscillator generates a substantially temperature-independent clock signal by compensating for temperature-induced changes in its RC time constant and in a range between trigger voltages. A resistor with a positive temperature coefficient determines the range between trigger voltages, which increases with increasing temperature. A comparator response time contributes to a delay period that occurs after a trigger voltage is passed and before the charging or discharging of a capacitor is reversed. After the delay period, a remainder period elapses before another trigger voltage is passed. As temperature increases, the delay period is decreased by increasing a bias current supplied to the comparator. The bias current is programmably adjusted such that the sum of the delay period and the remainder period remains substantially constant over a large temperature range.

Abstract: A frequency generator which can perform stable frequency oscillation unaffected by temperature variation. A frequency generator having a differential amplifier (1) having an LC resonance circuit (10) as a load and buffer circuits (21, 22) feeding back an output of the differential amplifier to its input, wherein a temperature coefficient converter (5) converting an output voltage of a reference voltage generator (4) and its temperature dependence to a voltage having a predetermined voltage and temperature coefficient and outputting it is provided to control bias currents IEF of emitter follower circuits to be in proportion to temperature variation. There are a characteristic in which delay time of the emitter follower circuits constructing the buffer circuits is in inverse proportion to a transconductance of transistors and a characteristic in which the transconductance is in inverse proportion to temperature and is in proportion to the bias currents IEF.

Abstract: An oscillator circuit may include a latch circuit, a feed-back circuit, and an input circuit. The latch circuit may be configured to generate an oscillating output signal responsive to first and second input signals, and the feed-back circuit may be configured to generate first and second complementary feed-back signals responsive to the oscillating output signal from the latch circuit. The input circuit may be configured to generate the first and second input signals responsive to the first and second complementary feed-back signals. Related methods are also discussed.

Abstract: A circuit arrangement for controlling an amplitude of an oscillator signal is accomplished by comparing the oscillator signal to reference signals. The amplitude of the oscillator signal is capable of being adjusted by means of a control signal. The control signal is developed by a regulating circuit that depends upon a comparison result of the oscillator signal with a reference signal such that the amplitude of the oscillator signal adopts a desired value. At least one further reference signal is compared to the oscillator signal and the regulating circuit is adjusted depending on the comparison.

Abstract: A method for producing an oscillating signal comprises: generating an oscillating signal by discharging after charging to a high trigger level and charging after discharging to a low trigger level; and turbo-charging at the initial of a change-over from charging to discharging while resuming a normal charging/discharging thereafter, and vice versa. The present invention makes use of the turbo-charging/discharging for a linear compensation, such that the produced oscillating signal has the features of concurrently eliminating phase noises and jitters as well as maintaining the modulation linearity.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: If a transmission oscillator is incorporated into a communication semiconductor integrated circuit, such as high a frequency IC, constituting a wireless communication system, a problem arises. The accuracy of control of the output power of a power amplifier is degraded. This degradation in accuracy is caused by coupling noise between the output pins of the transmission oscillator and an input pin for detection signals (feedback signals) associated with the output level of the power amplifier or crosstalk. To prevent this, a transmission oscillator of differential output configuration is incorporated into a high frequency IC and an impedance equivalent to the impedance connected with a regular output terminal or a dummy external terminal for outputting transmit signals in opposite phase is provided.

Abstract: An oscillator includes first, second and third inverters (1, 2, 3) connected in series. A feedback path is connected from the output terminal of the third inverter (3) to the input terminal of the first inverter 1 through a resistor (5) while a second feedback path is connected from the output terminal of the second inverter (2) to the input terminal of the first inverter (1) through a capacitor (4). The second feedback path further includes a resistor (6) having a temperature coefficient larger than that of resistor (5) is inserted to adjust the charge/discharge trigger voltage and charge/discharge time of the capacitor (4).

Abstract: A low power oscillator circuit for a self-refresh timer in a memory array is disclosed. When a voltage (V1) of a comparison node (N1) exceeds a first reference voltage (Vref1), a differential amplifier (101) in an oscillator (1) causes a pulse generator (110) to output a pulse. A charge/discharge circuit (105) discharges the comparison node (N1) in response to pulse. In this event, a control circuit (4) disables a first control signal (CT1) to halt operation of the differential amplifier (101). When the voltage (V1) exceeds a second reference voltage (Vref2) equivalent to the sum of threshold voltages of a discharge circuit (43) in consequence of gradually charging the comparison node (N1) by the charge/discharge circuit (105) after it was discharged, the control circuit (4) activates the first control signal (CT1) to operate the differential amplifier (101).

Abstract: An oscillator circuit includes a capacitor device, a current source for supplying a current to the capacitor device, a reference voltage, and a control circuit. The reference voltage is a first input to a comparator. An output of the capacitor device and an output of the current source are a second input to the comparator. The control circuit resets the oscillator circuit when the first and second inputs to the comparator are equal.

Abstract: An oscillation circuit has: a first MOS transistor having a gate connected to a first node and a source connected to the ground; a second MOS transistor having a gate connected to a second node and a source connected to the ground; a current supply circuit supplying a control current; a threshold correction circuit supplying a correction current; and a charge-discharge circuit which supplies a charge current which is a superposition of the control current and the correction current to the first node and the second node alternately in response to potentials of drains of the first and the second MOS transistors. The threshold correction circuit increases the correction current as threshold voltages of the first and the second MOS transistors become large.

Abstract: An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and an output. A second comparator has an inverting input coupled to the RC network, a non-inverting input coupled to a second reference voltage, and an output. A set-reset flip-flop has a set input coupled to the output of the first comparator, a reset input coupled to the output of the second comparator, and an output coupled to the input of the inverter. Differential amplifiers in the comparators each have a diode-connected p-channel MOS transistor controlling a mirrored p-channel MOS transistor whose channel width is less than that of the diode-connected p-channel current mirror transistor.

Abstract: A relaxation oscillator for generating an oscillator output signal having a predetermined frequency. The relaxation oscillator includes an interleaved charge pump for providing a restoring charge to an integrator in response to at least one charge pump control signal. The relaxation oscillator further includes an integrator having an integrator input connected to the current summing node. The integrator is adapted to produce an integrator output signal having the predetermined frequency at an integrator output. A comparator having an input connected to the integrator output is adapted to generate the oscillator output signal having the predetermined frequency in response to the integrator output signal.

Abstract: The present invention discloses a circuit that generates a variable frequency pulse width modulation (VF PWM) signal. Different from the conventional PWM controller, the frequency and duty cycle of the output PWM signal vary with the error-amplified voltage of the feedback loop simultaneously in this invention. The higher the error-amplified voltage of the feedback loop is, the lower the duty cycle with lower frequency will be. A very low duty cycle PWM signal can be generated stably while its frequency is very low.

Abstract: An on-chip oscillator generates a substantially temperature-independent clock signal by compensating for temperature-induced changes in its RC time constant and in a range between trigger voltages. A resistor with a positive temperature coefficient determines the range between trigger voltages, which increases with increasing temperature. A comparator response time is part of a delay period that occurs after a trigger voltage is passed and before the charging or discharging of a capacitor is reversed. After the delay period, a remainder period elapses before the other trigger voltage is passed. As temperature increases, the oscillator increases current supplied to a comparator to decrease the response time. Moreover, as temperature increases, the oscillator increases a charge/discharge current so that the capacitor charges and discharges faster as the range between trigger voltages increases.

Abstract: An oscillation circuit capable of outputting an oscillation signal of constant frequency free from the influence of source voltage, temperature, and nonuniformity and fluctuation in inverter threshold voltage. An inverter inverts a voltage applied to one end of a capacitive element and outputs the inverted voltage to transistors and an inverter. A constant voltage source outputs a constant voltage free from the influence of source voltage and temperature. The transistors connect the other end of the capacitive element to the constant voltage source or ground in accordance with the voltage output from the first-mentioned inverter. A constant current source causes a constant current free from the influence of the source voltage and temperature to flow into or out of the one end of the capacitive element in accordance with the voltage from the second-mentioned inverter connected to the first-mentioned inverter.

Abstract: A dual range oscillator provides two different ranges of oscillator frequency output based on switched current sources charging a capacitor. As several current sources are combined to charge capacitor, the interval for charging the capacitor decreases and changes the oscillator frequency output accordingly. A reference voltage supplied to a comparator checks the voltage on the capacitor to determine when to combine current sources to charge the capacitor and modify the timing interval and the corresponding oscillator frequency output. The different current sources are switched to the capacitor to provide modified charging slopes. The dual slope, dual range oscillator permits frequency switching operation in a variety of environments and applications with a simplified control and integration into a single chip.

Abstract: A relaxation oscillator circuit is configured to provide an output signal. The relaxation oscillator circuit includes two capacitors that are alternatively charged and discharged. Each capacitor is charged by a separate current that is provided by mirroring a reference current. The reference current for the current mirror may be provided by a bias circuit such that the reference current may vary significantly over temperature and supply voltage. Also, the reference current is mirrored to a resistor to provide the reference voltage. The resistor has a temperature coefficient that is substantially zero. Accordingly, the output signal is relatively independent of temperature and supply voltage, even though the reference current and the reference voltage may vary significantly over temperature and supply voltage.

Abstract: An oscillator includes a comparison voltage generating circuit, a comparing circuit and a clock switching circuit. The comparison voltage generating circuit is driven by a power source voltage, and generates comparison voltages that change in response to clock signals which have a frequency that varies in inverse proportion to the power source voltage and a first reference voltage. The comparing circuit compares levels of the comparison voltages to a second reference voltage and outputs logic signals having logic levels as a result of the comparison. The clock switching circuit outputs the clock signals which have a frequency that varies in inverse proportion to the power source voltage, in response to the logic signals.

Abstract: A time base circuit, for an oscillator and apparatus, defines a time interval in terms of a time taken for a capacitor to charge from a reference voltage level to a detection voltage level. The circuit operates by: supplying at the start of the interval a capacitor charging current, using a first semiconductor device supplied from a first power supply voltage, the device delivering the charging current according to a predetermined dependency on the first power supply voltage; and identifying the detection voltage level to signal the end of the time interval, using a second semiconductor device supplied from the first power supply voltage, the second semiconductor device identifying the detection voltage level value according to the same predetermined dependency on the first power supply voltage as for the first semiconductor device, the time interval being made substantially independent of variations of the first power supply voltage.

Abstract: A programmable oscillator comprises a capacitor; a current generator couplable to said capacitor that generates a charging current of said capacitor; further comprising at least one resistance coupled to said capacitor; a comparator coupled to said capacitor for comparing a voltage at the terminals of said capacitor with a prefixed reference voltage and for generating an output signal; a first switch, controlled by said output signal, coupled to said capacitor that creates a current path able to facilitate the discharging of said capacitor.

Abstract: A microcontroller having a dual mode relax oscillator that is trimmable. In one embodiment, the present invention provides a relaxation oscillator circuit comprising two current sources for establishing a reference voltage for use in causing the relaxation oscillator circuit to operate in two power modes, and a control coupled to both current sources for switching between power modes. In one embodiment, one power mode is a low power mode for standard operation of the microcontroller and one power mode is a very low power mode for use in a sleep mode. In one embodiment, the relaxation oscillator circuit further comprises digitally trimmable components operable to control a current charging a capacitor of the relaxation oscillator circuit to account for process variation in the capacitor, wherein the current is for controlling a frequency of the microcontroller.

Abstract: Provided is a self refresh oscillator which includes a plurality of inverters serially connected between an input terminal and an output terminal; a pull up driver for charging a first node in accordance with a level of the output terminal; a comparator for comparing a potential of the first node with a reference voltage and outputting the result to the input terminal; and a period adjusting unit for operating based on a level of the output terminal and adjusting an amount of current discharged into a ground of the first node in accordance with a temperature.

Abstract: Temperature-stabilized oscillator circuit A temperature-stabilized oscillator circuit (1) comprises a first part with a first temperature dependence and a second part with a second temperature dependence, which is different from the first temperature dependence. A charge storage device (C2), a controllable upward-integration current source (T2) for charging the charge storage device (C2), a controllable downward-integration current source (TB3) for discharging the charge storage device (C2) and two resistors (R2, R1) having the same temperature coefficients are contained in each case in one of the two parts.

Abstract: The method and the device thereof for dynamically calibrating a frequency is provided. The method includes steps of: (a) providing a first system frequency; (b) obtaining a first parameter of timer counting number; (c) providing a second system frequency; (d) obtaining a second parameter of timer counting number if there is a frequency drift between said first system frequency and said second system frequency; (e) obtaining a third parameter of timer interrupt interval by comparing said first parameter of timer counting number with said second parameter of timer counting number; and (f) calibrating a frequency output according to said third parameter of timer interrupt interval.

Abstract: A variable-frequency oscillator (10) is formed to change an internal delay of the oscillator inversely proportional to changes in the frequency of the oscillator.

Abstract: A system and method for designing an integrated relaxation oscillator that exhibits reduced change in the frequency of oscillation caused by process variation. Improved sensitivity to component variation due to process shift is achieved through using more than one structure type when implementing the resistors affecting the RC time constant and threshold (trip point) voltages of the oscillator. Structure types are related to the fabrication process and for a CMOS process include, but are not limited to n-diffusion, p-diffusion, n-well, p-well, pinched n-well, pinched p-well, poly-silicon and metal. Each structure type exhibits statistically independent process variations, allowing for application of Lyapunov's extension of the Central Limit Theorem for statistically uncorrelated events to desensitize the effect from different possible causes. Thus, improvement in the performance of the oscillator may be achieved with a reduced trim requirement and without using external precision resistors.

Abstract: An oscillator has timing characteristics that are determined by resistor and capacitor values. The circuit comprises an astable multivibrator and a current reference. The multivibrator comprises a first and a second timing capacitor. The multivibrator is configured to produce an oscillating output signal in response to charging and discharging the first and the second timing capacitors. The current reference is configured to control the rate of change of charge of the first and second timing capacitors. The current reference is determined in part by the resistor values.

Abstract: A high-voltage oscillator including a first normally-on switch in series with a resonant circuit, a second normally-on switch in parallel with the resonant circuit, and a control circuit preventing the simultaneous conduction of the two switches.

Abstract: A CR oscillation circuit includes an oscillation unit having first through third invertion circuits connected in series between a first node and a second node, a capacitance element provided between the first node and an output terminal of the second inverting circuit, and a switch part for electrically connecting the first and second nodes according to a level of a control voltage; a constant current unit for allowing a constant current to flow according to a resistance value of an externally-provided resistive element to thereby supply a constant voltage; and a level conversion unit for converting a level of the constant voltage to thereby produce the control voltage.

Abstract: An oscillator circuit is described comprising of a capacitor; a capacitor charging means arranged to supply a current to charge the capacitor to a first predetermined threshold voltage; a capacitor discharging means arranged to discharge the capacitor to a second predetermined threshold voltage; and a switching means arranged to switch between a capacitor discharging mode and a capacitor charging mode. The switching means is responsive to the capacitor reaching at least one of said threshold voltages. Furthermore at least one threshold voltage is determined by a threshold setting means, which provides a voltage threshold that varies to compensate for changes in temperature.

Abstract: In a chattering eliminating apparatus, a coincidence circuit receives an input signal of the apparatus and an output signal of the apparatus to determine whether or not a level of the input signal of the apparatus is the same as a level of the output signal of the apparatus. An oscillation circuit carries out an oscillation operation only when the level of the input signal of the apparatus is not the same as the level of the output signal of the apparatus. A counter counts an output signal of the oscillation circuit, and is reset when the level of the input signal of the apparatus is the same as the level of the output signal of the apparatus. An output signal generating circuit inverts the level of the output signal of the apparatus when a counter value of the counter reaches a predetermined value.

Abstract: An oscillator circuit having a charge storage device, an upward integration current source, and a downward integration current source is described. The charge storage device is also connected to a comparator in order to drive the current sources as a function of a lower comparator threshold and an upper comparator threshold. In consequence, a triangular waveform voltage is formed across the charge storage device, on the basis of the relaxation principle. The difference voltage from the two comparator thresholds is dropped across a first resistor. Since the comparator itself as well as the lower and upper current thresholds are formed in a common current path, this oscillator circuit has a particularly low current draw.

Abstract: The invention relates to an electric circuit for generating a periodic signal comprising: a capacitor device which has a first terminal and a second terminal; a signal node that is connected, via a first signal having a first period is applied; a discharging device that is connected, via a third switching device, to the first terminal and, via a fourth switching device, to the second terminal, whereby the second terminal, via a fifth switching device, and the first terminal, via a sixth switching device, are connected to a first reference potential; and comprising a clock pulse generating device for receiving the first signal and for generating a first switch clock pulse, a second switch clock pulse, and the periodic signal. The first and the second switch clock pulse do not overlap and are inverse with regard to one another.

Abstract: An oscillator includes a comparator and a variable voltage element. The comparator has a first input set to a reference voltage, a second input, and an output configured to produce an output voltage as a function of the voltages at the first and second inputs. The variable voltage element delivers to the second input a second voltage that is a function of a switched current. The switched current is a function of the reference voltage.

Abstract: Single line synchronization enables two or more oscillators to be synchronized with each other by using only a single control line. The synchronization can be accomplished without any external components. A single external component can be used to lower the frequency of an oscillator as in a master/slave-synchronized system. The use of the single control line (which can be embodied using a single integrated circuit pin) reduces the die area in which synchronization circuitry is situated. The single pin interface and reduced die area are advantageous for many applications that require small packages with a limited number of pins.

Abstract: An improved oscillator system has a control logic block which has an input from an external device to which clock is being provided. The input controls a counter which counts cycles from the oscillator. If some predetermined number of cycles has passed in the absence of a predetermined input condition, then the oscillator halts, thus reducing power consumption by the oscillator system. Later, upon the predetermined input condition, the oscillator resumes oscillation. The system has improved noise immunity and permits a continuous-oscillation mode without the need of an extra pin or memory bit. The control logic block may also employ a counter which counts the number of times the predetermined input condition has occurred, and only after some predetermined number of occurrences does the oscillator-halting activity take place.

Abstract: An oscillator circuit (40, 60) has a comparator circuit (48, 68) and a monitor and control circuit (50, 80). The comparator (48, 68) provides a periodic output signal. The monitor and control circuit (50, 80) controls the voltage swing of the periodic output voltage in response to monitoring a periodic input voltage. A capacitor (52, 90) is coupled between the output terminal of the monitor and control circuit (50, 80) and input terminal of the comparator (48, 68) and is sized to set the oscillation frequency. The monitor and control circuit (50, 80) functions to limit the input voltage excursions without using an attenuation capacitor (16). Eliminating the attenuation capacitor (16) provides a smaller oscillator circuit having reduced power supply current spikes and which is easier to implement.

Abstract: An oscillator having a modulation function capable of controlling a frequency by adding a signal to a control signal and a PLL circuit using the same, wherein the oscillator forms a ring comprised of a plurality of cascade connected delay stages controlled in delay value by an inverter or a buffer and a control signal and forming a closed loop by an inverted phase and comprises a modulation function modulating an oscillation frequency by adding a modulation signal to the control signal in a part of the plurality of delay stages.

Abstract: A quadrature coupled controlled oscillator comprising a first and a second circuit module, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103). The first circuit module is coupled with the second circuit module and the second circuit module is cross coupled with the first circuit module. Each of the circuit modules (100 and 100′) comprises a first and a second Voltage Controlled Current Source (101) (VCCS). In each of the circuit modules, each VCCS is coupled to a phase shifter (102) for shifting the phase of a current (110) supplied by the VCCS to a resonator (104) included in that circuit module. A communication arrangement (300) for communicating via a bi-directional communication channel (304), comprises an oscillator (303) as described above for generating a periodic signal. A receiving module (301) generates an output signal from the periodic signal and a receiving signal received from the channel (304).

Abstract: A circuit is shown which outputs a pulse width having a duty cycle of less than 50% and the circuit having an oscillator providing a desired repetition rate controlled by a changing RC time constant.

Abstract: A method of forming a power supply timing controller circuit (10, 80, 90) includes forming a bi-directional synchronization oscillator controller (11, 81, 91) to oscillate at an internal frequency. The bi-directional synchronization oscillator controller (11, 81, 91) receives an external sync signal, suspends the oscillation, begins operating at the forced frequency of the external sync signal, and begins a delay period. If another external sync signal is not received before the end of the delay period, the controller resets and once again begins oscillating at the internal frequency.

Abstract: A relaxation current controlled oscillator (CCO) is provided by forming an integrator out of a transconductance amplifier and a capacitor. The output of the integrator is fed to comparators which in turn feed a bistable circuit. The outputs of the bistable circuit control either the polarity of the input signals to the transconductance amplifier or the polarity of the input signals to the comparators. Switches, controlled by the bistable circuit, in turn control the polarity of the input signals. The feedback path created by the transconductance amplifier, comparators, flip-flops, and switches produces continuous oscillations. A DC current input adjusts the gm of the transconductance amplifier allowing the oscillation frequency of the CCO to be adjusted. Several embodiments of CCOs are described which are fully compatible with PLLs with automatic time-constant or bandwidth tuning of a gm-C filter.

Abstract: An improved relaxation oscillator circuit is provided using conventional CMOS device shunted with a current source (101 and 103) at each load of two cross-coupled gain stages. The improved oscillator uses a clamp voltage reference (134), to control the voltage swing across the charging/discharging capacitor (118). The improvements provide improved speed to power ratio, increased frequency tuning range, and less process and temperature variation effects. A transistor (130) and current source (138) replicate output transistors (110, 114) and current sources (101, 103). An amplifier (132) receives a clamp voltage reference (134) and current from the transistor (130) and current source (138) and functions to provide necessary drive currents to the gates of transistors (110, 114) which drive the outputs (VOR, VOL).

Abstract: There is disclosed a differential oscillator circuit including first (10) and second (20) branches each including the series arrangement, between high (VDD) and low (VSS) supply potentials, of a first transistor (4, 5), a first current source (2, 3) and resistor means (8, 9, 18, 19; 18*, 19*). The first transistors are interconnected so as to form a crossed pair of transistors, the most positive current terminal of each transistor (on the “drain” side) being connected to the control terminal of the other transistor of the crossed pair. This differential oscillator circuit further includes an electro-mechanical resonator (6) connected to the crossed transistor pair on the “drain” side, as well as a capacitive element (7) connected to the crossed transistor pair on the “source” side. Advantageously, for high frequency applications, the electro-mechanical resonator can be of the bulk acoustic wave type.

Abstract: Frequency translation and applications of same are described herein, including frequency synthesizers that employ universal frequency translation technology. The universal frequency translation technology includes a device for switching, a device for storing, and an energy transfer signal for controlling the switching device. The energy transfer signal may include pulses having apertures sufficiently wide to effect substantial energy transfer.

Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.

Abstract: An adjustable oscillating frequency function generator. The oscillating frequency of the function generator can be adjusted externally. The oscillation frequency is independent of the magnitude of the voltage source. Therefore, a pulse signal that withstands the voltage source signal can be provided.

Abstract: An apparatus comprising a first oscillator, a second oscillator and a logic circuit. The first oscillator circuit may be configured to generate a first clock signal. The second oscillator circuit may be configured to generate a second clock signal. The logic circuit may be configured to generate an output clock signal by selecting either the first clock signal or the second clock signal.