Plural Channel Systems Patents (Class 333/1)
  • Patent number: 10172231
    Abstract: Systems, methods, and apparatus for reducing crossover coupling of two or more RF signals are described. In one case, a crossover structure is described where RF signals are routed through coplanar waveguides having a specific characteristic impedance and crossing at a central point of the crossover structure by way of a bridge. A ground shield having a geometry adapted to reduce the crossover coupling while minimally affecting capacitive coupling between the RF signals and the ground shield is introduced in-between a region comprising the central point. Further described is a multi-port rotary RF switch fitted with the crossover structure which allows substantially balanced electrical performance across all the operational states of the rotary RF switch at RF signal frequencies up to 40 GHz and beyond.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: January 1, 2019
    Assignee: pSemi Corporation
    Inventors: Gregory Louis Horvath, Peter Bacon
  • Patent number: 10164310
    Abstract: A first signal line is closer to a second ground conductor than a second signal line and, hence, crosstalk between the first and second signal lines is unlikely to be generated. By providing first opening portions in the second ground conductor, capacitive coupling between the first and second signal lines is reduced. Hence, in a transmission line including the first signal line, an increase in the capacitance due to the increased width of the first signal line is cancelled out by a decrease in the capacitance due to the increased distance from the first ground conductor and the first opening portions. Further, the width of the high-frequency transmission line need not be large. Further, since the capacitance is reduced by the first and second opening portions, the distances between the first ground conductor and the first and second signal lines are shortened.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: December 25, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Nobuo Ikemoto, Takahiro Baba, Fumie Matsuda, Wataru Tamura
  • Patent number: 10149377
    Abstract: A stacked, multi-layer transmission line is provided. The stacked transmission line includes at least a pair of conductive traces, each conductive trace having a plurality of conductive stubs electrically coupled thereto. The stubs are disposed in one or more separate spatial layers from the conductive traces.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 4, 2018
    Assignee: Invensas Corporation
    Inventors: Shaowu Huang, Javier A. Delacruz, Belgacem Haba
  • Patent number: 10147992
    Abstract: A via-less crossover for use in broadband microwave/mm-wave circuitry, including: a dielectric substrate; a top layer disposed on one side of the substrate and including a microstrip line with an input and an output, two tapered sections placed around the microstrip line along a co-planar waveguide (CPW) central line, one microstrip portion having an input and which connects to one top layer, rectangular stub disposed adjacent to one of the tapered sections, and another microstrip portion having an output and which connects to another top layer, rectangular stub disposed adjacent to the other of the tapered sections; and a ground layer disposed on an opposite side of the substrate and including a bottom layer CPW central line situated in a central cutout and which connects between a bottom layer, rectangular stub on one side and a bottom layer, rectangular stub on the other side situated in ground cutouts, respectively.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: December 4, 2018
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Kongpop U-Yen, Edward J. Wollack, Marc Castro
  • Patent number: 10122122
    Abstract: A connector includes a wafer having first, second, third, and fourth communication channels. The first and second communication channels form a first differential pair, and the third and fourth communication channels form a second differential pair. The wafer includes a plug and a receptacle. The plug includes a first portion of the first, second, third, and fourth communication channels. The receptacle includes a second portion of the first, second, third, and fourth communication channels. A first crisscross is located at a first predetermined location of the first and second communication channels of the first differential pair. The first crisscross changes a first polarity of a first signal to be transmitted on the first differential pair. A second polarity of a second signal to be transmitted on the second differential pair remains the same throughout an entire length of the second differential pair.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: November 6, 2018
    Assignee: DELL PRODUCTS, LP
    Inventors: Raymond DeWine Heistand, II, Sandor Farkas, Bhyrav M. Mutnury
  • Patent number: 10117325
    Abstract: A circuit structure and a mobile terminal having a circuit structure are disclosed. The circuit structure may include two transmission lines that extend in a first direction to transmit a signal, and a guard pattern provided between the two transmission lines. The guard pattern may include a plurality of slots each having an open end and a closed end in a second direction. The guard pattern arranged between the transmission lines may lower cross talk by adjusting mutual capacitance so as to improve signal quality.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: October 30, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Inmu Kim, Youngmin Cho, Kipyoung Kim
  • Patent number: 10114067
    Abstract: A structure for signal transmission is disclosed. The structure comprises a first plurality of waveguides tightly disposed together and disposed substantially in parallel with each other, each of said waveguides having a first opening and a second opening, wherein each first opening is operable to align with a patch antenna, and wherein the first plurality of waveguides is disposed adjacent to a socket. The integrated structure further comprises the socket which comprises an opening operable to support an insertion of a device under test (DUT), wherein the DUT is communicatively coupled to a plurality of microstrip transmission lines on a printed circuit board (PCB) underlying the socket for transmitting test signals from the DUT, wherein each of the microstrip transmission lines is electrically coupled to a respective patch antenna. Further, the first plurality of waveguides and the socket are integrated into a single plastic or metal structure.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: October 30, 2018
    Assignee: ADVANTEST CORPORATION
    Inventors: Daniel Lam, Don Lee, Roger McAleenan, Kosuke Miyao
  • Patent number: 10103446
    Abstract: Embodiments of the present invention relate to graphene-based Rotman lenses. In an embodiment, a lens is formed on a surface of a dielectric plate. The lens comprises a composition having individual sheets of graphene. The lens includes a plurality of first transmission lines extending from a first lens contour and a plurality of second transmission lines extending from a second lens contour. The plurality of first transmission lines each terminate at a first port. The plurality of second transmission lines each terminate at a second port. The first contour and the second contour are positioned opposite each other. The first port and/or the second port has a width of ?/2 or less. The individual graphene sheets form a three-dimensional interconnected network within the composition.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: October 16, 2018
    Inventors: John S Lettow, Sriram Manivanna, Larry Hurzon, Trentice V Bolar
  • Patent number: 10090574
    Abstract: The present invention provides a microstrip isolation structure for reducing crosstalk, comprising a microstrip line and two grounded resistors. The microstrip line comprises a plurality of indentation structures arranged periodically. The two grounded resistors are connected to two ends of the microstrip line, respectively. The plurality of indentation structures are periodically arranged in a subwavelength configuration that a period length of the plurality of indentation structures is far smaller than a wavelength of a transmission signal generated by a crosstalk around the microstrip line, whereby impingement of electromagnetic wave is confined by the plurality of indentation structures.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: October 2, 2018
    Inventor: Chia-Ho Wu
  • Patent number: 10056669
    Abstract: A transmission line includes a dielectric base body including stacked dielectric layers. A first signal conductor, a second signal conductor, and a ground conductor are included inside the dielectric base body. The first signal conductor includes a first end portion signal conductor and a second end portion signal conductor, which are two end portions in a transmitting direction, and a signal conductor that defines and functions as a main conductor portion. A signal conductor of the second signal conductor and the main conductor portion are provided on different dielectric layers. The signal conductor of the second signal conductor and the signal conductor of the first signal conductor are formed on the same dielectric layer. The ground conductor has an increased width and is located between the signal conductor of the second signal conductor and the main conductor portion in a stacking direction.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: August 21, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takahiro Baba, Yuki Wakabayashi
  • Patent number: 10050326
    Abstract: A transmission line includes, in a dielectric body, a first ground conductor, and first and second signal conductors arranged in a width direction of the dielectric body. The first ground conductor includes a first signal conductor ground portion disposed closer to a first side of the dielectric body in a thickness direction than the first signal conductor, a second signal conductor ground portion disposed closer to a second side of the dielectric body in the thickness direction than the second signal conductor, and an intermediate portion that connects the first signal conductor ground portion to the second signal conductor ground portion. The intermediate portion is disposed between a first transmission line including the first signal conductor and the first signal conductor ground portion and a second transmission line including the second signal conductor and the second signal conductor ground portion.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: August 14, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takahiro Baba, Kuniaki Yosui, Nobuo Ikemoto, Fumie Matsuda
  • Patent number: 10044085
    Abstract: Stretchable high frequency transmission lines and high-frequency filters comprising the transmission lines are provided. The transmission lines provide low power loss, even at microwave and millimeter wave frequencies. The transmission lines are thin and flexible and can be stretched without a significant degradation of their scattering parameters. As a result, the transmission lines have applications as interconnects in stretchable and flexible integrated circuits (IC) and circuit device components, such as flexible transistors and flexible diodes.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: August 7, 2018
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Zhenqiang Ma, Yei Hwan Jung, Juhwan Lee, Shaoqin Gong
  • Patent number: 10033351
    Abstract: A non-linear impedance terminates a transmission line. The non-linear impedance may be implemented with a back-to-back connected inverter pair. The pair acts as a non-linear resistor. A process, voltage, temperature (PVT) tracking circuit may also be provided to improve PVT tracking, with resistance of transistors locked to a calibrated resistor. The replica circuit does not appear in the signal path, and does not add capacitive load.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: July 24, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Guansheng Li, Jun Cao
  • Patent number: 9960471
    Abstract: In a transmission line, first and second signal conductors are located inside a dielectric base body. The first and second signal conductors are located between first and second ground conductors in a thickness direction of the dielectric base body. A main conductor portion of the second ground conductor is located between the first and second signal conductors in a width direction of the dielectric base body. First and second auxiliary conductor portions of the second ground conductor respectively extend from the main conductor portion to first-signal-conductor-side and second-signal-conductor-side lateral surfaces of the dielectric base body. A first lateral-surface conductor connects the first auxiliary conductor portion to a plating-connection conductor connected to the first ground conductor. A second lateral-surface conductor connects the second auxiliary conductor portion to a plating-connection conductor connected to the first ground conductor.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: May 1, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takahiro Baba, Satoshi Sasaki, Kuniaki Yosui
  • Patent number: 9912029
    Abstract: A waveguide assembly for propagating electromagnetic signals includes first and second dielectric waveguides and a shield. Each of the first and second dielectric waveguides includes a cladding formed of a first dielectric material. The cladding defines a core region therethrough that is filled with a second dielectric material different than the first dielectric material. The shield is disposed between the first dielectric waveguide and the second dielectric waveguide. The shield is electrically conductive. The shield does not surround an entire perimeter of either of the first dielectric waveguide or the second dielectric waveguide.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: March 6, 2018
    Assignees: TE CONNECTIVITY CORPORATION, TYCO ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Chad William Morgan, Liang Huang
  • Patent number: 9907160
    Abstract: A design for printed circuit board with reduced susceptibility to common-mode noise includes a first substrate, a differential pair of signal lines with two differential transmission lines laid on the first substrate, a second substrate, a metal layer located between the first substrate and the second substrate, and a grounding layer The second substrate is located between the second substrate and the grounding layer, and a conductive structure is located in the second substrate and couples the metal layer to the grounding layer. A length of the metal layer is substantially equal to a length of each of the two differential transmission lines.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: February 27, 2018
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chih-Hao Lin
  • Patent number: 9888600
    Abstract: Substrate-free mechanical structural systems comprised of interconnected subsystems of electronic and/or electromechanical components are provided.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: February 6, 2018
    Assignee: NUVOTRONICS, INC
    Inventors: Ian Hovey, J. Robert Reid, David Sherrer, Will Stacy, Ken Vanhille
  • Patent number: 9887453
    Abstract: A ballistic radome is provided and includes a flattened radome portion disposable in a primary field of view (FOV) of an antenna and a curved radome portion configured to define an extended FOV of the antenna about the primary FOV.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: February 6, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: James A. Pruett, Kuang-Yuh Wu
  • Patent number: 9864829
    Abstract: According to one embodiment, there is provided a multilayer substrate including a ground layer and a signal layer. The ground layer includes a mesh ground having multiple openings. The signal layer is laid above the ground layer and including multiple signal lines. The multiple openings include first openings and second openings. The first openings overlap a first signal line from among the multiple signal lines when seen through in a direction perpendicular to a surface of the multilayer substrate. The second openings overlap the first signal line when seen through in the direction perpendicular to the surface of the multilayer substrate. The first openings have a first form, and the second openings have a second form different from the first form.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: January 9, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Satoru Fukuchi, Yoshihiro Iida
  • Patent number: 9864155
    Abstract: An optical component includes: a first substrate, a second substrate, and a transfer board. A first electrically conductive path is disposed on a top surface of the first substrate. A second electrically conductive path is disposed on a bottom surface of the first substrate. A third electrically conductive path is disposed on a top surface of the second substrate. A microstrip line structure is disposed on the transfer board. The microstrip line structure includes a transfer line disposed on a top surface of the transfer board. The top surface of the second substrate is opposite to the bottom surface of the first substrate, where the second electrically conductive path fits the third electrically conductive path. The transfer board is disposed on the top of the top surface of the second substrate. One end of the transfer line is electrically connected to the first electrically conductive path by a wire bonding.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: January 9, 2018
    Assignees: Hisense Broadband Multimedia Technologies Co,. Ltd., Hisense USA Corp., Hisense International Co., Ltd.
    Inventors: Hao Wang, Hongwei Mu, YongLiang Huang, Shun Zhang
  • Patent number: 9847564
    Abstract: The present disclosure relates to a slow-wave transmission line for transmitting slow-wave signals with reduced loss. In this regard, the slow-wave transmission line is formed in a multi-layer substrate and includes an undulating signal path. The undulating signal path includes at least two loop structures, wherein each loop structure includes at least two via structures connected by at least one intra-loop trace. The undulating signal path further includes at least one inter-loop trace connecting the at least two loop structures. Additionally, the slow-wave transmission line includes a first ground structure disposed along the undulating signal path. In this manner, a loop inductance is formed by each of the at least two loop structures, while a first distributed capacitance is formed between the undulating signal path and the ground structure.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: December 19, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Marcus Granger-Jones, Baker Scott
  • Patent number: 9843301
    Abstract: A transformer balun fabricated in silicon and including a series of alternating metal layers and dielectric layers that define first and second outer conductors that are part of a coaxial structure. Each dielectric layer includes a plurality of conductive vias extending through the dielectric layer to provide electrical contact between opposing metal layers, where a top metal layer forms a top wall of each outer conductor and a bottom metal layer forms a bottom wall of each outer conductor and the other metal layers and the dielectric layers define sidewalls of the outer conductors. Inner conductors extends down both of the first and second outer conductors and a first output line is electrically coupled to a sidewall of the first outer conductor and a second output line is electrically coupled to a sidewall of the second outer conductor.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: December 12, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Paul L. Rodgers, Dah-Weih Duan
  • Patent number: 9837696
    Abstract: A transmission line structure for transmitting radio signals includes a first transmission line, a first ground region, and a second transmission line. The first transmission line is arranged on a first layer of a circuit board. The first transmission line includes a first signal line and a second signal line. The first ground region is arranged between the first and second signal lines. The first and second signal lines do not contact the first ground region. The second transmission line is arranged on a second layer of the circuit board, and the second layer is different from the first layer. The second transmission line does not contact the first transmission line, and the second transmission line interleaves with the first signal line, the second signal line and the first ground area.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: December 5, 2017
    Assignee: Wistron Neweb Corp.
    Inventor: Chih-Lin Chang
  • Patent number: 9806392
    Abstract: Apparatuses and methods associated with shield lines, and/or complementary decoupling capacitors and/or electromagnetic absorbing materials are disclosed herein. In embodiments, an apparatus may include a substrate having a ground plane; and a first and a second transmission line disposed on the substrate. Further, the apparatus may include a shield line constituted with electromagnetic absorbing material disposed between the first and second transmission lines and not coupled with the ground plane. In embodiments, the substrate may further include a power plane having a plurality of edges and a plurality of spacing; a plurality of decoupling capacitors disposed on the power or ground plane; and electromagnetic absorbing materials adhered to the plurality of edges and disposed in the plurality of spacing. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: October 31, 2017
    Assignee: Intel Corporation
    Inventors: Shaowu Huang, Hanqiao Zhang, Kai Xiao, Beom-Taek Lee, John J. Abbott, Gary Charles
  • Patent number: 9807870
    Abstract: A printed wiring board is provided which comprises a first insulating substrate (11) composed of a liquid crystal polymer, a first signal line (131) formed on one main surface (11a) of the first insulating substrate (11), a second insulating substrate (21) composed of a liquid crystal polymer, a second signal line (231) formed on one main surface (21a) of the second insulating substrate (21) and along the extending direction of the first signal line (131), and an adhesion layer (30) composed of a modified polyphenylene ether for adhesion between the one main surface (11a) of the first insulating substrate (11) and the one main surface (21a) of the second insulating substrate (21). When frequencies of signals transmitted by the first signal line and the second signal line are 2.5 GHz or more and 5.0 GHz or less, an offset amount is longer than a circuit width (L1) of the first signal line (131) and 130 ?m or more and 300 ?m or less.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: October 31, 2017
    Assignee: FUJIKURA LTD.
    Inventor: Naomi Komatsu
  • Patent number: 9801268
    Abstract: A circuit board comprising a circuit board ply, on which are provided a high-frequency component emitting electromagnetic interference waves during operation and at least one other component, especially another high-frequency component, wherein during operation an as low as possible degrading of the other component by interference waves is achieved. There is provided between the high-frequency component and the other component at least one dielectric barrier, which blocks propagation of high-frequency electromagnetic waves between the high-frequency component and the other component.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: October 24, 2017
    Assignee: Endress + Hauser GmbH + Co. KG
    Inventor: Thomas Blodt
  • Patent number: 9795027
    Abstract: To suppress occurrence of a difference in transmission time due to a difference in length between signal lines, there is provided a printed wiring board having: an insulating substrate (10); a first signal line (L31) formed on the insulating substrate (10); a second signal line (L32) having a shorter length than that of the first signal line (L31); and a ground layer (30) formed for the first signal line (L31) and the second signal line (L31) via an insulating material (10). The ground layer (30) includes a first ground layer (G31) corresponding to a first region (D1) and a second ground layer (G32) corresponding to a second region (D2). The first region (D1) is defined based on the first signal line (L31) and has a first predetermined width (W31). The second region (D2) is defined based on the second signal line (L32) and has a second predetermined width (W32). The first ground layer (G31) has a remaining ratio lower than a remaining ratio of the second ground layer (G32).
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: October 17, 2017
    Assignee: FUJIKURA LTD.
    Inventors: Hirohito Watanabe, Taiji Ogawa
  • Patent number: 9768482
    Abstract: The compact excitation module comprises two radiofrequency RF exciters and a rotary joint coupled together along a common longitudinal axis, the rotary joint comprising two distinct parts, respectively fixed and rotating around the common longitudinal axis, the two radiofrequency exciters being mounted one on each side of the rotary joint, respectively on the fixed and rotating parts, and axially coupled together by the rotary joint. The compact excitation module further comprises a rotary actuator provided with an axial transverse opening, the rotary joint being housed in the axial transverse opening of the rotary actuator.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: September 19, 2017
    Assignee: THALES
    Inventors: Jérôme Lorenzo, Pierre Bosshard, Jérôme Brossier, Benjamin Monteillet, Abdelkader Meziani
  • Patent number: 9748625
    Abstract: A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: August 29, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki, Kuniaki Yosui, Takahiro Baba, Nobuo Ikemoto
  • Patent number: 9742051
    Abstract: A high-frequency signal transmission line includes a body including a plurality of first base layers and a second base layer stacked on one another in a stacking direction. The first base layers have a first relative permeability, and the second base layer has a relative permeability lower than the first relative permeability. A first signal line and a second signal line extending along the first signal line are provided in the body. In a cross section perpendicular or substantially perpendicular to a first direction in which the first signal line extends, the second base layer occupies at least a portion of an area between the first signal line and the second signal line. In the cross section perpendicular or substantially perpendicular to the first direction, the plurality of first base layers define a loop enclosing the first signal line, the second signal line and the second base layer.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: August 22, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kuniaki Yosui
  • Patent number: 9742464
    Abstract: An information handling system includes a stripline transmission line, the stripline transmission line including a plurality of conductors, each one of the conductors having a mitigation conductor section and a non-mitigation conductor section. The mitigation conductor section includes a first linear section having a first side surface and a second side surface, and a plurality of substantially semi-circular stubs extending from the first side surface of the first liner section. The mitigation conductor section is configured to mitigate near end cross talk between the mitigation conductor section and adjacent conductors.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: August 22, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Bhyrav M. Mutnury, Mallikarjun Vasa
  • Patent number: 9705199
    Abstract: A dielectric travelling wave antenna (DTWA) using a TEM mode transmission line and variable dielectric substrate.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: July 11, 2017
    Assignee: AMI Research & Development, LLC
    Inventors: John T. Apostolos, William Mouyos, Benjamin McMahon, Brian Molen, Paul Gili
  • Patent number: 9615446
    Abstract: The present invention discloses a pair of differential microstrip lines with low cross-talk for high-frequency signal transmission. The pair of microstrip lines comprises two microstrip lines. The first microstrip line is used to transmit the first transmission signal. The second microstrip line is parallel to the first microstrip line and used to transmit the second transmission signal. The first transmission signal is the complementary signal of the second transmission signal and has a 180° phase difference from the second transmission signal. Particularly, there are a plurality of slots periodically arranged on the outer sides of the first and the second microstrip lines to form a subwavelength configuration. The subwavelength configuration is to make the periodical arrangement length of these slots shorter than the wavelengths of the first and the second transmission signals. These slots can provide subwavelength confinement for enhancing electromagnetic wave.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: April 4, 2017
    Assignee: CHUNG HUA UNIVERSITY
    Inventor: Chia-Ho Wu
  • Patent number: 9608304
    Abstract: A high-frequency signal transmission line includes a dielectric body including dielectric layers stacked together, a linear signal line provided in the dielectric body, a first ground conductor provided at the dielectric body, at a first side of the signal line in a stacking direction so as to face the signal line, and a subsidiary member provided at the dielectric body, at a second side of the signal line in the stacking direction so as to face a central portion of the signal line in a line-width direction. In a sectional view along a plane perpendicular or substantially perpendicular to an extending direction of the signal line, the signal line is curved such that side portions of the signal line in the line-width direction are farther away from the first ground conductor than a central portion of the signal line in the line-width direction.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: March 28, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kuniaki Yosui, Noboru Kato
  • Patent number: 9583253
    Abstract: Systems and methods for implementing interengagement structures for a ferrite tile assembly of an induction coil housing are described herein. One aspect of the subject matter described in the disclosure is a housing. The housing includes a base forming a receptacle. The housing further includes a ferrite tile assembly. The housing further includes an interengagement structure extending from the base and configured to secure the ferrite tile assembly relative to the base within the receptacle.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: February 28, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Simon Peter Islinger
  • Patent number: 9559401
    Abstract: A printed board includes: a transmission line that includes a curved region in which a first signal line and a second signal line are arranged separately from each other and curved, wherein the second signal line is arranged on an inner side of the curved region with respect to the first signal line in the curved region and has a portion extending away from the first signal line on a path arranged to be circuitous and extending partially toward the first signal line in the curved region.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: January 31, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Kenichi Kawai
  • Patent number: 9502744
    Abstract: The invention is related to a microstrip line structure, which comprises: a first microstrip line and a second microstrip line, paralleled with the first microstrip line for transferring a transmission signal, and a plurality of grooves periodically arranged on both sides of the second microstrip line by using subwavelength, and each period length in the plurality of grooves is smaller than the wavelength of the transmission signal.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: November 22, 2016
    Assignee: CHUNG HUA UNIVERSITY
    Inventors: Chia-Ho Wu, Tzong-Jer Yang
  • Patent number: 9496592
    Abstract: Apparatus and methods for rack level pre-installed interconnect for enabling cableless server, storage, and networking deployment. Plastic cable waveguides are configured to couple millimeter-wave radio frequency (RF) signals between two or more Extremely High Frequency (EHF) transceiver chips, thus supporting millimeter-wave wireless communication links enabling components in the separate chassis to communicate without requiring wire or optical cables between the chassis. Various configurations are disclosed, including multiple configurations for server chassis, storage chassis and arrays, and network/switch chassis. A plurality of plastic cable waveguide may be coupled to applicable support/mounting members, which in turn are mounted to a rack and/or top-of-rack switches. This enables the plastic cable waveguides to be pre-installed at the rack level, and further enables racks to be installed and replaced without requiring further cabling for the supported communication links.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: November 15, 2016
    Assignee: Intel Corporation
    Inventors: Matthew J. Adiletta, Aaron Gorius, Myles Wilde, Hugh Wilkinson, Amit Y. Kumar
  • Patent number: 9490516
    Abstract: A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: November 8, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki, Kuniaki Yosui, Takahiro Baba, Nobuo Ikemoto
  • Patent number: 9478839
    Abstract: Provided is a wiring board including: a board; a differential transmission line constituted by two wirings disposed on the board in parallel; an insulation resin layer which is formed on part of a face of the board. A stepped portion constituted by a lateral face of the insulation resin layer is formed at a boundary between the face of the board and a top face of the insulation resin layer. The two wirings extend from the face of the board to the top face of the insulation resin layer so as to traverse the stepped portion. The extending direction of the wirings traversing the stepped portion and the direction of a periphery are perpendicular to each other in a plan view of the board, the periphery being defined by a boundary between the top face of the insulation resin layer and the lateral face of the insulation resin layer.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: October 25, 2016
    Assignee: FUJIKURA LTD.
    Inventor: Kohei Matsumaru
  • Patent number: 9450557
    Abstract: Methods and apparatus, including computer program products, are provided for a programmable phase shifter. In some example embodiments, there is provided an apparatus. The apparatus may include a transmission line comprising a plurality of sections; and a plurality of switches coupled to the plurality of sections, wherein the plurality of switches activate one or more of the plurality of sections to vary a phase shift provided by the transmission line, and wherein the plurality of switches configure a type of coupling between one or more of the sections to vary an impedance provided by the transmission line. Related apparatus, systems, methods, and articles are also described.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: September 20, 2016
    Assignee: Nokia Technologies Oy
    Inventor: Michael Thomas Reiha
  • Patent number: 9445492
    Abstract: A printed circuit board is disclosed. The printed circuit board comprises a substrate having a top surface and a bottom surface. A ground plane is on the bottom surface. A signal trace is on the top surface along a first direction. At least two isolated power planes are on the top surface adjacent to opposite sides of the signal trace, respectively. A conductive connection along a second direction couples to the two power planes, across the signal trace without electrically connecting to the signal trace, wherein the signal trace doesn't pass over any split of the ground plane.
    Type: Grant
    Filed: January 16, 2012
    Date of Patent: September 13, 2016
    Assignee: MEDIATEK INC.
    Inventors: Nan-Jang Chen, Hong-Chin Lin
  • Patent number: 9405875
    Abstract: A method of designing an acoustic microwave filter comprises generating a proposed filter circuit design having an acoustic resonant element with a defined admittance value, introducing a lumped capacitive element in parallel and a lumped inductive element in series with the resonant element, selecting a first capacitance value for the capacitive element and a first inductance value for the inductive element, thereby creating a first temperature modeled filter circuit design, simulating the first temperature modeled filter circuit design at a first operating temperature, thereby generating a first frequency response, selecting a second capacitance value for the capacitive element and a second inductance value for the inductive element, thereby creating a second temperature modeled filter circuit design, simulating the second temperature modeled filter circuit design at a second operating temperature, thereby generating a second frequency response, and comparing the first and second frequency responses to the
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: August 2, 2016
    Assignee: RESONANT INC.
    Inventors: Sean McHugh, Neal O. Fenzi
  • Patent number: 9401533
    Abstract: A flat cable includes a dielectric element assembly including a plurality of dielectric layers laminated on each other, a linear signal line provided in the dielectric element assembly, a first ground conductor provided on one side in a direction of lamination relative to the signal line and including a plurality of first openings arranged along the signal line, and a second ground conductor provided on the other side in the direction of lamination relative to the signal line and including a plurality of second openings arranged along the signal line. The first ground conductor is more distant from the signal line in the direction of lamination than is the second ground conductor. The first openings are larger than the second openings.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: July 26, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Noboru Kato
  • Patent number: 9386690
    Abstract: This disclosure relates generally to an electronic assembly and method having a first electrical connection point and a second electrical connection point and a differential interconnect coupling the first electrical connection point to the second electrical connection point, the differential interconnect including first and second transmission traces including a interior edges and a exterior edges opposite the interior edges, the second interior edge facing the first interior edge, and stub traces, each stub trace coupled to one of the first and second transmission traces and projecting from one of the first interior edge, the first exterior edge, the second interior edge, and the second exterior edge. A substantially equal number of stub traces project from the first exterior edge and the second exterior edge. At least twice as many stub traces project from the first and second exterior edges as project from the first and second interior edges.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: July 5, 2016
    Assignee: Intel Corporation
    Inventors: Ruihua Ding, Min Wang, Mo Liu
  • Patent number: 9356396
    Abstract: A communication connector comprising plug interface contacts having a plurality of conductor pairs, and corresponding cable connector contacts. A printed circuit board connects the plug interface contacts to respective cable connector contacts. The printed circuit board includes circuitry between a first conductor pair and a second conductor pair. The circuitry has a first mutually inductive coupling between a first conductor of the first conductor pair and a first conductor of the second conductor pair, a first capacitive coupling between the first conductor of the first conductor pair and the first conductor of the second conductor pair. The first capacitive coupling is approximately concurrent with the first mutually inductive coupling. A shunt capacitive coupling connects the first conductor of the second conductor pair to a second conductor of the second conductor pair.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: May 31, 2016
    Assignee: Panduit Corp.
    Inventors: Masud Bolouri-Saransar, Ronald A. Nordin
  • Patent number: 9337896
    Abstract: Provided is a blocking filter for PLC, the blocking filter including a low pass filter unit including a capacitor and a plurality of inductors, a plurality of magnetic saturation prevention circuits each connected to the inductor in parallel to prevent magnetic saturation of the inductor, and operating in response to an interruption control signal inputted from outside, and a first switch connected or opened in response to the interruption control signal and interconnected between the low pass filter unit and a neutral line.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: May 10, 2016
    Assignee: LSIS CO., LTD.
    Inventors: Jae Kang Sim, Young Gyu Yu
  • Patent number: 9337521
    Abstract: A circuit component is described herein. The circuit component includes a first signal line to propagate in a first direction and a second signal line to propagate a second direction. The circuit component includes a region to introduce crosstalk within the region that reduces another crosstalk generated at a location remote from the region based on a change in propagation direction of the first signal line and second signal line.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: May 10, 2016
    Assignee: Intel Corporation
    Inventors: Raul Enriquez Shibayama, Maria Garcia Garcia de Leon, Kai Xiao, Beom-Taek Lee, Carlos Lizalde Moreno
  • Patent number: 9332644
    Abstract: A high-frequency transmission line includes a laminate including dielectric layers, a first signal line provided in the laminate, a second signal line provided in the laminate and positioned on a first side in a direction of lamination relative to the first signal line, so as to cross the first signal line when viewed in a plan view in the direction of lamination, a first ground conductor positioned on a second side in the direction of lamination relative to the first signal line, a second ground conductor positioned on the first side in the direction of lamination relative to the second signal line, and an intermediate ground conductor provided between the first and second signal lines in the direction of lamination, so as to overlap with crossing portions of the first and second lines when viewed in a plan view in the direction of lamination.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: May 3, 2016
    Assignee: Murato Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Masahiro Ozawa
  • Patent number: 9312216
    Abstract: To improve noise immunity of a semiconductor device. A wiring substrate of a semiconductor device includes a first wiring layer where a wire is formed to which signals are sent, and a second wiring layer that is mounted adjacent to the upper layer or the lower layer of the first wiring layer. The second wiring layer includes a conductor plane where an aperture section is formed at a position overlapped with a portion of the wire 23 in the thickness direction, and a conductor pattern that is mounted within the aperture section of the conductor plane. The conductor pattern includes a main pattern section (mesh pattern section) that is isolated from the conductor plane, and plural coupling sections that couple the main pattern section and the conductor plane.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: April 12, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Shuuichi Kariyazaki, Ryuichi Oikawa