Plural Channel Systems Patents (Class 333/1)
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Patent number: 7719379Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: GrantFiled: September 1, 2008Date of Patent: May 18, 2010Assignee: Banpil Photonics, Inc.Inventor: Achyut Kumar Dutta
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Patent number: 7719378Abstract: A high speed flexible interconnect cable for an electronic assembly includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The cable can be coupled to electronic components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.Type: GrantFiled: January 22, 2008Date of Patent: May 18, 2010Assignee: QUALCOMM IncorporatedInventors: James Leroy Blair, Oswin M. Schreiber, Jeffrey Thomas Smith
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Publication number: 20100109790Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.Type: ApplicationFiled: July 23, 2009Publication date: May 6, 2010Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Patent number: 7705690Abstract: A serpentine guard trace for reducing far-end crosstalk of a micro strip transmission line is provided. The serpentine guard trace reduces receiving-end crosstalk caused by an electromagnetic interference of a signal of a nearby transmission line when transmitting a high speed signal through a micro strip transmission line on a printed circuit board. The serpentine guard trace is located between two nearby transmission lines and has a line width narrower than that of transmission lines for an effective serpentine structure. A characteristic impedance of the serpentine guard trace increases due to the narrow line width. Termination resistors having impedance which is the same as the characteristic impedance of the serpentine guard trace are located on both ends of the guard trace to minimize a reflection wave generated in the serpentine guard trace. The receiving-end crosstalk can be effectively reduced by using the serpentine guard trace instead of a linear guard trace.Type: GrantFiled: August 22, 2006Date of Patent: April 27, 2010Assignee: Postech FoundationInventors: Hyun Bae Lee, Hong June Park
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Patent number: 7692508Abstract: A spring loaded microwave interconnector (SLMI). The SLMI includes a waveguide probe head having a first side and opposite thereto a second side, the sides transverse to a central axis. A spring loaded coax central conductor coupled to the probe head first side and provides a distal conductive tip. The coax central conductor extends along the central axis. A dielectric sleeve is disposed about the coax central conductor adjacent to the first side. The distal conductive tip extending beyond the dielectric sleeve when in an extended position and is about flush with the dielectric sleeve when in a compressed poison. An multiport waveguide to multiport PCB assembly utilizing a plurality of SLMIs wherein the multiport waveguide and PCB have curved contours is also disclosed.Type: GrantFiled: April 19, 2007Date of Patent: April 6, 2010Assignee: Raytheon CompanyInventors: Clifton Quan, David E. Roberts, Shahrokh Hashemi-Yeganeh, Richard A. Montgomery
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Patent number: 7689070Abstract: A high frequency electrical signal control device comprises a transmitter for generating a high frequency electrical signal, a receiver, a transmission line for propagating the electrical signal, and a structure for radiating the electrical signal propagated through the transmission line to the space or receiving a signal from the space. The degree of coupling of the electrical signal between the space and the transmission line provided by the structure can be variably controlled.Type: GrantFiled: August 8, 2008Date of Patent: March 30, 2010Assignee: Canon Kabushiki KaishaInventor: Toshihiko Ouchi
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Patent number: 7659791Abstract: Provided is a guard trace pattern reducing far-end crosstalk and a printed circuit board having the guard trace pattern. The guard trace pattern includes a first guard trace pattern parallel with two signal lines and a plurality of second guard trace patterns perpendicular to the first guard trace pattern to increase mutual capacitance between the two signal lines and the guard trace pattern and increase mutual capacitance between the two signal lines. The printed circuit board includes the aforementioned guard trace pattern disposed between micro strip transmission lines. A characteristic impedance of the guard trace pattern is different from a characteristic impedance of the micro strip transmission lines, and resistances having the same value as a resistance component value of the characteristic impedance of the guard trace pattern are provided to both ends of the guard trace pattern.Type: GrantFiled: September 5, 2007Date of Patent: February 9, 2010Assignee: Postech Foundation & Postech Academy Industry FoundationInventors: Hong June Park, Kyoung Ho Lee, Hae Kang Jung
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Patent number: 7659790Abstract: Apparatus and associated systems and methods may include one or more features for high speed transmission line structures that may substantially reduce signal degradation due to effects, such as dielectric loss, parasitic capacitance, cross-talk, and/or reflections. For example, one such feature may include a dielectric layer having a reduced thickness within at least a part of a region that extends between two conductors fabricated on a PCB (printed circuit board). In some embodiments, the dielectric layer may include a solder mask layer that is partially or substantially absent in the region between two coplanar conductors. In another embodiment, a substrate layer made of a dielectric material may include a trench in the region between the two conductors. Another such feature, for example, may include a conductor having vias spaced less than a quarter wavelength apart to substantially reduce resonance effects on propagating high frequency signals.Type: GrantFiled: August 22, 2006Date of Patent: February 9, 2010Assignee: LeCroy CorporationInventors: Yigal Shaul, Albert Sutono
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Publication number: 20100026408Abstract: The present invention provides high performance, low power signal transfer methods for linking large numbers of integrated chips into ultra-high capacity circuits; Example application of the present invention including ultra-high capacity memory systems, and router systems.Type: ApplicationFiled: July 30, 2008Publication date: February 4, 2010Inventor: Jeng-Jye Shau
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Publication number: 20100001806Abstract: A pair of signal transmission lines includes an aggressor line and a victim line parallel to the aggressor line. A plurality of time delay modules is linked in the aggressor line. A plurality of time delay modules is linked in the victim line. A total delay time of the time delay modules of the victim line is equal to a total delay time of the time delay modules of the aggressor line.Type: ApplicationFiled: December 30, 2008Publication date: January 7, 2010Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: YU-HSU LIN
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Patent number: 7642878Abstract: A signal transmission circuit and method thereof are provided. The signal transmission circuit may include a plurality of signal transmission lines, each of the plurality of signal transmission lines configured to transfer data via signal currents and a reference transmission plane configured to transfer return currents corresponding to the signal currents, the reference transmission plane separated from each of the plurality of signal transmission lines by an insulating layer, the reference transmission plane including at least one separation slot.Type: GrantFiled: June 20, 2007Date of Patent: January 5, 2010Assignees: Samsung Electro-Mechanics Co., Ltd., Rensselaer Polytechnic InstituteInventors: Kwang-soo Park, Jong-hoon Kim, Jae-jun Lee
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Publication number: 20090315634Abstract: In one exemplary embodiment, a transmission line geometry or structure may readily be realized as periodic printed coupled/uncoupled microstrip lines on dielectric and/or suitable biased ferromagnetic substrates. An example of a transmission line geometry or structure may be adapted to emulate extraordinary propagation modes within bulk periodic assemblies of anisotropic dielectric and magnetic materials. For instance, wave propagation in anisotropic media may be emulated by using a pair of coupled transmission lines (30, 32) having a specially designed geometry, thereby enabling mold wave dispersion in a microwave or optical guided wave structure. Degenerate band edge resonances, frozen modes, other extraordinary modes, and other unique electromagnetic properties such as negative refraction index may be realized using unique geometrical arrangements that may, for example, be easily manufactured using contemporary RF or photonics/solid state technology.Type: ApplicationFiled: July 6, 2007Publication date: December 24, 2009Applicant: The Ohio State University Research FoundationInventors: Kubilay Sertel, John L. Volakis
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Publication number: 20090315635Abstract: A transmission circuit includes a plurality of transmission lines connected in a ring to propagate signals among a plurality of devices. The plurality of transmission lines have a predetermined same propagation delay, and a predetermined transmission line impedance, and the predetermined transmission line impedance is a half or less of an output impedance of each of the plurality of devices. When a signal outputted from a first optional one of the plurality of devices is propagated to the plurality of devices other than the first optional device, the signal outputted from the first optional device exceeds a predetermined threshold of a signal voltage at a same time.Type: ApplicationFiled: June 18, 2009Publication date: December 24, 2009Inventor: Tsuyoshi Oono
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Publication number: 20090315633Abstract: A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.Type: ApplicationFiled: June 24, 2008Publication date: December 24, 2009Inventors: Hanyi Ding, Wayne H. Woods, JR.
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Patent number: 7619489Abstract: A semiconductor device comprising a signal transmission line of a microstrip structure, capable of increasing the characteristic impedance of the signal transmission line and reducing coupling between a plurality of signal lines. In a signal transmission line of a microstrip structure composed of a signal line and a ground plate, the capacitance between wires is reduced and the characteristic impedance can be increased by forming holes in the signal line or in the ground plate. The coupling between a plurality of signal lines can also be reduced.Type: GrantFiled: March 19, 2007Date of Patent: November 17, 2009Assignee: NEC CorporationInventor: Masayuki Mizuno
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Publication number: 20090267702Abstract: A printed circuit board (PCB) capable of decreasing wireless wide area network (WWAN) noise generated due to internal signal interference occurring in the PCB is disclosed. The PCB printed circuit board includes a first layer, a second layer, and at least one insulating layer formed between the first and second layers. The PCB board further includes a first signal line group disposed on the first layer while including a plurality of first signal lines each supplying a first signal, isolation patterns disposed on the first layer such that the isolation patterns are arranged between adjacent ones of the first signal lines, respectively, to prevent the adjacent first signal lines from interfering with each other, and a second signal line group disposed on the second layer while including a plurality of second signal lines each supplying a second signal different from the first signal. The second signal line group corresponds to the isolation patterns.Type: ApplicationFiled: November 5, 2008Publication date: October 29, 2009Inventors: Sung Young Kim, Jin Woo Lee
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Publication number: 20090251232Abstract: Coplanar waveguide structures and design structures for radiofrequency and microwave integrated circuits. The coplanar waveguide structure includes a signal conductor and ground conductors generally coplanar with the signal conductor. The signal conductor is disposed between upper and lower arrays of substantially parallel shield conductors. Conductive bridges, which are electrically isolated from the signal conductor, are located laterally between the signal conductor and each of the ground conductors. Pairs of the conductive bridges connect one of the shield conductors in the first array with one of the shield conductors in the second array to define closed loops encircling the signal line.Type: ApplicationFiled: April 3, 2008Publication date: October 8, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hanyi Ding, Essam F. Mina, Guoan Wang, Wayne H. Woods
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Patent number: 7595445Abstract: The present invention relates to a transposition device for a prefabricated electrical canalization, said canalization includes a certain number of conducting bars distributing different phases including or not the neutral, the bars extending substantially parallel to one another, the transposition device being designed to reverse the position of at least two bars with respect to one another in the canalization. This device is characterized in that it is designed to be incorporated in said canalization, and includes the same number of portions of bar as the number of above-mentioned bars of the canalization, at least one of these portions of bar being interrupted inside the device so as to form two parts of portions of bars, these parts includes at their ends a fold towards the outside of said device thus forming an end part that is outwardly offset so as to increase the space between these end parts.Type: GrantFiled: December 6, 2007Date of Patent: September 29, 2009Assignee: Schneider Electric Industries SASInventors: Philippe Legendre, Jean Laurent Pozzobon
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Publication number: 20090237172Abstract: Systems having three coupled transmission lines designed in such a way that any two of which taken together can be used as a differential transmission line with a roughly equal differential mode characteristic impedance while achieving high level of common mode characteristic impedance. The high level of common mode characteristic impedance is achieved by arrangement of the three transmission lines in distinct planes along a transmission axis.Type: ApplicationFiled: March 21, 2008Publication date: September 24, 2009Applicant: QUALCOMM IncorporatedInventor: Shree Krishna Pandey
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Publication number: 20090189708Abstract: Methods and apparatus are disclosed, such as those involving an interconnection layout for an integrated circuit (IC). One such layout includes a plurality of differential pairs of lines. Each differential pair has two lines including one or more parallel portions extending substantially parallel to each other. Each pair also includes a shield line. Each of the shield lines includes one or more parallel portions interposed between the parallel portions of one of the pairs of differential lines. One or more of the shield lines are electrically connected to a voltage reference, such as ground. This layout is believed to reduce or eliminate intra-pair coupling as well as inter-pair coupling.Type: ApplicationFiled: January 25, 2008Publication date: July 30, 2009Applicant: Micron Technology, Inc,Inventor: Todd Merritt
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Patent number: 7504904Abstract: A printed circuit laminate is provided comprising at least one conductor trace for carrying forward electrical signals in a first direction of signal propagation. The printed circuit laminate also comprises a mesh reference plane, spaced from the at least one conductor trace, for carrying return electrical signals in a second direction. The mesh reference plane defines a plurality of cells. Each cell of the plurality of cells includes at least one axis of repetition. The plurality of cells are configured so that all of the axes of repetition of each cell are different from the first direction of signal propagation. Furthermore, the frequency of cell repetition along the first direction of signal propagation is chosen to reduce differences in transmission line impedance between any two conductors on the same laminate or any two conductors on different laminates.Type: GrantFiled: April 4, 2006Date of Patent: March 17, 2009Assignee: Unisys CorporationInventors: Scott Powers, Sean M. McClain, Ernest B. Bogusch
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Publication number: 20090066437Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: ApplicationFiled: September 1, 2008Publication date: March 12, 2009Inventor: Achyut Kumar Dutta
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Patent number: 7495526Abstract: An apparatus and method is provided that reduces the propagation delay in a conductor carrying an electrical signal from a first area of a circuit to a second area of the circuit. The conductor is fabricated to include a first conductor extending from the first area to the second area. The conductor also includes a second conductor extending substantially parallel and along the first conductor and electrically connected to the first conductor. A third and additional conductors may also be used which extend substantially parallel and along the first conductor and are electrically connected to the first conductor. The additional second conductor (and any additional conductors) reduces the capacitance of the conductor thereby reducing the propagation delay in the conductor (increasing the speed of the signal). The additional conductor(s) effectively “shield” the first conductor from some capacitance that the first conductor would normally “see” without the use of such additional conductors.Type: GrantFiled: November 23, 2004Date of Patent: February 24, 2009Assignee: STMicroelectronics, Inc.Inventors: James Brady, Duane Giles Laurent
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Patent number: 7492234Abstract: A printed circuit board (PCB) includes at least one signal layer, a ground layer, at least two signal lines, and at least one grounded line. The signal lines are arranged on the signal layer for transmitting signals. The grounded line is arranged on the signal layer and between the signal lines. A plurality of vias are defined in the grounded line, and the vias are connected to the ground layer. A distance between each two adjacent vias is so arranged that a resonant frequency of an electromagnetic wave transmitted on the grounded line must greater than a highest frequency of the signals transmitted on the signal lines. A related method for designing the PCB is also provided.Type: GrantFiled: September 1, 2006Date of Patent: February 17, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Shou-Kuo Hsu, Cheng-Hong Liu
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Publication number: 20080297271Abstract: The present invention provides a multi-phase layout structure and method. The layout structure comprises: a first layout layer; a second layout layer substantially parallel to the first layout layer; a plurality of traces, each transmitting a signal, and the plurality of signals having a phase difference between each other; wherein a horizontal coupling capacitance is provided between two neighboring traces configured on the same layer of the first layout layer and the second layout layer, a vertical coupling capacitance is provided between two neighboring traces configured on different layers of the first layout layer and the second layout layer, and the plurality of traces have substantially the same total coupling capacitance wherein the total coupling capacitance is defined by the horizontal coupling capacitance and the vertical coupling capacitance.Type: ApplicationFiled: June 4, 2008Publication date: December 4, 2008Applicant: REALTEK SEMICONDUCTOR CORP.Inventor: Chao-Cheng Lee
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Patent number: 7439821Abstract: A DC to DC transmission system includes at least three conductors between a source and a sink, a first switch which alternately connects each conductor to the source, a second switch which alternately connects each conductor to the sink. The switches are synchronized such that one conductor is alternately coupled between the same polarity side of the source and sink and another conductor is alternately coupled between the other polarity side of the source and sink. The alternating connection between the conductors and source and sink may be undertaken at a wide range of frequencies.Type: GrantFiled: September 16, 2005Date of Patent: October 21, 2008Assignee: Alfred E. Mann Foundation for Scientific ResearchInventors: Joseph H. Schulman, John C. Gord
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Patent number: 7436267Abstract: A printed circuit board has a dielectric constant different from the dielectric constant of free space, with at least two microstrip lines routed adjacent to one another on a surface of the printed circuit board. A dielectric coating is applied to at least one of the at least two microstrip lines such that the dielectric constant of the dielectric coating differs from the dielectric constant of free space. In a further embodiment, the dielectric coating comprises a material having a dielectric constant approximately equal to the dielectric constant of the printed circuit board.Type: GrantFiled: July 20, 2006Date of Patent: October 14, 2008Assignee: Micron Technology, Inc.Inventor: Roy Greeff
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Patent number: 7432774Abstract: A printed circuit board has a dielectric constant different from the dielectric constant of free space, with at least two microstrip lines routed adjacent to one another on a surface of the printed circuit board. A dielectric coating is applied to at least one of the at least two microstrip lines such that the dielectric constant of the dielectric coating differs from the dielectric constant of free space. In a further embodiment, the dielectric coating comprises a material having a dielectric constant approximately equal to the dielectric constant of the printed circuit board.Type: GrantFiled: February 27, 2004Date of Patent: October 7, 2008Assignee: Micron Technology, Inc.Inventor: Roy Greeff
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Patent number: 7432775Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of the signal line, dielectric system with opened trench or slot filled up with the air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single ended or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects (chip-to-chip interconnects). The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables. More over, this fundamental technology is also used for the high sped die package, high speed connector, and high speed cables where conventional manufacturing technology can be used and yet to increase the bandwidth of the interconnects.Type: GrantFiled: March 4, 2004Date of Patent: October 7, 2008Assignee: Banpil Photonics, Inc.Inventor: Achyut Dutta
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Patent number: 7432776Abstract: A printed circuit board transmission line has an outer conductive wall surrounding an inner dielectric core. The transmission line may be disposed inside a grounded shielding to provide a form of coaxial conductor that mitigates cross talk from adjacent transmission lines and EMI. Further, groups of dielectric-core transmission lines may be disposed within a single grounded shield. For example, edge coupled differential pairs may be disposed in parallel with each other on a plane defined by a layer of the printed circuit board, i.e., side-by-side. Further, broadside-coupled differential pairs of dielectric-core transmission lines may be disposed in parallel with each other in a stack which is orthogonal with the plane defined by a layer of the printed circuit board, i.e., one on top of the other. Further, a plurality of dielectric-core transmission lines which may include all or ones of single-ended lines and differential pairs may be disposed within a single grounded shield.Type: GrantFiled: July 13, 2004Date of Patent: October 7, 2008Assignee: Nortel Networks LimitedInventors: Herman Kwong, Aneta Wyrzykowska, Larry Marcanti
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Publication number: 20080218285Abstract: A high-speed digital transmission signal line providing better dynamic resistance to be applied in an LVDS transmission system and functioning as an electronic line, an optical line, and a serial advanced technology attachment (SATA) includes a conductive layer in thickness of 0.018˜0.1 mm and in width of 0.2˜0.8 mm; a first and a second insulation layers each in thickness of 0.04˜0.3 mm being respectively disposed on both sides of the conductive layer; and a ground plate.Type: ApplicationFiled: March 8, 2007Publication date: September 11, 2008Inventor: Shih-Kun Yeh
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Patent number: 7405634Abstract: An improved method and apparatus for altering the effective electrical length of trace on a circuit board. In the present invention small tabs of etch are routed perpendicular to the trace in the unused areas between adjacent traces. In an embodiment of the invention, a method of tuning the delay characteristics of a transmission line is implemented by inserting compensation tabs into the unused area between the segments of adjacent straight traces or a serpentine run. Utilizing the method and apparatus of the present invention, it is possible to achieve significantly greater electrical length for an electrical trace without introducing coupling problems or utilizing large amounts of space on a circuit board.Type: GrantFiled: January 30, 2004Date of Patent: July 29, 2008Assignee: Dell Products L.P.Inventors: James B. Mobley, Robert Washburn
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Patent number: 7397320Abstract: A non-uniform transmission line, including at least a first section with length L1, uniform width W1 and thickness h1, and a second section with length L2, uniform width W2 and thickness h2, joined together to form a composite structure and arranged in any of at least three distinct configurations. The composite structure (first section plus second section) may be periodic or non-periodic. Length and/or width and/or thickness of each of the two sections may be varied to provide desired values for characteristic impedance, cutoff frequency and/or time delay for signal propagation.Type: GrantFiled: May 16, 2001Date of Patent: July 8, 2008Assignee: Cadence Design Systems, Inc.Inventor: Syed Asadulla Bokhari
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Patent number: 7378919Abstract: A planar microwave line is provided, having a dielectric substrate and a planar arrangement of a first microstrip conductor and at least one additional microstrip conductor, in which a gap between the first microstrip conductor and the additional microstrip conductor permits an electromagnetic coupling, a first region in which the microwave line has a first direction, a second region in which the microwave line has a second direction, and a transition region in which a change from the first direction to the second direction occurs. The microwave line is characterized in that the adjacent edges of the first microstrip conductor and of the additional microstrip conductor in the transition region are equal in length and do not cross.Type: GrantFiled: October 28, 2005Date of Patent: May 27, 2008Assignee: Atmel Germany GmbHInventor: Detlef Zimmerling
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Patent number: 7352257Abstract: A flexible print cable includes signal lines and ground lines. The signal lines and the ground lines are disposed alternately on each of an upper surface and an under surface of a film. The positions of the signal lines on the upper surface correspond to the positions of the ground lines on the under surface. The positions of the signal lines on the under surface correspond to the positions of the ground lines on the upper surface. The ground lines are wider than the signal lines. An edge part of one of the ground lines on the upper surface in a width direction overlaps a part of one of the ground lines on the under surface. Another edge part of the ground line on the upper surface in the width direction overlaps a part of another one of the ground lines on the under surface.Type: GrantFiled: December 15, 2005Date of Patent: April 1, 2008Assignee: Fujitsu Component LimitedInventors: Koki Sato, Koichi Kiryu, Hideo Miyazawa
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Publication number: 20080061900Abstract: A signal transmission circuit and method thereof are provided. The signal transmission circuit may include a plurality of signal transmission lines, each of the plurality of signal transmission lines configured to transfer data via signal currents and a reference transmission plane configured to transfer return currents corresponding to the signal currents, the reference transmission plane separated from each of the plurality of signal transmission lines by an insulating layer, the reference transmission plane including at least one separation slot.Type: ApplicationFiled: June 20, 2007Publication date: March 13, 2008Inventors: Kwang-soo Park, Jong-hoon Kim, Jae-jun Lee
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Patent number: 7336139Abstract: A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure. The cable can be coupled to destination components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.Type: GrantFiled: October 27, 2006Date of Patent: February 26, 2008Assignee: Applied Micro Circuits CorporationInventors: James Leroy Blair, Oswin M. Schreiber, Jeffrey Thomas Smith
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Publication number: 20070285187Abstract: A semiconductor device interconnecting unit configured to input/output a high-frequency signal having a millimeter wave band to/from a semiconductor device is provided. The semiconductor or device interconnecting unit includes a part of a band pass filter configured to pass therethrough the high-frequency signal having a millimeter wave band by using an LC resonance circuit, and a remainder of the band pass filter, wherein the part and the remainder are separated from each other. The part is provided inside the semiconductor device, and the remainder is provided outside the semiconductor device. The part and the remainder include capacitors having variable capacitors added thereto, respectively. A pass band for the high-frequency signal having a millimeter wave band is changed by changing capacitance values of the variable capacitors.Type: ApplicationFiled: May 18, 2007Publication date: December 13, 2007Applicant: Sony CorporationInventor: Kenichi Kawasaki
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Patent number: 7307498Abstract: A test fixture configured to receive an electrical connector is provided that includes a circuit board having a mounting area configured to be joined to an electrical connector. The circuit board has at least two layers. Contacts are provided on the circuit board, and traces extend from the contacts, wherein traces joined to adjacent contacts are distributed between the at least two layers.Type: GrantFiled: December 20, 2004Date of Patent: December 11, 2007Assignee: Tyco Electronics CorporationInventors: Dean Camiel William Vermeersch, Thinh Phuc Nguyen
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Patent number: 7281326Abstract: Techniques for reducing the number of layers in a multilayer signal routing device are disclosed. The technique may be realized as a method for routing one or more conductive traces between a plurality of electronic components of a multilayer signal routing device. The method comprises forming a first inter-component channel at a first routing layer of the multilayer signal routing device, the first inter-component channel extending between a first set of two or more electronic components of the plurality of electronic components and having a first orientation and forming a second inter-component channel at a second routing layer of the multilayer signal routing device, the second inter-component channel extending between a second set of two or more electronic components of the plurality of electronic components and having a second orientation different from the first orientation.Type: GrantFiled: December 8, 2003Date of Patent: October 16, 2007Assignee: Nortel Network LimitedInventors: Herman Kwong, Aneta Wyrzykowska, Kah Ming Soh, Eileen Goulet, Luigi Difilippo, Larry Marcanti
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Publication number: 20070236303Abstract: A serpentine guard trace for reducing far-end crosstalk of a micro strip transmission line is provided. The serpentine guard trace reduces receiving-end crosstalk caused by an electromagnetic interference of a signal of a nearby transmission line when transmitting a high speed signal through a micro strip transmission line on a printed circuit board. The serpentine guard trace is located between two nearby transmission lines and has a line width narrower than that of transmission lines for an effective serpentine structure. A characteristic impedance of the serpentine guard trace increases due to the narrow line width. Termination resistors having impedance which is the same as the characteristic impedance of the serpentine guard trace are located on both ends of the guard trace to minimize a reflection wave generated in the serpentine guard trace. The receiving-end crosstalk can be effectively reduced by using the serpentine guard trace instead of a linear guard trace.Type: ApplicationFiled: August 22, 2006Publication date: October 11, 2007Inventors: Hyun Bae Lee, Hong June Park
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Patent number: 7276986Abstract: A method for decreasing high-frequency attenuation effects in a flexible cable includes communicatively coupling signal-enhancing circuitry to a signal layer of the flexible cable.Type: GrantFiled: February 5, 2003Date of Patent: October 2, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Andrew H. Barr, Jeremy I. Wilson, Robert W. Dobbs
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Patent number: 7239213Abstract: Signaling between two or more ICs use a signaling scheme wherein a reference signal is generated at the driver side and the receiver side. The driver side reference signal is coupled to the receiver side reference signal with a transmission line channel forming a reference channel. Data signal channels are paired with a reference channel between each two adjacent data channels. Adjacent pairs of data signal channels are each separated with an empty wiring channel. The paired data signals are received in one input of a differential receiver. The reference signal of the reference channel between the two paired data channels is coupled to the other input of the two differential receivers. Coupling from the paired data channels to the reference channel appears a common mode noise and is rejected by the differential receivers. The number of channels is reduced from a full differential signaling scheme.Type: GrantFiled: August 23, 2005Date of Patent: July 3, 2007Assignee: International Business Machines CorporationInventors: Daniel M. Dreps, Anand Haridass, Bao G. Truong, Joel D. Ziegelbein
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Patent number: 7230506Abstract: A technique is presented for minimizing crosstalk between adjacent differential signal pairs in communications. A backplane embodiment wherein the backplane includes a plurality of differential signal line pairs, is presented. A first differential signal line pair can include a first differential signal line and a second differential signal line. The backplane can have the first differential signal line connected between first and second vias. The second differential signal line can be connected between third and fourth vias. A third signal line can be connected between fifth and sixth vias. The first via can be spatially adjacent to the fifth via such that a signal on the third signal line is coupled to the first differential signal line and the fourth via can be spatially located adjacent to the sixth via such that a signal on the third signal line is coupled to the second differential signal line.Type: GrantFiled: October 9, 2003Date of Patent: June 12, 2007Assignee: Synopsys, Inc.Inventors: William Beale, John T. Stonick, Jeffrey L. Sonntag
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Patent number: 7205865Abstract: Disclosed is a high frequency omni-directional 2-way power divider which includes one input terminal and two output terminals so that a signal inputted through the input terminal is uniformly distributed to the two output terminals.Type: GrantFiled: March 14, 2005Date of Patent: April 17, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-II Kang, Kyung-Hun Jang, Hyo-Sun Hwang, Jun-Seok Park
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Patent number: 7170361Abstract: A method and apparatus for substantially reducing or eliminating electromagnetic and electrostatic coupling between signal traces on a substrate is disclosed. A substrate, such as a printed circuit board, is formed with an electrically insulative layer and a conductive layer. A portion of the conductive layer is removed to form circuit traces including signal traces and voltage reference traces configured such that each signal trace is separated from each other signal trace by at least one voltage reference trace. The invention is also applied to multiple layer printed circuit boards including a single voltage reference plane, an electronic system, and a semiconductor substrate.Type: GrantFiled: April 13, 2000Date of Patent: January 30, 2007Assignee: Micron Technology, Inc.Inventor: Warren M. Farnworth
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Patent number: 7164333Abstract: A standing wave barrier for at least one radio frequency cable having a cable axis has at least one metallic base web that proceeds parallel to the cable axis from a first web end to a second web end. The web ends are coupled to one another in terms of radio frequency terms via a capacitance, so that the base web and the capacitance together form a radio frequency resonant oscillator circuit. The base web and the capacitance are situated in one of two half-shells that can be connected to one another such that the radio frequency cable is clamped between them. The capacitance has an adjustable capacitor element that has a first capacitor surface and a second capacitor surface. The first capacitor surface is connected in electrically conductive fashion to the first web end, and the second capacitor surface is connected in electrically conductive fashion to the second web end.Type: GrantFiled: March 18, 2005Date of Patent: January 16, 2007Assignee: Siemens AktiengesellschaftInventors: Helmut Greim, Jürgen Hagen
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Patent number: 7157987Abstract: A transmission line for high-frequency differential signals and having a transforming impedance is formed into a substrate. The transmission line is comprised of a first slot, the opposing surfaces of which carry a conductive surface capable of carrying electrical signals. By virtue of their dimensions, spacing and dielectric filler, the conductive surfaces constitute a transmission line. A second slot, also with opposing surfaces, each of which also carry a conductive surface but which are spaced differently than the opposing surfaces of the first slot, provide a second transmission line but with a different impedance. The impedances between the two transmission lines are transformed by an impedance transition section of transmission line that is slot section the dimensions of which are tapered to meet the different slot dimensions of the two different transmission line segments.Type: GrantFiled: December 23, 2004Date of Patent: January 2, 2007Assignee: Molex IncorporatedInventors: David L. Brunker, Victor Zaderej
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Patent number: RE39546Abstract: A forward-reverse crosstalk compensation method is provided for compensating capacitance/inductance on a printed circuit board of a connector. The method includes a forward compensation process and a reverse compensation process. The forward compensation process compensates the unbalanced capacitance in the plug of the connector by using the parallel conductive lines or wires. The reverse compensation process can be used to compensate the unbalance capacitance/inductance caused by the forward compensations in the same pair combination of the connector. In both forward compensation and reverse compensation processes, electro-magnetic fields, such as capacitors, can be formed to balance the capacitance/inductance on the printed circuit board of the connector.Type: GrantFiled: October 17, 2005Date of Patent: April 3, 2007Assignee: ADC Telecommunications, Inc.Inventor: Chansy Phommachanh
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Patent number: RE41052Abstract: A forward-reverse crosstalk compensation method is provided for compensating capacitance/inductance on a printed circuit board of a connector. The method includes a forward compensation process and a reverse compensation process. The forward compensation process compensates the unbalanced capacitance in the plug of the connector by using the parallel conductive lines or wires. The reverse compensation process can be used to compensate the unbalance capacitance/inductance caused by the forward compensations in the same pair combination of the connector. In both forward compensation and reverse compensation processes, electro-magnetic fields, such as capacitors, can be formed to balance the capacitance/inductance on the printed circuit board of the connector.Type: GrantFiled: April 2, 2007Date of Patent: December 22, 2009Assignee: ADC Telecommunications, Inc.Inventor: Chansy Phommachanh