Strip Type Patents (Class 333/246)
  • Patent number: 7522014
    Abstract: A high frequency line-waveguide converter comprises a high frequency line including a dielectric layer, a line conductor disposed on an upper surface of the dielectric layer, and a ground conductor layer disposed on the same surface so as to surround one end of the line conductor, a slot formed in the ground conductor layer so as to be substantially orthogonal to the one end of the line conductor and coupled to the line conductor, a shield conductor part disposed on a side of or in an inside of the dielectric layer so as to surround the one end of the line conductor and the slot, and a waveguide disposed at the lower side of the dielectric layer so that an opening is made opposite to the one end of the line conductor and the slot, and electrically connected to the shield conductor part.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: April 21, 2009
    Assignee: Kyocera Corporation
    Inventor: Shinichi Koriyama
  • Patent number: 7518473
    Abstract: This invention uses the structures of the finite-sized conductor-backed coplanar waveguides for designing broadband switchable and tunable signal filters. The design methods construct a plurality of configurations, which including waveguides, via holes, metallic posts, and conductor planes in the structures, for selecting, coupling, converting, and dissipating of the signals with specific electromagnetic modes and frequencies propagating through the structures. The dominant electromagnetic modes of the signals include Coplanar Waveguide Modes and Microstrip-Like Modes. The design methods thereby produce a plurality of filter types, such as bandstop filters, bandpass filters, multiband filters, etc. The design methods can apply to the structures with single and multi-layer dielectric and metallic materials, such as Integrated Circuits, Thin-film transistor Circuits, Low Temperature/High Temperature Co-fired Ceramics (LTCC/HTCC), PCB, and others.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: April 14, 2009
    Inventor: Chi-Liang Ni
  • Patent number: 7515020
    Abstract: Electric circuit device comprises electric element and two conductive plates. The electric element includes two anode electrodes and two cathode electrodes and has relatively low impedance in a frequency range between 1×10?5 to 10 GHz. The one conductive plate has lower impedance than that of the conductive plate comprising the electric element and is connected between two anode electrodes. The other conductive plate has lower impedance than that of the conductive plate comprising the electric element and is connected between two cathode electrodes. As a result, the electric circuit device which has relatively low impedance and is capable of preventing the temperature rise is provided.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: April 7, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kenichi Ezaki, Fumio Kameoka
  • Publication number: 20090078452
    Abstract: An exemplary FPCB includes a differential pair consisting of a first transmission line and a second transmission line, a signal layer with the first transmission line arranged therein, a ground layer having a void which includes the area beneath the first transmission line, and a dielectric layer lying between the signal layer and the ground layer. The second transmission line is arranged in the ground layer offset from the first transmission line in the horizontal direction. The FPCB can transmit high speed signals.
    Type: Application
    Filed: December 5, 2007
    Publication date: March 26, 2009
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YU-CHANG PAI, SHOU-KUO HSU, CHIEN-HUNG LIU
  • Publication number: 20090079523
    Abstract: A layout of a circuit board includes a first signal layer, a second signal layer, and a third signal layer. The first signal layer has a transmission line. The second signal layer is stacked below the first signal layer, and has an opening. The third signal layer is stacked below the first and second signal layers with the second signal layer sandwiched between the first and third signal layers. The third signal layer is electrically connected to the second signal layer, and both of the second and third signal layers are ground layers or power layers. An orthogonal projection of a segment of the transmission line on the third signal layer is overlapped with that of the opening on the third signal layer. Therefore, an equivalent impedance of the segment of the transmission line referring to the second and third signal layers can be increased or decreased.
    Type: Application
    Filed: August 13, 2008
    Publication date: March 26, 2009
    Applicant: COMPAL ELECTRONICS, INC.
    Inventor: Ti-Ming Hsu
  • Patent number: 7504908
    Abstract: The five conductive plates are formed on the principal surface of the stacked five dielectric layers, respectively. The two side anode electrodes are connected to the two conductive plates, while the two side cathode electrodes are connected to the three conductive plates. The two anode electrodes are connected to the two side anode electrodes, respectively. The one cathode electrode is connected to one of two side cathode electrodes, while the other cathode electrode is connected to the other one of two side cathode electrodes. The two conductive plates pass a current along the opposite direction from the three conductive plates. Where the overlap part between the two conductive plates and three conductive plates, the length in which a current flows is set not less than length of the perpendicular direction to the direction in which the current flows. As a result, the impedance can be reduced due to a reducing inductance.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: March 17, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kazuya Niki
  • Patent number: 7504913
    Abstract: A DC block with a band-notch characteristic using a defected ground structure (DGS), includes a pair of coupled lines for being formed parallel to each other on one surface of a dielectric and blocking a flow of a DC, and at least one DGS for being formed on an area of the rear surface of the dielectric corresponding to each coupled line and comprising an etched region formed by etching a part of a ground surface bonded to the dielectric and a metal region formed in the etched region. Accordingly, the stop band of the desired bandwidth in the desired communications band can be formed and the size of the communications system can be reduced.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: March 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ick-Jae Yoon, SeongSoo Lee, Young Joong Yoon, Young-Hwan Kim, Young-Eil Kim, Hyungrak Kim
  • Patent number: 7504904
    Abstract: A printed circuit laminate is provided comprising at least one conductor trace for carrying forward electrical signals in a first direction of signal propagation. The printed circuit laminate also comprises a mesh reference plane, spaced from the at least one conductor trace, for carrying return electrical signals in a second direction. The mesh reference plane defines a plurality of cells. Each cell of the plurality of cells includes at least one axis of repetition. The plurality of cells are configured so that all of the axes of repetition of each cell are different from the first direction of signal propagation. Furthermore, the frequency of cell repetition along the first direction of signal propagation is chosen to reduce differences in transmission line impedance between any two conductors on the same laminate or any two conductors on different laminates.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: March 17, 2009
    Assignee: Unisys Corporation
    Inventors: Scott Powers, Sean M. McClain, Ernest B. Bogusch
  • Patent number: 7479842
    Abstract: Apparatus and methods are provided for constructing waveguide-to-transmission line transitions that provide broadband, high performance coupling of power at microwave and millimeter wave frequencies. More specifically, exemplary embodiments of the invention include wideband, low-loss and compact coplanar waveguide-to-rectangular waveguide transition structures and asymmetric coplanar stripline (or coplanar stripline)-to-rectangular waveguide transition structures that are particularly suitable for microwave and millimeter wave applications.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: January 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Brian P. Gaucher, Janusz Grzyb, Duixian Liu, Ullrich R. Pfeiffer, Thomas M. Zwick
  • Patent number: 7477118
    Abstract: Terminal electrodes 9 for carrying a high frequency device 3 are formed on a surface of a circuit board having its reverse surface covered with a reverse surface conductor layer 6, and a plurality of signal lines 2 for exchanging a signal between the high frequency device 3 and an external circuit are formed thereon. The terminal electrode 9 is arranged at the center of the circuit board, and the signal lines 2 radially extends from the terminal electrode 9. Electromagnetic interference between the signal lines 2 can be reduced, so that out-of-band attenuation characteristics and isolation characteristics can be satisfactorily exhibited in a case where the high frequency device 3 is a duplexer.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: January 13, 2009
    Assignee: Kyocera Corporation
    Inventors: Takanori Ikuta, Wataru Koga, Hiroki Kan, Yuuko Yokota
  • Patent number: 7471165
    Abstract: In a balun for mutually converting an unbalanced line for unbalanced input/output and a balanced line for balanced input/output, the unbalanced line and the balanced line are microstrip lines including a signal line arranged on one main surface of a substrate and a ground conductor arranged on the other main surface of the substrate. The balun further includes a slot line formed by a aperture line arranged in the ground conductor in the other main surface. The microstrip line as the unbalanced line includes one end portion used as an input/output end and the other end portion that traverses the slot line, electromagnetically couples to the slot line, and functions as an electric short-circuited end. The central portion of the microstrip line as the balanced line traverses the slot line and electromagnetically couples to the slot line. Both ends of this microstrip line serves as the input/output ends.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: December 30, 2008
    Assignee: Nihon Dempa Kogyo Co. Ltd.
    Inventors: Fumio Asamura, Kenji Kawahata, Katsuaki Sakamoto
  • Patent number: 7471174
    Abstract: In the structure for connecting a board and a coaxial connector, which electrically connects a high-frequency board 20 mounted in an electroconductive casing 1 and a coaxial connector 10, a transfer board 30 is disposed between the high-frequency board 20 and the coaxial connector 10, and the high-frequency board 20 and the coaxial connector 10 are electrically connected through the transfer board 30.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: December 30, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Haruhiko Hieda, Hideki Asao
  • Patent number: 7468645
    Abstract: A signal line circuit device is disposed on top of a mounting substrate. The signal line circuit device comprises a dielectric layer, a signal line formed on one surface of the dielectric layer, and a spacer (formed from a solder or a photo solder resist), which is formed between the mounting substrate and the dielectric layer, and generates a space separation between the signal line and the mounting substrate.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: December 23, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takeshi Yamaguchi, Toshikazu Imaoka
  • Patent number: 7449975
    Abstract: A balun is a device for coupling together balanced and unbalanced electrical signals. An ultra-wide bandwidth balun can operate in a frequency band of more than 1.5 GHz to 26.5 GHz. The balun can be based upon a resistively loaded choke structure. The loading can be in the form of resistive cards or vanes. The vanes may be aligned with the electric field between the choke and an outer ground to prevent effective short circuits at points where the choke is half wavelength multiples in length. The resistive loading may also suppress higher order modes within the choke structure. The wideband balun can be very small to satisfy the tight space constraints of many modern communication applications. The balun may be fabricated using standard printed circuit board manufacturing techniques which may dramatically reduce production costs.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: November 11, 2008
    Assignee: EMS Technologies, Inc.
    Inventor: John C. Hoover
  • Patent number: 7446633
    Abstract: An inductor circuit board that is made compatible with broadband by reducing parasitic capacitance of an inductor. The inductor circuit board is comprised of a flexible substrate made of a material, such as polyimide or liquid polymer, a transmission line formed on the flexible substrate, and an inductor. The inductor has a three-dimensional conical structure in which component inductors having different inductances are continuously connected to each other, with one end thereof connected to a portion of the transmission line between an input end and an output end thereof, and is formed according to a transmission line pattern by wiring on a plurality of surface layers of the flexible substrate and connecting portions wired on the surface layers by vias that connect between the layer surfaces of the substrate, such that the inductor is expanded in a fan-like manner as it is farther from the one end connected to the transmission line.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: November 4, 2008
    Assignee: Fujitsu Limited
    Inventor: Takatoshi Yagisawa
  • Patent number: 7439831
    Abstract: A transition circuit includes: a waveguide having a notched portion formed by cutting away a portion of the tube wall of the waveguide from the end portion of the waveguide; a dielectric substrate in which a portion extending outside the waveguide through the notched portion of the waveguide is formed; a plurality of polygonal conductor patterns formed regularly disposed on the dielectric substrate; a ground conductor formed on the dielectric substrate; through holes electrically connecting this ground conductor and each of the conductor patterns; an open stub formed on the dielectric substrate; and the conductor of a microwave transmission line, which is formed on the portion of the dielectric substrate, extending outside the waveguide, and which is electrically connected to the open stub.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: October 21, 2008
    Assignee: Mitsubishi Electric Corporation
    Inventors: Araki Ohno, Hideyuki Ohhashi, Yukihiro Tahara, Katsuhisa Kodama
  • Patent number: 7432779
    Abstract: Transmission line impedance matching for matching an impedance discontinuity on a transmission signal trace with one or more non-transmission traces disposed near the transmission signal trace at a region corresponding to the impedance discontinuity.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: October 7, 2008
    Assignee: Intel Corporation
    Inventors: Hyunjun Kim, Joong-Ho Kim, Dong-Ho Han, Jiangqi He
  • Patent number: 7429902
    Abstract: A differential transmission line includes: a substrate; a ground conductor layer; and a first and a second signal conductor disposed in parallel to each other on the substrate. The first signal conductor and the ground conductor layer compose a first transmission line, whereas the second signal conductor and the ground conductor layer compose a second transmission line. The first transmission line and the second transmission line compose a differential transmission line. The differential transmission line includes a curved region, with a straight region being connected to each end of the curved region. In the ground conductor layer in the curved region, a plurality of slots orthogonal to a local transmission direction of signals in the curved region are formed, and the slots are connected to one another on the inner side of the curvature.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: September 30, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kanno, Kazuyuki Sakiyama, Ushio Sangawa, Tomoyasu Fujishima
  • Publication number: 20080231393
    Abstract: A semiconductor device comprising a signal line and ground line is disclosed. The signal line comprises an opening and at least a portion of the ground line is in the opening in the signal line.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 25, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsien-Wei Chen, Hsueh-Chung Chen, Shin-Puu Jeng
  • Patent number: 7411475
    Abstract: A superconductor filter comprises a plurality of resonance elements arranged between input-output lines formed on a substrate. Metal conductor sections serving to inhibit the spatial coupling between the adjacent resonance elements are arranged between prescribed resonance elements, and a prescribed resonance element is coupled with another resonance element by a coupling transmission line. It follows that each resonance element is coupled with another resonance element by the direct coupling via the coupling transmission line or by the spatial coupling via the space.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: August 12, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Fuke, Yoshiaki Terashima, Fumihiko Aiga, Mutsuki Yamazaki, Hiroyuki Kayano, Tatsunori Hashimoto
  • Patent number: 7409200
    Abstract: A first signal conditioning circuit is formed from a first portion, a second portion and a third portion. Signal conditioning functions of each of these portions are facilitated by a predetermined type of integrated semiconductor die within which they are formed. Two different semiconductor dies are thus provided for facilitating integration of the first through third signal conditioning portions therein. Wire bonds are provided between the two different semiconductor dies in order to form circuit paths between the different first through third portions. The signal routing using between the two different semiconductor dies provides for completing of the first signal conditioning circuit having a first signal conditioning function. For example, circuits such as interstage matching circuits are disposed on a different semiconductor die than power amplifier circuits.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: August 5, 2008
    Assignee: SiGe Semiconductor Inc.
    Inventors: James H. Derbyshire, Alan J. A. Trainor
  • Patent number: 7405634
    Abstract: An improved method and apparatus for altering the effective electrical length of trace on a circuit board. In the present invention small tabs of etch are routed perpendicular to the trace in the unused areas between adjacent traces. In an embodiment of the invention, a method of tuning the delay characteristics of a transmission line is implemented by inserting compensation tabs into the unused area between the segments of adjacent straight traces or a serpentine run. Utilizing the method and apparatus of the present invention, it is possible to achieve significantly greater electrical length for an electrical trace without introducing coupling problems or utilizing large amounts of space on a circuit board.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: July 29, 2008
    Assignee: Dell Products L.P.
    Inventors: James B. Mobley, Robert Washburn
  • Patent number: 7403080
    Abstract: A transmission line apparatus includes: a substrate 101 with a ground conductor plane; and first and second signal strips 102a, 102b supported on the substrate 101 in parallel with each other. The apparatus further includes at least one additional capacitance element 301 that connects the first and second signal strips 102a, 102b together. The element 301 includes: a first additional conductor 303 spaced from the first signal strip 102a; a second additional conductor 305 spaced from the second signal strip 102b; and a third additional conductor 307 connected to the first and second additional conductors 303, 305 at respective points. When measured in a signal transmission direction, the smallest width W3a of the third additional conductor 307 is shorter than the length L1 or L2 of the first or second additional conductor 303 or 305. And the additional capacitance element 301 has a resonant frequency that is higher than the frequency of a signal being transmitted.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: July 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kanno, Kazuyuki Sakiyama, Ushio Sangawa, Tomoyasu Fujishima
  • Patent number: 7397320
    Abstract: A non-uniform transmission line, including at least a first section with length L1, uniform width W1 and thickness h1, and a second section with length L2, uniform width W2 and thickness h2, joined together to form a composite structure and arranged in any of at least three distinct configurations. The composite structure (first section plus second section) may be periodic or non-periodic. Length and/or width and/or thickness of each of the two sections may be varied to provide desired values for characteristic impedance, cutoff frequency and/or time delay for signal propagation.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: July 8, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventor: Syed Asadulla Bokhari
  • Patent number: 7391288
    Abstract: A high frequency resonator circuit and method of fabrication is described which has a resonant frequency independent of physical resonator dimensions. The resonator operates in a zeroeth-order mode on a composite right/left-handed (CRLH) transmission line (TL). The LH wave properties of the CRLH-TL contributing anti-parallel phase and group velocities. In one variation, the unit cells are formed from microstrip techniques, preferably creating alternating interdigitated capacitors and stub inductors. The resonant wavelength of the resonator is dependent on the electrical characteristics of the unit cells and not the physical size of the resonator in relation to the desired resonant wavelength. The resonator is created with at least 1.5 unit cells and the Q of the resonator is substantially independent of the number of unit cells utilized. The resonator circuit is particularly well suited for reducing resonator size, and allows resonators of various wavelengths to be fabricated within a fixed board area.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: June 24, 2008
    Assignee: The Regents of the University of California
    Inventors: Tatsuo Itoh, Atsushi Sanada, Christophe Caloz
  • Patent number: 7385455
    Abstract: The invention discloses a monolithic integrated circuit with at least one signal connection carrying a signal and with an interference suppression device integrated in the circuit to reduce radiated interference. The interference suppression device has at least one stripline having a section whose beginning is coupled to the signal connection and whose end is short-circuited, wherein a length of the section is chosen as a function of a predefinable frequency, in particular as a function of a frequency of the radiated interference that is to be suppressed.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: June 10, 2008
    Assignee: ATMEL Germany GmbH
    Inventor: Harald Fischer
  • Patent number: 7385459
    Abstract: An apparatus in one example has: a substrate having a microstrip line; a capacitor at a predetermined location along the microstrip line, the capacitor producing a discontinuity; and a ground plane assembly on the substrate, the ground plane assembly having an opening that compensates for the discontinuity of the capacitor.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: June 10, 2008
    Assignee: Northrop Grumman Corporation
    Inventors: Dahweih Duan, Alex Chau, Janice Allen, legal representative, David Brunone, Barry Allen
  • Patent number: 7378919
    Abstract: A planar microwave line is provided, having a dielectric substrate and a planar arrangement of a first microstrip conductor and at least one additional microstrip conductor, in which a gap between the first microstrip conductor and the additional microstrip conductor permits an electromagnetic coupling, a first region in which the microwave line has a first direction, a second region in which the microwave line has a second direction, and a transition region in which a change from the first direction to the second direction occurs. The microwave line is characterized in that the adjacent edges of the first microstrip conductor and of the additional microstrip conductor in the transition region are equal in length and do not cross.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: May 27, 2008
    Assignee: Atmel Germany GmbH
    Inventor: Detlef Zimmerling
  • Publication number: 20080116989
    Abstract: A differential transmission line includes: a substrate; a ground conductor layer; and a first and a second signal conductor disposed in parallel to each other on the substrate. The first signal conductor and the ground conductor layer compose a first transmission line, whereas the second signal conductor and the ground conductor layer compose a second transmission line. The first transmission line and the second transmission line compose a differential transmission line. The differential transmission line includes a curved region, with a straight region being connected to each end of the curved region. In the ground conductor layer in the curved region, a plurality of slots orthogonal to a local transmission direction of signals in the curved region are formed, and the slots are connected to one another on the inner side of the curvature.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 22, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kanno, Kazuyuki Sakiyama, Ushio Sangawa, Tomoyasu Fujishima
  • Patent number: 7375983
    Abstract: A circuit board includes a first group of layers located close to a top side of the circuit board, and a second group of layers located close to an underside of the circuit board. Signals which are fed to input and output contact terminals on the top side of the circuit board are passed along at least one of the layers of the group. Signals which are fed to input and output contact terminals on the underside of the circuit board are passed along at least one of the layers of the second group. The contact-making holes for connecting the input and output contact terminals to the layers of the first and second groups are preferably formed as blind contact-making holes.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: May 20, 2008
    Assignee: Infineon Technologies AG
    Inventors: Srdjan Djordjevic, Wolfgang Hoppe
  • Patent number: 7375290
    Abstract: A printed circuit board with vias that reduce or eliminate radio frequency interference and method of forming the same. The printed circuit board includes non-conductive layers, conductive-layers interspersed between the non-conductive layers, vias extending through the non-conductive layers and the conductive layers, radio frequency absorbing material within each of the vias, where the radio frequency absorbing material is at a conductive layer within the printed circuit board at which a conductive trace is not connected to a via, an insulating layer over each radio frequency absorbing material, and a cylindrical conductive material within via and over each insulating layer.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: May 20, 2008
    Inventors: Young Hoon Kwark, Christian Schuster
  • Patent number: 7355491
    Abstract: In one aspect, a signal path is described. The signal path has a nominal impedance over a specified bandwidth and interconnects a port of a microwave circuit package and a microwave component mounted in the microwave circuit package. The signal path includes an inductive transition and first and second capacitive structures. The inductive transition extends from a first point on the signal path to a second point on the signal path and has an excess impedance above the nominal impedance. The first and second capacitive structures respectively shunt the first and second points on the signal path to compensate the excess impedance of the inductive transition. The inductive transition and the first and second capacitive structures approximate a filter having an impedance substantially matching the nominal impedance over the specified bandwidth.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: April 8, 2008
    Assignee: Avago Technologies Wireless IP Pte Ltd
    Inventors: Dean B. Nicholson, Reto Zingg, Keith W. Howell, Eric R. Ehlers
  • Patent number: 7352260
    Abstract: Provided is a microwave and millimeter wave transceiver package technology that can unify the transceiver composed of an amplifier, a filter and a mixer into a low temperature co-fired ceramic (LTCC) module package by using an LTCC method utilizing a multilayer dielectric substrate, thereby achieving miniaturization, a loss reduction and moderate price. The transceiver includes a plurality of cavities arrayed in a multilayer substrate, an amplifier and a mixer mounted in the cavities and a filter provided with a strip line between the amplifier and the mixer.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: April 1, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bong-Su Kim, Kwang-Seon Kim, Ki-Chan Eun, Myung-Sun Song
  • Patent number: 7336136
    Abstract: A transmission oscillator of differential output configuration is incorporated into a high frequency IC. Further, an equivalent impedance having an impedance equivalent to the impedance connected with a regular output terminal is provided. Or, a dummy external terminal for outputting transmit signals in opposite phase is provided. One of the differential outputs of the transmission oscillator is inputted to the power amplifier through the regular output terminal. The other of the differential outputs is connected to the equivalent impedance or the dummy external terminal.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: February 26, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Koichi Yahagi, Kazuhiko Hikasa, Ryoichi Takano
  • Patent number: 7336139
    Abstract: A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure. The cable can be coupled to destination components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: February 26, 2008
    Assignee: Applied Micro Circuits Corporation
    Inventors: James Leroy Blair, Oswin M. Schreiber, Jeffrey Thomas Smith
  • Patent number: 7330084
    Abstract: A printed circuit board for a high-speed semiconductor package uses bonding wires as a shield structure, e.g., to shield an open portion of signal transmission lines, and thereby reduce the likelihood of coupling noises, e.g., between signal transmission lines.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: February 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Seok Lee, Kyung-Lae Jang, Tae-Je Cho, Ki-Won Choi
  • Patent number: 7307498
    Abstract: A test fixture configured to receive an electrical connector is provided that includes a circuit board having a mounting area configured to be joined to an electrical connector. The circuit board has at least two layers. Contacts are provided on the circuit board, and traces extend from the contacts, wherein traces joined to adjacent contacts are distributed between the at least two layers.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: December 11, 2007
    Assignee: Tyco Electronics Corporation
    Inventors: Dean Camiel William Vermeersch, Thinh Phuc Nguyen
  • Patent number: 7307497
    Abstract: A component for the transmission of electromagnetic waves and a method for producing such a component is provided, whereby conductors of a coplanar waveguide system are embedded in a membrane such that they are at least partially suspended across a back-etched area of the substrate for the decoupling of the conductors from the substrate (1). An additional substrate is connected to the bottom side of the back-etched area of the substrate in such a way that a hollow cavity is formed.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: December 11, 2007
    Assignee: Atmel Germany GmbH
    Inventor: Mojtaba Joodaki
  • Patent number: 7307293
    Abstract: A direct-connect signaling system including a printed circuit board and first and second integrated circuit packages disposed on the printed circuit board. A plurality of electric signal conductors extend between the first and second integrated circuit packages suspended above the printed circuit board.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: December 11, 2007
    Assignee: Silicon Pipe, Inc.
    Inventors: Joseph C. Fjelstad, Para K. Segaram, Belgacem Haba
  • Publication number: 20070279158
    Abstract: An electrical connector including a lead frame assembly of a first dielectric material that includes a pocket filled with a second dielectric material. A first ground reference, which may be either a ground contact or conductor or a virtual ground defined between signal contacts of a differential signal pair, extends in the first dielectric material and has a first physical length. A second ground reference having a different physical length than the first length extends in the first dielectric material and also through the pocket. The combination of the length of the second ground reference through the pocket along with the difference in the dielectric constants associated with the first and second dielectric materials, provides for equalizing or matching the electrical lengths of these two references having different physical lengths. This may aid in reducing slot-line mode of a co-planar waveguide.
    Type: Application
    Filed: January 24, 2007
    Publication date: December 6, 2007
    Inventors: Stephen B. Smith, Jan De Geest, Stefaan Hendrik Jozef Sercu
  • Patent number: 7301418
    Abstract: A differential transmission line includes: a substrate; a ground conductor layer; and a first and a second signal conductor disposed in parallel to each other on the substrate. The first signal conductor and the ground conductor layer compose a first transmission line, whereas the second signal conductor and the ground conductor layer compose a second transmission line. The first transmission line and the second transmission line compose a differential transmission line. The differential transmission line includes a curved region, with a straight region being connected to each end of the curved region. In the ground conductor layer in the curved region, a plurality of slots orthogonal to a local transmission direction of signals in the curved region are formed, and the slots are connected to one another on the inner side of the curvature.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: November 27, 2007
    Assignee: Matshushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kanno, Kazuyuki Sakiyama, Ushio Sangawa, Tomoyasu Fujishima
  • Patent number: 7298234
    Abstract: High-speed interconnect systems for connecting two or more electrical elements are provided. Interconnect system has the means, which could reduce the microwave loss induced due to the dielectrics. Reducing the effective loss tangent of the dielectrics reduces the microwave loss. With optimize design of the interconnects, the speed of the electrical signal can be made to closer to the speed of the light. The interconnect systems consists of the electrical signal line, inhomogeneous dielectric systems and the ground line, wherein inhomogeneous dielectric system consisting of the opened-trenches into the dielectric substrate or comb-shaped dielectrics to reduce the microwave loss. Alternatively dielectric structure can have the structure based on the fully electronic or electromagnetic crystal or quasi crystal with the line defect. Alternatively, dielectric structure can be made to comb-shaped structure with teethes having thickness and space making the air pocket to reduce the microwave loss.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: November 20, 2007
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 7292449
    Abstract: A digital apparatus having a cable comprising a plurality of high-speed and low-speed signal carrying conductors, the conductors carrying the low-speed signals are bypassed to a signal ground with selected values of capacitance so as to become virtual signal ground return conductors for the high-speed signal conductors. The selected values of capacitance have a lower impedance then the characteristic impedance of the conductors in the cable. The cable may be a multi conductor cable, a ribbon cable, a flex cable, a twisted pair cable, etc. In a similar fashion, signal conductors on a printed circuit board, not having a separate ground plane layer, may create virtual signal ground returns from the low-speed signal carrying conductors that are proximate to the high-speed signal carrying conductors for reduction of radiated electromagnetic radio frequency interference.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: November 6, 2007
    Assignee: Lexmark International, Inc.
    Inventors: Paul Kevin Hall, Keith Bryan Hardin, Brandon Robert Shields
  • Patent number: 7285841
    Abstract: In a signal processing apparatus for transmitting or processing a signal, a substrate has a recessed portion in a surface of the substrate, a first interconnecting conductor is on the substrate, including at least the recessed portion of the substrate, and a dielectric support film is on the substrate opposite the recessed portion of the substrate with an air space between the dielectric support film and the substrate. A second interconnecting conductor is on a part of a surface of the dielectric support film. The apparatus has a simple structure and reduced transmission loss and can be made in a simple manufacturing process.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: October 23, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yukihisa Yoshida, Tamotsu Nishino, Yoshiyuki Suehiro, Sangseok Lee, Kenichi Miyaguchi, Jiwei Jiao
  • Patent number: 7281326
    Abstract: Techniques for reducing the number of layers in a multilayer signal routing device are disclosed. The technique may be realized as a method for routing one or more conductive traces between a plurality of electronic components of a multilayer signal routing device. The method comprises forming a first inter-component channel at a first routing layer of the multilayer signal routing device, the first inter-component channel extending between a first set of two or more electronic components of the plurality of electronic components and having a first orientation and forming a second inter-component channel at a second routing layer of the multilayer signal routing device, the second inter-component channel extending between a second set of two or more electronic components of the plurality of electronic components and having a second orientation different from the first orientation.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: October 16, 2007
    Assignee: Nortel Network Limited
    Inventors: Herman Kwong, Aneta Wyrzykowska, Kah Ming Soh, Eileen Goulet, Luigi Difilippo, Larry Marcanti
  • Patent number: 7283347
    Abstract: A digital variable capacitor package is provided as having a ground plane disposed on predetermined portion of the top surface of a substrate. An elongated signal electrode may also be disposed on the substrate and including a first end defining an input and a second end extending to a substantially central region of the top surface of the substrate. This elongated signal electrode is disposed to be electrically isolated from the ground plane. A number of elongated cantilevers are disposed on the substrate and each include first ends coupled to the second end of the signal electrode and each further include second ends suspended over different predetermined portions of the ground plane. In operation, one or more of the cantilevers may be actuated to move portion thereof into close proximity to the ground plane for providing one or more discrete capacitance values.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: October 16, 2007
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: James R. Reid, Jr.
  • Patent number: 7276987
    Abstract: A high frequency line-waveguide converter comprises a high frequency line including a dielectric layer, a line conductor disposed on an upper surface of the dielectric layer, and a ground conductor layer disposed on the same surface so as to surround one end of the line conductor, a slot formed in the ground conductor layer so as to be substantially orthogonal to the one end of the line conductor and coupled to the line conductor, a shield conductor part disposed on a side of or in an inside of the dielectric layer so as to surround the one end of the line conductor and the slot, and a waveguide disposed at the lower side of the dielectric layer so that an opening is made opposite to the one end of the line conductor and the slot, and electrically connected to the shield conductor part.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: October 2, 2007
    Assignee: Kyocera Corporation
    Inventor: Shinichi Koriyama
  • Patent number: 7262673
    Abstract: A transmission line of striptype includes a dielectric having a local dielectric constant alternating between at least two different values. It can be manufactured by applying a first layer (3) of a material having a first dielectric constant ?1 to a base (1), thereupon patterning the first layer to produce recesses, then applying a second layer (5) of a material having a second dielectric constant ?2 over the first layer to at least completely fill the recesses to obtain a flat surface, and finally applying a conductor on top of the produced structure. The transmission line can be used for example for various types of filters and delay lines, is simple and has a low cost for its manufacture and can give a space-saving design of different components.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: August 28, 2007
    Assignee: Hesselbom Innovation & Development HB
    Inventor: Hjalmar Hesselbom
  • Patent number: 7259644
    Abstract: A substrate having a microstrip line structure is provided comprising a trench provided at least in one main surface of a base body constituting the substrate having an inner surface geometry of an unbent curved surface and corresponding to the pattern of the microstrip line; a laminate film having a ground conductive layer and an insulating layer formed along the inner surface geometry of the trench; and a signal line layer constituting the microstrip line formed on the laminate film; where the signal line layer has a configuration separated for each trench.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: August 21, 2007
    Assignee: Sony Corporation
    Inventor: Naoto Sasaki
  • Patent number: 7248134
    Abstract: An inductor and capacitor implemented with build-up vias. The inductor and capacitor comprise a conductor plane, a dielectric layer, an inductor/capacitor inducing build-up via and a conductor layer. There is a conducting material in the inductor/capacitor inducing build-up via and a fist end thereof is in contact with the conductor plane. The length of the inductor inducing build-up via is larger than one fourth of a signal wavelength while the length of the conductor inducing build-up via is smaller than one fourth of a signal wavelength.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: July 24, 2007
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventors: Sung-Mao Wu, Chi-Tsung Chiu, Chih-Pin Hung