Having Long Line Elements Patents (Class 333/33)
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Patent number: 12212029Abstract: A digital phase shifter of the present invention is a digital phase shifter in which digital phase shift circuits are cascade-connected, each of the digital phase shift circuits including a signal line, a pair of inner lines provided on both sides of the signal line, a pair of outer lines provided on outer sides of the inner lines, a first ground conductor connected to one ends of the inner lines and one ends of the outer lines, a second ground conductor connected to the other ends of the outer lines, and a pair of electronic switches provided between the other ends of the inner lines and the second ground conductors.Type: GrantFiled: August 8, 2022Date of Patent: January 28, 2025Assignee: Fujikura Ltd.Inventor: Yusuke Uemichi
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Patent number: 12183972Abstract: A three-dimensional (3D) horn air waveguide antenna assembly and its method of manufacture include a bottom stamped metal layer defining a set of electrical connection ports and a plurality of top stamped metal layers arranged atop the bottom stamped metal layer with a brazing material deposited between each stamped metal layer, the plurality of top stamped metal layers defining a channel area proximate to the bottom stamped metal layer, a horn air waveguide antenna area that widens from a bottom portion to a top portion, and a slot area fluidly connecting the channel and horn air waveguide antenna areas.Type: GrantFiled: April 4, 2022Date of Patent: December 31, 2024Assignee: APTIV TECHNOLOGIES AGInventors: Scott Brandenburg, David Zimmerman
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Patent number: 12155363Abstract: A circuit device includes a semiconductor device and an impedance matching network. The impedance matching network includes a superconductor material forming at least one inductor of the circuit device, and the superconductor material exhibits a kinetic inductance per unit square when in a superconducting state. The impedance matching network is configured to transform an impedance of the semiconductor device to match a predetermined second impedance during operation of the circuit device.Type: GrantFiled: July 20, 2021Date of Patent: November 26, 2024Assignee: Google LLCInventor: Joseph Cheney Bardin
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Patent number: 12120815Abstract: A multilayer substrate includes an insulator that includes a first region and a second region that is thinner than the first region, and a first signal line and a second signal line that are structured to extend across the first region and the second region. In a region in which the first signal line and the second signal line face each other, a line width of the first signal line and a line width of the second signal line are smaller in the second region than in the first region, and a distance between the first signal line and the second signal line is smaller in the second region than in the first region.Type: GrantFiled: June 13, 2023Date of Patent: October 15, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Tomohiro Nagai
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Patent number: 12119531Abstract: A transmission line includes a first structure including a first insulating substrate and a ground conductor on the first insulating substrate, a second structure including a second insulating substrate and a signal line, ground conductors, and interlayer connection conductors on or in the second insulating substrate, a third insulating substrate including openings, and metal bonding materials that bond the structure and the structure to each other with the third insulating substrate interposed therebetween. The first and second insulating substrates are stacked with the third insulating substrate interposed therebetween to define hollow portions. The signal line and the ground conductor partially face each other across the hollow portions in a bonding direction. The ground conductor includes openings in regions that overlap the signal line but do not overlap the hollow portions when looking in plan view in the bonding direction.Type: GrantFiled: March 10, 2022Date of Patent: October 15, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Nobuo Ikemoto
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Patent number: 12113493Abstract: A power amplifier module can be formed that includes metamaterial matching circuits. This power amplifier module can be included as part of a front-end module of a wireless device. The front-end module can replace a passive duplexer with an active duplexer that uses the power amplifier module in combination with a low noise amplifier circuit that can include a metamaterial matching circuit. The combination of PA and LNA circuits that utilize metamaterials can provide the functionality of a duplexer without including a stand-alone or passive duplexer. Thus, in certain cases, the front-end module can provide duplexer functionality without including a separate duplexer. Advantageously, in certain cases, the size of the front-end module can be reduced by eliminating the passive duplexer. Further, the loss introduced into the signal path by the passive duplexer is eliminated improving the performance of the communication system that includes the active duplexer.Type: GrantFiled: November 7, 2022Date of Patent: October 8, 2024Assignee: Skyworks Solutions, Inc.Inventor: Hanseung Lee
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Patent number: 12100880Abstract: A high-frequency module including a transmission line for a high-frequency signal and a waveguide conversion structure, capable of reducing the size thereof, and a method for manufacturing such a high-frequency module are provided. A high-frequency module includes a core material in which a first dielectric layer is provided between a first conductive layer and a second conductive layer, a laminated filter in which a plurality of core materials and dielectric layers are alternately laminated, and a through hole pierces therethrough from a lowermost conductive layer provided so as to be in contact with the lowermost dielectric layer to the uppermost first conductive layer, a first surface dielectric layer provided above the laminated filter, and a first surface conductive layer provided above the first surface dielectric layer, the first surface conductive layer including a transmission line for a high-frequency signal and a ground GND.Type: GrantFiled: January 9, 2020Date of Patent: September 24, 2024Assignee: NEC CORPORATIONInventor: Takashi Okawa
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Patent number: 12087991Abstract: An aspect of the present invention reduces loss that may occur in cases where electromagnetic waves are guided from one main surface side of a substrate to the other main surface side of the substrate. A waveguide device (10, 10A, 20) includes: a substrate (11); a first conductor layer (12A) and a second conductor layer (12B) which are provided on both main surfaces of the substrate, respectively; a main conductor post (MP) which penetrates between the both main surfaces; and one or more sub-conductor posts (SP) which penetrate between the both main surfaces and which, together with the main conductor post, guide a TEM mode or a quasi-TEM mode.Type: GrantFiled: April 7, 2020Date of Patent: September 10, 2024Assignee: FUJIKURA LTD.Inventor: Yusuke Uemichi
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Patent number: 12087990Abstract: A waveguide launch system configured for translating radio frequency signal waves is provided. The system comprises a first printed circuit board lamina comprising an electrically conductive ground member and configured for attachment of a separate waveguide element, having a first cross-section area, thereto. A second printed circuit board lamina comprising an electrically conductive backshort cover configured to reflect the RF signal waves is bonded to a first printed circuit board lamina. An electrically conductive barrier arrangement extends through the second printed circuit board lamina. The electrically conductive barrier arrangement and the electrically conductive backshort cover form an integrated electrically conductive backshort volume of an integrated backshort having a second cross-section area. The second cross-section area is smaller than the first cross-section area.Type: GrantFiled: April 13, 2018Date of Patent: September 10, 2024Assignee: SAAB ABInventor: Sten Gunnarsson
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Patent number: 12085977Abstract: Provided are embodiments for monitoring clock drift. Embodiments may include an XOR gate that is configured to receive a first clock signal from a first clock source and a second clock signal from a second clock source, wherein the XOR logic gate is further configured to generate a switching output based on an XOR operation of the first clock signal and the second clock signal, and a rising edge detector and a falling edge detector that are configured to detect a rising edge and a falling edge of the switching output. Embodiments may also include an AND gate that is configured to threshold compare the rising edge to a configurable threshold to determine if a fault condition exists indicating clock drift between the first clock signal and the second clock signal and provide an indication of the fault condition based at least in part on the comparison.Type: GrantFiled: December 17, 2021Date of Patent: September 10, 2024Assignee: HAMILTON SUNDSTRAND CORPORATIONInventors: Michael A. Wilson, Gary L. Hess
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Patent number: 12033905Abstract: A device (2) is provided on an upper surface of the device substrate (1). A sealing frame (16) made of a non-electrolytic plating reactive catalyst metal is provided on the upper surface of the device substrate (1) and surrounds the device (2). An upper surface of the device substrate (1) and a lower surface of the cap substrate (10) are joined in a hollow state through the sealing frame (16). A plurality of electrodes (8, 11, 12) are connected to the device (2) and extended out of the device substrate (1) and the cap substrate (10). A metal film (20) is provided on an outer surface of the sealing frame (16) and not provided on the device substrate (1) and the cap substrate (10).Type: GrantFiled: March 6, 2019Date of Patent: July 9, 2024Assignee: Mitsubishi Electric CorporationInventors: Koichiro Nishizawa, Takayuki Hisaka
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Patent number: 11985760Abstract: A printed circuit board (PCB), including: a ground reference layer; a pre-impregnated (pre-preg) layer having a surface; a first transmission line positioned on the surface; a second transmission line positioned on the surface spaced-apart from the first transmission line a first distance; and a solder mask layer positioned on the surface of the pre-preg layer and surrounding the first transmission line and the second transmission line, the solder mask layer having a thickness and a dielectric constant, wherein the thickness of the solder mask layer and a value of the dielectric constant of the solder mask layer cause convergence of electric fields associated with the first transmission line to be within a second distance from the first transmission line.Type: GrantFiled: April 19, 2022Date of Patent: May 14, 2024Assignee: Dell Products L.P.Inventors: Douglas S. Winterberg, Wan-Ju Kuo, Bhyrav M. Mutnury
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Patent number: 11940659Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chia-Ping Lai
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Patent number: 11888204Abstract: A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.Type: GrantFiled: May 9, 2022Date of Patent: January 30, 2024Assignee: NXP B.V.Inventors: Mustafa Acar, Danny Wayling Chang, Dominicus Martinus Wilhelmus Leenaerts, Philipp Franz Freidl
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Patent number: 11882655Abstract: A high-speed transmission circuit comprises, as part of a signal path, a connector pin disposed on a pad that comprises an unused pad region. The unused pad region is not considered part of the signal path but is part of a resonant sub-circuit. In various embodiments, by properly adjusting the dimensions of the pad region and other structures in the high-speed transmission circuit, resonant frequencies of the sub-circuit are shifted to a frequency range that is outside of the frequency range of interest in the signal path, thereby, reducing insertion loss and increasing signal integrity without compromising mechanical stability.Type: GrantFiled: May 29, 2020Date of Patent: January 23, 2024Assignee: DELL PRODUCTS L.P.Inventors: Umesh Chandra, Douglas Wallace, Bhyrav Mutnury
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Patent number: 11881715Abstract: An electronic device may include wireless circuitry having a transformer adjustable between first, second, and third modes. The transformer may have first, second, third, and fourth inductors. The third inductor may be magnetically coupled to the first and second inductors with equal coupling constants. The fourth inductor may be magnetically coupled to the first and second inductors with inverse coupling constants. First and second adjustable capacitors coupled to the third and fourth inductors may receive control signals that place the transformer into a selected one of the first, second, or third modes. In the first mode the transformer exhibits a passband that overlaps first and second bands. In the second mode, the transformer passes signals in the second band while filtering interference in the first band. In the third mode, the transformer passes signals in the first band while filtering interference in the second band.Type: GrantFiled: May 23, 2022Date of Patent: January 23, 2024Assignee: Apple Inc.Inventors: Hongrui Wang, Abbas Komijani
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Patent number: 11843157Abstract: An aspect of the present invention is to reduce return loss in a mode converter. A mode converter (10) includes an excitation pin (through via TV) configured to carry out mutual conversion between a waveguide mode of a post-wall waveguide (PW) and a waveguide mode of a microstrip line (MS). The mode conductor includes a pair of wide walls (conductor layers 12 and 13), in which first and second anti-pads (anti-pads 12c, 13c) are formed, respectively. The first and second anti-pads each have an inner edge including the excitation pin and each have an outer size (diameter D12) that is more than 5 times and less than 6 times as large as the diameter (DT) of the excitation pin.Type: GrantFiled: April 27, 2020Date of Patent: December 12, 2023Assignee: FUJIKURA LTD.Inventor: Yusuke Uemichi
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Patent number: 11839426Abstract: Microwave applicators are disclosed which include a first transmission line segment, a second transmission line segment, and a third transmission line segment. The first transmission line segment includes a first inner conductor, a first dielectric disposed on the first inner conductor, and a first outer conductor disposed on the first dielectric. The second transmission line segment includes a second inner conductor, a second dielectric disposed on the second inner conductor, and a second outer conductor disposed on the second dielectric. The third transmission line segment includes a third inner conductor disposed on the third inner conductor, a third outer conductor disposed on the proximal end of the third dielectric. The impedance of the second transmission line segment can be adjusted by adjusting the length of the third transmission line segment.Type: GrantFiled: September 28, 2020Date of Patent: December 12, 2023Assignee: Covidien LPInventor: Joseph D. Brannan
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Patent number: 11837560Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.Type: GrantFiled: August 26, 2021Date of Patent: December 5, 2023Assignee: NXP USA, INC.Inventors: Michael B. Vincent, Giorgio Carluccio, Maristella Spella, Scott M. Hayes
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Patent number: 11774474Abstract: Embodiments described herein relate to a method for modifying transmission line characteristics. The method may include: making a first determination of a null frequency of an input signal to a transmission line; performing an analysis to make a second determination of a wavelength of the input signal using, at least in part, the null frequency; making a third determination, based on the analysis, of a half wavelength of the input signal; calculating, based on the half wavelength, a total stub length; and adding a trace to a stub associated with a via, wherein the stub and the trace are a length that is at least a portion of the half wavelength of the input signal.Type: GrantFiled: April 5, 2022Date of Patent: October 3, 2023Assignee: DELL PRODUCTS L.P.Inventors: Sandor T. Farkas, Bhyrav M. Mutnury
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Patent number: 11764454Abstract: A combiner/divider and method of designing a combiner/divider providing a single impedance transformation between a sum port and component ports with a determined insertion-loss variation over a determined operating bandwidth. Preferably the lowest number impedance-transformer sections are included that provide impedance transformation between the sum port and the component ports. A junction network preferably electrically connects a junction-network sum node to each of N junction-network component nodes. The junction-network sum node is connected to the sum port through at least a first impedance-transformer section of the ZT impedance-transformer sections. Each junction-network component node is connected to a respective one of the plurality of component ports through at least a respective second impedance-transformer section of the ZT impedance-transformer sections.Type: GrantFiled: October 19, 2022Date of Patent: September 19, 2023Assignee: Werlatone, Inc.Inventors: Allen F. Podell, Ky-Hien Do, William Deering
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Patent number: 11757416Abstract: A matching circuit includes an input terminal, an output terminal, a first impedance component, a first set of switching devices, a second impedance component, a second set of switching devices and a controller. The first impedance component includes a first terminal coupled between the input terminal and the output terminal, and a second terminal. The first set of switching devices is coupled to the second terminal of the first impedance component, the controller and a reference terminal. The second impedance component includes a first terminal coupled between the second terminal of the first impedance component and the first set of switching devices, and a second terminal. The second set of switching devices is coupled to the second terminal of the second impedance component, the controller and the reference terminal. The controller controls the first set of switch devices and the second set of switch devices according to a detection signal.Type: GrantFiled: April 1, 2021Date of Patent: September 12, 2023Assignee: RichWave Technology Corp.Inventors: Chih-Sheng Chen, Yun-Jhu Lai
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Patent number: 11742559Abstract: A multilayer transmission line includes a multilayer substrate. The multilayer substrate includes a plurality of conductor layers stacked in a predetermined direction with dielectric layers interposed therebetween. The conductor layers in an inner layer part include ground planes, respectively. The inner layer part includes a conductor hole part. The conductor hole part is provided penetrating the respective ground planes in the inner layer part in the predetermined direction. The conductor hole part includes a conductor part to electrically connect the ground planes together. The conductor layer in an outer layer part includes a transmission line and a conversion part. The outer layer part includes the conductor layer as the outermost layer and an inner conductor layer.Type: GrantFiled: September 28, 2020Date of Patent: August 29, 2023Assignee: DENSO CORPORATIONInventor: Kazuhiro Aoki
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Method for flattening impedance of power delivery network by means of selecting decoupling capacitor
Patent number: 11735921Abstract: A method for flattening an impedance of a power delivery network includes capturing a set of impedance parameters, obtaining an impedance of the power delivery network according to the set of impedance parameters, defining a target impedance, performing an importance calculation to determine a port, obtaining an intersection frequency according to the target impedance and the impedance of the power delivery network, selecting a decoupling capacitor according to the intersection frequency, and disposing the decoupling capacitor at the port. The method can reduce the impedance of the power delivery network to the target impedance and flatten the impedance to avoid the rogue wave phenomenon.Type: GrantFiled: June 18, 2021Date of Patent: August 22, 2023Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Yen-Hao Chen, Ding-Bing Lin, Jhih-Yu Yu -
Patent number: 11721600Abstract: A method for fabricating a hermetic electronic package includes providing a package body; hermetically coupling a package base plate to the package body; thermally coupling a substrate to the base plate; thermally mounting a semiconductor device to the substrate; bonding at least one high-current input/output (I/O) terminal to the first metalized region of the substrate by a strap terminal that is an integral high current heatsink terminal. A ceramic seal surrounding the at least one high-current I/O terminal is hermetically bonded to an outer surface of the package body. A metal hermetic seal washer surrounding the at least one high-current I/O terminal is hermetically bonded to the ceramic seal and to a portion of the at least one high-current I/O terminal. A lid is seam welded onto the package body.Type: GrantFiled: December 21, 2020Date of Patent: August 8, 2023Assignee: Microsemi CorporationInventors: Saeed Shafiyan-Rad, Manuel Medeiros, III, David Scott Doiron
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Patent number: 11682828Abstract: An electronic device may be provided with an antenna module and a phased antenna array on the module. The module may include a logic board, an antenna board surface-mounted to the logic board, and a radio-frequency integrated circuit (RFIC) mounted surface-mounted to the logic board. The phased antenna array may include antennas embedded in the antenna board. The antennas may radiate at centimeter and/or millimeter wave frequencies. The logic board may form a radio-frequency interface between the RFIC and the antennas. Transmission lines in the logic board and the antenna board may include impedance matching segments that help to match the impedance of the RFIC to the impedance of the antennas. The module may efficiently utilize space within the device without sacrificing radio-frequency performance.Type: GrantFiled: April 25, 2022Date of Patent: June 20, 2023Assignee: Apple Inc.Inventors: Jennifer M. Edwards, Siwen Yong, Jiangfeng Wu, Harish Rajagopalan, Bilgehan Avser, Simone Paulotto, Mattia Pascolini
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Patent number: 11681015Abstract: This document includes techniques, apparatuses, and systems related to a waveguide with squint alteration, which can improve electromagnetic wave operation. In aspects, squint of electromagnetic waves pertaining to waveguides may be altered and improved. In this example, the techniques also enable the waveguide to direct electromagnetic waves according to respective chambers and one or more apertures, improving the quality of signals transmitted and received. The chambers may be divided according to a divider extending toward an opening of the waveguide, directing electromagnetic waves between the opening and the one or more apertures.Type: GrantFiled: March 18, 2021Date of Patent: June 20, 2023Assignee: Aptiv Technologies LimitedInventors: Alireza Foroozesh, Shawn Shi
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Patent number: 11658373Abstract: A packaging structure, a method of manufacturing a packaging structure, and a quantum processor include a substrate; a coplanar waveguide including a first ground wire, a second ground wire, and a signal wire, wherein the first ground wire, the second ground wire, and the signal wire are disposed on a surface of the substrate at intervals, and the signal wire is located between the first ground wire and the second ground wire; an air bridge including a first end connected with the first ground wire and a second end connected with the second ground wire, wherein a gap exists between the air bridge and a surface of the signal wire away from the substrate; and a compensation structure located on the surface of the substrate.Type: GrantFiled: May 13, 2021Date of Patent: May 23, 2023Assignee: Alibaba Group Holding LimitedInventors: Hua Xu, Jin Qin
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Patent number: 11562957Abstract: A semiconductor device has a first area in which first and third semiconductor elements are formed, a second area in which second and fourth semiconductor elements are formed, and a third area located between the first and second areas. On the first to fourth semiconductor elements, a multilayer wiring layer including first and second inductors is formed. A through hole penetrating the semiconductor substrate is formed in the third area, and a first element isolation portion protruding from a front surface side of the semiconductor substrate toward a back surface side of the semiconductor substrate is formed in the through hole. Further, on the back surface side of the semiconductor substrate, the semiconductor substrate in the first area is mounted on the first die pad, and the semiconductor substrate in the second area is mounted on the second die pad.Type: GrantFiled: March 3, 2021Date of Patent: January 24, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shinichi Kuwabara, Yasutaka Nakashiba
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Patent number: 11553586Abstract: A wiring substrate which includes a base member having a first surface, a first differential signal line disposed on the first surface of the base member and a second differential signal line disposed adjacent to the first differential signal line on the first surface of the base member. A ground layer which faces the first and second differential signal lines, has a plurality of openings continuously arranged along a predetermined direction. In a planar view of the wiring substrate, where a length of each of the plurality of openings in a direction along the signal lines is a length L1, a length of the opening in a direction orthogonal to Li is a length L2, and a distance between the first and second differential signal lines is a length L3, L1 is equal to or greater than four times L2, and L2 is equal to or less than L3.Type: GrantFiled: December 4, 2020Date of Patent: January 10, 2023Assignee: Canon Kabushiki KaishaInventors: Toshiyuki Yoshida, Yu Ogawa, Shoji Matsumoto
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Patent number: 11539446Abstract: Disclosed is an optical receiver. The optical receiver includes a circuit board, a base member, a photodetector mounted on the base member, a transimpedance amplifier, and a capacitor. The base member is disposed between a first grounding pattern and a second grounding pattern on a first side of the circuit board. The transimpedance amplifier is mounted on the first grounding pattern. The capacitor is mounted on the second grounding pattern. The first wiring pattern and the second wiring pattern are apart from both the first grounding pattern and the second grounding pattern in a plan view of the first side. The first grounding pattern is electrically connected to the second grounding pattern through a grounding pattern formed on the first side.Type: GrantFiled: September 9, 2020Date of Patent: December 27, 2022Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Kenichi Nakayama
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Patent number: 11523499Abstract: A flexible wiring board includes a layer including an impedance control line capable of transmitting a high frequency signal and a conductive layer including a conductor positioned along the impedance control line. The flexible wiring board is capable of transmitting high frequency signals well.Type: GrantFiled: February 12, 2021Date of Patent: December 6, 2022Assignee: KYOCERA CorporationInventor: Akira Ukon
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Patent number: 11502384Abstract: A microwave transmission arrangement, comprising an electrically conductive hollow waveguide having a first waveguide portion, a second waveguide portion between the first waveguide portion and a first end of the hollow waveguide, and a conductive transition surface of the hollow waveguide forming a transition between the first waveguide portion and the second waveguide portion; and a microwave circuit board including a dielectric carrier, and a first conductor pattern on a first side of the dielectric carrier, the first conductor pattern including a patch for radiating or receiving microwave signals in the predefined wavelength range, and a first ground plane surrounding the patch, wherein the first ground plane of the microwave circuit board is in conductive contact with the first end of the hollow waveguide, and extends into the second waveguide portion cross-section area to define at least one conductive pocket together with the second waveguide portion and the transition surface of the hollow waveguide.Type: GrantFiled: March 4, 2021Date of Patent: November 15, 2022Assignee: ROSEMOUNT TANK RADAR ABInventor: Magnus Ohlsson
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Patent number: 11486900Abstract: A probe apparatus of a millimeter or submillimeter radio frequency band comprises transition layers having outermost layers on opposite surfaces of the probe apparatus. An internal transition cavity extends through the transition layers for guiding electromagnetic radiation within the probe apparatus. A probe layer disposed between the transition layers, the probe layer having a lateral transmission line for interacting with the electromagnetic radiation guided by the internal transmission cavity.Type: GrantFiled: May 22, 2018Date of Patent: November 1, 2022Assignee: TEKNOLOGIAN TUTKIMUSKESKUS VTT OYInventors: Vladimir Ermolov, Antti Lamminen, Jussi Säily, Tauno Vähä-Heikkilä, Pekka Rantakari
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Patent number: 11490549Abstract: A high-frequency module includes: a chassis which is made of a conductor and which has an internal space; a high-frequency circuit board which is housed in the internal space of the chassis; and a resistive element provided between an inner wall that opposes the high-frequency circuit board among inner walls of the chassis which define the internal space and the high-frequency circuit board.Type: GrantFiled: March 8, 2019Date of Patent: November 1, 2022Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Hiroshi Hamada, Hideyuki Nosaka
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Patent number: 11482481Abstract: An electronic device is disclosed. In one example, the electronic device includes a circuit board comprising a recess a package in the recess, a semiconductor die coupled to the first side of the package, and a bridge extending from the first side of the package to the circuit board wherein the bridge electrically couples the package to the circuit board.Type: GrantFiled: May 29, 2020Date of Patent: October 25, 2022Assignee: Intel CorporationInventors: Bok Eng Cheah, Jackson Chung Peng Kong, Kooi Chi Ooi, Lee Fueng Yap, Chan Kim Lee
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Patent number: 11469511Abstract: A waveguide microstrip line converter includes a waveguide, a dielectric substrate, a ground conductor including a slot, and a line conductor. The line conductor includes a first section that is a microstrip line having a first line width, a conversion unit that is a second section positioned immediately above the slot and having a second line width greater than the first line width, and a third section extending from the second section in a first direction and performing impedance matching between the first section and the second section. One of the opposite ends of the third section in the first direction is connected to the second section. The first section extends in a second direction perpendicular to the first direction continuously from the other end of the opposite ends of the third section.Type: GrantFiled: January 10, 2018Date of Patent: October 11, 2022Assignee: Mitsubishi Electric CorporationInventors: Takashi Maruyama, Shigeo Udagawa
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Patent number: 11437972Abstract: A multicomponent network may be added to a transmission line in a high-frequency circuit to transform a first impedance of a downstream circuit element to second impedance that better matches the impedance of an upstream circuit element. The multicomponent network may be added at a distance more than one-quarter wavelength from the downstream circuit element, and can tighten a frequency response of the impedance-transforming circuit to maintain low Q values and low VSWR values over a broad range of frequencies.Type: GrantFiled: October 30, 2020Date of Patent: September 6, 2022Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.Inventors: Robert Sadler, David Runton
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Patent number: 11387534Abstract: A converter includes an electrical opening which is a loop pattern, at one end of a conductor pattern located immediately above one end of a waveguide with a dielectric substrate interposed therebetween.Type: GrantFiled: July 13, 2020Date of Patent: July 12, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Ryo Ueda, Yu Ushijima, Hidenori Ishibashi, Takashi Maruyama
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Patent number: 11342663Abstract: An antenna apparatus includes: a first dipole antenna pattern; a feed line electrically connected to the first dipole antenna pattern; and a first ground plane disposed rearward of the first dipole antenna pattern and spaced apart from the first dipole antenna pattern; wherein the first ground plane forms a step-type cavity, and width of a rear portion of the step-type cavity is different from a width of a front portion of the step-type cavity.Type: GrantFiled: June 11, 2019Date of Patent: May 24, 2022Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Nam Ki Kim, Jeong Ki Ryoo, Kyu Bum Han, Young Kyoon Im, Won Cheol Lee
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Patent number: 11337301Abstract: A printed circuit board includes a line formation layer including a differential line having a first conductor and a second conductor, a first component for a countermeasure against a surge, a first connection conductor having one end connected to the first conductor and another end connected to the first component, a second component for a countermeasure against a surge, a second connection conductor having one end connected to the second conductor and another end connected to the second component, a ground layer, and a dielectric mounted between the line formation layer and the ground layer. Lengths of the first conductor and second conductor are adjusted based on a difference of capacitance values in the circuit board.Type: GrantFiled: June 2, 2017Date of Patent: May 17, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Ayumi Sakai, Fujiyuki Nakamoto, Yuichi Sasaki, Naoto Oka, Hideyuki Ohashi
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Patent number: 11293944Abstract: The test socket includes a fifth housing 15 located in a central part of contact terminals 21 in an axial direction and having electrical conductivity, plural through-holes 15c being formed in the fifth housing 15 to pass the respective contact terminals 21 therethrough; a sixth housing 16 stacked in the axial direction on the fifth housing 15, passage holes being formed in the sixth housing 16, the passage holes being configured to position the contact terminals 21 in a direction orthogonal to the axial direction; and an eighth housing 18 having electrical conductivity and stacked in the axial direction by sandwiching the sixth housing 16 between the eighth housing 18 and fifth housing 15, wherein the sixth housing 16 is provided with through-vias configured to form a conductive path in the axial direction.Type: GrantFiled: March 27, 2019Date of Patent: April 5, 2022Assignee: YAMAICHI ELECTRONICS CO., LTD.Inventors: Yuji Nakamura, Masashi Iwata
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Patent number: 11291109Abstract: A transmission line includes connecting portions connected to the outside and a main body located between the connecting portions. Each of the connecting portions includes a terminal electrode connected to an external electrode, a signal conductor, and ground conductors. The main body includes the signal conductor and the ground conductors, and at least one of the plurality of connecting portions includes a first region including the terminal electrode, a second region adjacent to the first region along a signal propagation path, and a third region located between the second region and the main body. The first region, the second region, and the third region provide impedance matching at the connecting portion.Type: GrantFiled: October 9, 2020Date of Patent: March 29, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Kuniaki Yosui
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Patent number: 11258195Abstract: According to one embodiment, a storage device is disclosed. The storage device includes a substrate, a first connector provided on the substrate and including a notch, and a nonvolatile memory provided on the substrate. The storage device further includes a first conductive part provided on the first connector and being adjacent to the notch.Type: GrantFiled: September 11, 2019Date of Patent: February 22, 2022Assignee: Kioxia CorporationInventor: Naoki Kimura
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Patent number: 11189905Abstract: An apparatus includes an antenna array package cover comprising a radiating surface, a mating surface disposed opposite the radiating surface, and an array of antenna array sub-patterns wherein each antenna array sub-pattern comprises at least one antenna element. The antenna array package also includes an array of sub-pattern interface packages mated to the mating surface of the antenna array package cover. Each sub-pattern interface package of the array of sub-pattern interface packages comprises a package carrier, a sub-pattern integrated circuit electrically and mechanically coupled to the package carrier, and a set of interface lines corresponding to the antenna elements of the antenna array sub-pattern that corresponds to the sub-pattern interface package. Methods for mounting the above apparatus into a host circuit are also disclosed herein.Type: GrantFiled: April 13, 2018Date of Patent: November 30, 2021Assignee: International Business Machines CorporationInventors: Xiaoxiong Gu, Duixian Liu, Christian W. Baks, Alberto Valdes Garcia
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Patent number: 11178762Abstract: A connection structure for a wiring substrate and a flexible substrate including a wiring substrate and a flexible substrate, in which the wiring substrate includes an insulating member, conductor layer, and ground layer, the flexible substrate includes an insulating sheet and metal film, and the metal film includes a signal line pad joined to the conductor layer via a joining material when viewed from the back surface of the flexible substrate. When viewed from behind the flexible substrate, there is an overlap region where the signal line pad and conductor layer overlap. In a cross-section when the overlap region is cut in a direction perpendicular to a signal transmission direction, in a case where a width of the signal line pad including the overlap region is W, and a width of the conductor layer including the overlap region is W0, the connection structure satisfies W0<W.Type: GrantFiled: March 3, 2020Date of Patent: November 16, 2021Assignees: NGK Electronics Devices, Inc., NGK Insulators, Ltd.Inventors: Takashi Kawamura, Masato Ishizaki, Naoki Gotou
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Patent number: 11114734Abstract: An apparatus may include a substrate assembly having a first side and a second side. The apparatus may further include a waveguide antenna element positioned on the first side of the substrate assembly. The apparatus may also include a microstrip line positioned within the substrate assembly, where the waveguide antenna element overlaps the microstrip line. The apparatus may include a first conductive plane positioned on the first side of the substrate assembly. The apparatus may further include a second conductive plane positioned on the second side of the substrate assembly. The first conductive plane and the second conductive plane may define at least a portion of a planar surface integrated waveguide or a planar stripline.Type: GrantFiled: October 3, 2019Date of Patent: September 7, 2021Assignee: THE BOEING COMPANYInventor: John E. Rogers
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Patent number: 11050172Abstract: A multi-layer circuit board includes a first layer including a first trace, a second layer connected to the first layer and including a second trace, and a stubless interconnect positioned through the first layer and the second layer. The stubless interconnect includes a body that is electrically insulative, and a bridge trace that is electrically conductive and connected to the body, the bridge trace extending from the first trace to the second trace to electrically connect the first trace and the second trace.Type: GrantFiled: November 22, 2019Date of Patent: June 29, 2021Assignee: International Business Machines CorporationInventors: Matteo Cocchini, Michael Cracraft, Zachary Thomas Dreiss
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Patent number: 10971335Abstract: A radio frequency (RF) power monitoring device includes an RF sensor to monitor RF power transferred to a target load and an impedance of the target load and a transmission line to electrically connect the RF sensor to the target load and to transfer the RF power to the target load. A phase (?z) of the impedance of the target load is adjusted to satisfy a range of ?30°+180°*n<?z<30°+180°*n (where n=?2, ?1, 0, 1, or 2).Type: GrantFiled: October 23, 2019Date of Patent: April 6, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Hyungjoon Kim, Myoungwoon Kim, Hee jong Jeong
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Patent number: 10938083Abstract: The present application discloses embodiments that relate to a radar system. The embodiments may include a plurality of radiating waveguides each having a waveguide input. The embodiments also include an attenuation component, which can be located on a circuit board. The embodiments further include a beamforming network. The beamforming network includes a beamforming network input. The beamforming network also includes a plurality of beamforming network outputs, where each beamforming network output is coupled to one of the waveguide inputs. Additionally, the beamforming network includes an attenuation port, wherein the attenuation port is configured to couple the beamforming network to the attenuation component. The attenuation component dissipates received electromagnetic energy.Type: GrantFiled: November 4, 2019Date of Patent: March 2, 2021Assignee: Waymo LLCInventors: Jamal Izadian, Adam Brown