Redundancy (e.g., Plural Control Elements Or Electrodes) Patents (Class 345/93)
  • Patent number: 6057823
    Abstract: A timing signal generating circuit has a plurality of timing signal generating units disposed in series, each including three or more pieces of timing signal generating elements connected in parallel, and a connecting unit disposed in between the plurality of timing signal generating units. The connecting unit includes an arithmetic circuit which outputs relatively majority signal among outputs of the timing signal generating elements.In this circuit, if some of the timing signal generating elements output defective signals, normal signal is picked-up and output through majority operation of the arithmetic circuit without repairing.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: May 2, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiro Aoki, Masaki Miyatake
  • Patent number: 6049318
    Abstract: A display control device for a liquid crystal display is comprised of a detecting section for extracting a horizontal and vertical synchronizing signal from a video signal, a control signal generating circuit for generating a scanning start signal synchronous to the vertical synchronizing signal and a reference clock signal synchronous to the horizontal synchronizing signal, an X-driver circuit for extracting a horizontal picture signal from the video signal in synchronism with the horizontal synchronizing signal and supplying the horizontal picture signal to each of the horizontal pixel lines, and a Y-driver circuit having a shift register for shifting the scanning start pulse in one direction in response to the reference clock signal and selecting the horizontal pixel line corresponding to a holding position of the scanning start pulse, for supplying a selecting signal to the selected horizontal pixel line.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: April 11, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsutomu Ota
  • Patent number: 6011532
    Abstract: In an active matrix-type display device where scan bus lines (S.sub.i) and data bus lines (D.sub.j) are formed on different substrates, two kinds of scan bus lines (SP.sub.i, SN.sub.i) are provided. A first switching element (TFTN.sub.ij) is connected between a reference voltage supply line (V.sub.R) and a display electrode (E.sub.ij), and is controlled by a first scan bus line (SN.sub.i), and a second switching element (TFTP.sub.ij) is connected between the reference voltage supply bus line (V.sub.R) and the display electrode, and is controlled by a second scan bus line (SP.sub.i). The first switching element (TFTN.sub.ij) is turned ON by a positive or negative potential at the first scan bus line.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: January 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Kenichi Yanai, Kenichi Oki, Tetsuya Hamada, Kazuhiro Takahara, Yasuyoshi Mishima
  • Patent number: 6011531
    Abstract: This invention relates to methods and applications of forming clusters of pixels in 2-D sensing and display arrays. Using TFT switches having more than one predetermined electrical characteristics. The array formed according to these teachings being used in sensing, displaying, adjusting resolution, color selection, image processing, object recognition and filtering.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: January 4, 2000
    Assignee: Xerox Corporation
    Inventors: Ping Mei, James B. Boyce, Robert A. Street, David K. Fork
  • Patent number: 5999155
    Abstract: The invention provides a display device which improves the shape of the contact region while increasing yield and reducing product cost. A contact region is a region between signal lines, and is a region following a scan line so as to include either a part of or an entire of the pixel electrode edge region following the scan line connected to the switching element. The pixel electrode is connected to the source electrode in this region. The contact hole may be rectangular, and a plurality of contact holes may be provided. Also, if C.sub.X is the parasitic capacitance between the pixel electrode and the source electrode when a bad contact exists between said pixel electrode, C.sub.0MAX is the maximum value of the pixel capacitance held by the pixel electrode when said bad contact does not exist, V.sub.LCMIN is the voltage when the transmissivity at a pixel position is a minimum, and V.sub.LCMAX is the voltage when the transmissivity is a maximum, a capacitance ratio RA.sub.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: December 7, 1999
    Assignee: Seiko Epson Corporation
    Inventor: Takashi Satou
  • Patent number: 5962846
    Abstract: A detector array for detecting an optical signal includes a plurality of pixels. Each pixel has a plurality of detector elements coupled together in a redundant configuration such that the detector array maintains a substantially uniform response even if each of the pixels includes a number of defective detector elements. The optical signal is lengthened in the direction normal to the information vector, so that each detector element is exposed to the same portion of the optical signal. A bad-element sensor is coupled to each detector element, which is functionally responsive to the detection of a bad detector element.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: October 5, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Keith Wayne Goossen
  • Patent number: 5956008
    Abstract: A driver circuit for use with an active matrix display. The driver circuit has a shift register circuit of a redundant configuration and consists of a main circuit and a preliminary circuit. When the main circuit becomes defective, the operating circuit is automatically switched from the main circuit to the preliminary circuit without physically cutting the circuitry by a laser beam or the like. The driver circuit is composed of a main shift register circuit and a preliminary shift register circuit connected in parallel with the main shift register circuit. The output from the final stage of flip-flop circuit of the flip-flop circuits forming the main shift register circuit is compared with the output from a monitoring flip-flop circuit connected with the output of the final stage of flip-flop circuit. Thus, the output signals from the flip-flop circuits of the main shift register circuit are switched respectively to the output signals from the flip-flop circuits of the preliminary shift register circuit.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: September 21, 1999
    Assignee: Semiconductor Energy Laboratory Co.,
    Inventors: Yuji Kawasaki, Futoshi Ishii
  • Patent number: 5956009
    Abstract: There is disclosed an active matrix liquid crystal display that suppresses formation of a stripe pattern on the displayed image. An active matrix circuit, a peripheral drive circuit, and A image data signal lines for supplying image data signals are all integrated on a common substrate. The liquid crystal display includes a sampling circuit to which sampling circuit input lines are connected. These sampling circuit input lines are in contact with the image data signal lines and include dummy conducting lines extending to a buffer circuit. These dummy lines average out impedances of the individual image data signal lines, thus making uniform the amounts of image data signals lost from the image data signal lines. Thus, the formation of the stripe pattern is suppressed.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: September 21, 1999
    Assignee: Semiconductor Energy Laboratory Co.
    Inventors: Hongyong Zhang, Kenji Otsuka, Satoshi Teramoto
  • Patent number: 5952991
    Abstract: A liquid crystal display apparatus includes systems of voltage applying devices for applying voltages to a liquid crystal and a controlling device for switching among these systems. The systems of voltage applying devices each have at least one non-linear switching element, and the controlling device has a memory portion for storing the switched state. With such a construction, electric power loss caused by one signal line having a relatively high frequency can be avoided by using another signal line having a relatively low frequency, thereby allowing a white, black, or gradation display with reduced power consumption.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: September 14, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masahiko Akiyama
  • Patent number: 5903249
    Abstract: The object of the invention is to design for reduction of the effects of thin-film transistor OFF current and to improve image quality in an active matrix display device in which polysilicon thin-film transistors are used.Plural serially connected thin-film transistors are provided for one pixel electrode, different signals are imposed on the gate terminals of respective thin-film transistors, and a signal is written into the pixel when all the serially connected thin-film transistors are in an on state.Further, since the thin-film transistors are connected in series, the voltage imposed on the source and drain electrodes when they are all in an off state is divided, and consequently the voltage across the source and drain electrodes of the thin-film transistor that drives the pixel is smaller and the OFF current is reduced.
    Type: Grant
    Filed: October 2, 1995
    Date of Patent: May 11, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Yuji Kawasaki
  • Patent number: 5897182
    Abstract: In a TFT substrate for a liquid crystal display and the liquid crystal display having such a TFT substrate, a defect in the wiring due to improper patterning of a gate electrode is prevented and an orientation property is improved by connecting wiring areas to a scan line and connecting a gate electrode to the scan line at two points, and the connecting wiring areas are formed in a ring shape so that a source electrode is located in an area surrounded by the connecting wiring areas, or arranging the wiring area to relieve a step.
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: April 27, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mamoru Miyawaki
  • Patent number: 5894295
    Abstract: A plurality of source signal lines which supplies display data of picture elements, which are sampled at a sampling gate, from a video signal line to a plurality of picture element TFTs arranged in a matrix pattern, and a plurality of gate signal lines that supplies a control signal for controlling the picture element TFTs and that intersect the source signal lines are provided to a display section. A spare wiring is formed on each source signal line or gate signal line so that the spare wiring intersects only a non-input end of each source signal line or of each gate signal line. A corrective signal supplying circuit for supplying a corrective signal of display data or a corrective signal of the control signal for controlling picture element TFTs is provided to the outside of the display section. As a result, a line breakdown can be completely corrected.
    Type: Grant
    Filed: December 12, 1995
    Date of Patent: April 13, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Shimada, Atsushi Ban, Masaya Okamoto
  • Patent number: 5889504
    Abstract: A shift register circuit includes a plurality of shift register blocks and a plurality of connecting sections that belong to a plurality of signal shifting systems. Each of the shift register blocks includes a plurality of shift register groups, each of which belongs to the plurality of signal shifting systems. Each of the connecting sections is provided to mutually connect the shift register groups belonging to the associated signal shifting system. The plurality of shift register blocks and the plurality of connecting sections are arranged in a line in the shift register circuit. Further, the plurality of connecting sections are separated by at least two connecting section groups in that line arrangement with at least one of the shift register blocks located between the connecting section groups.
    Type: Grant
    Filed: November 29, 1995
    Date of Patent: March 30, 1999
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Katsuya Kihara, Atsushi Wada, Masayuki Koga
  • Patent number: 5867139
    Abstract: A liquid crystal display device is formed by arranging a plurality of scanning lines 3.sub.1, 3.sub.2, . . . to which scanning signals are successively applied and a plurality of signal lines 4.sub.1, 4.sub.2, . . . to which data signals are successively applied to intersect at right angles. Mounted in the vicinity of each of the intersections of the scanning lines 3.sub.1, 3.sub.2, . . . and signal lines 4.sub.1, 4.sub.2, . . . are a TFT 5 electrically connected to both of the lines, and a pixel electrode 6 connected to the TFT 5. A common electrode is placed to face the pixel electrode 6 with liquid crystals 2 therebetween. One of electrodes of a pixel capacitance formed by the pixel electrode 6 is connected to a common line 9 for supplying a common signal to the common electrode 7. A dummy scanning line 3.sub.0 for forming a capacitance is arranged outside of the scanning line 3.sub.1 located at the outermost position on a scanning start side of scanning signal.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: February 2, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinya Tanaka, Takayuki Shimada, Takashi Ochi, Yuzuru Kanemori, Mikio Katayama
  • Patent number: 5859627
    Abstract: A driving circuit for a liquid-crystal display device, the driving circuit including a shift register for outputting n control signals driving n signal lines coupled to display elements of the liquid-crystal display device where n is an integer, the shift register having a plurality of stages cascaded. Each of the plurality of stages includes delay elements connected in parallel, each of the delay elements having a unit delay time, and a selector for selecting, in response to a select signal commonly supplied to the plurality of stages, at least one of output signals of the delay elements and for outputting the above at least one of the output signals as a corresponding one of the n control signals.
    Type: Grant
    Filed: November 28, 1997
    Date of Patent: January 12, 1999
    Assignee: Fujitsu Limited
    Inventors: Takayuki Hoshiya, Kenichi Nakabayashi, Masafumi Itokazu, Hiroshi Murakami
  • Patent number: 5835073
    Abstract: An additional switching element (18) is associated with a switching element (8) in a display device (1), which additional switching element is short-circuited by a picture electrode (5) or row electrode (7) when the switching elements function normally, so that there is no voltage drop across the second switching element (18) when a pixel (11) operates satisfactorily. Consequently, the redundant element does not have any capacitive influence on the operation of the pixel or the transmission/voltage characteristic of the pixel. If the switching element (8) is defective, the second switching element (18) can be switched on.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: November 10, 1998
    Assignee: Flat Panel Display Co. B.V.
    Inventor: Hendrikus C. M. Van Doremalen
  • Patent number: 5815129
    Abstract: A liquid crystal display including a driving circuit is provided. The LCD in which one gate line is driven by both left and right gate drivers includes a couple of switching means which are placed between the gate driver and gate line, the couple of switching means being activated and deactivated by switching control signals to switch the output of the gate driver. When one of the gate drivers does not operate, the output of the gate driver having the operational problem is prevented from being applied to the gate lines, by a switching operation. Therefore, even when only one of gate drivers operates, the display panel can function properly, thereby preventing the lowering of picture quality and improving product yield.
    Type: Grant
    Filed: November 27, 1996
    Date of Patent: September 29, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byung-hoo Jung
  • Patent number: 5805248
    Abstract: The present invention provides a circuitry of a liquid crystal display, comprising a plurality of signal lines extending in a first direction, a plurality of scanning lines extending in a second direction vertical to the first direction, first and second enable lines separated from each other, each of the first and second enable lines comprising a plurality of first parts extending in the first direction and between the signals lines and a second part extending in the second direction to which the first parts are connected; a plurality of pairs of first and second pixel electrodes being positioned in adjacent two pixels and also positioned at opposite sides of each of the signal lines; a series connection of first and second transistors between each of the first and second pixel electrodes and the signal line, the first transistor having a gate connected to each of the first and second enable lines while the second transistor having a gate connected to the scanning line.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: September 8, 1998
    Assignee: NEC Corporation
    Inventors: Mitiaki Sakamoto, Hiroshi Shiba
  • Patent number: 5796390
    Abstract: A display device having a plurality of select lines includes redundant select line scanners. Each scanner includes a plurality of substantially identical stages having an input terminal and an output terminal. The stages and select lines are ordinally numbered and correspondingly numbered stages are connected to opposite ends of the correspondingly numbered select lines by separate line segments. The stages within each scanner are cascaded by connecting the output terminal of each stage to the input terminal of the immediately succeeding stage. Failed stages of a scanner are replaced by the correspondingly numbered stage of the other scanner simply by opening the separate line segment of the failed stage.
    Type: Grant
    Filed: March 24, 1993
    Date of Patent: August 18, 1998
    Assignee: Thomson, S.A.
    Inventors: Antoine Pierre DuPont, Dora Plus
  • Patent number: 5790083
    Abstract: A graphics controller drives a flat-panel display and simultaneously drives an external cathode-ray-tube (CRT) display. Horizontal clock pulses continue to be applied to the flat panel during the CRT's vertical blanking or re-trace period so that the flat panel is not left in a constant state during the entire re-trace period. Leaving the flat panel in a constant state for a long period of time can cause flicker or delayed response immediately after the re-trace period ends. Running the horizontal clocks during the re-trace period can lead to D.C. buildup or rolling flicker, believed to be caused by a polarity-inversion counter in the panel assembly which is not designed to receive additional horizontal clocks beyond the number of lines on the flat panel. D.C. buildup in the flat panel is reduced by adding a high-frequency burst of horizontal clock pulses to the flat panel during the CRT's vertical re-trace period. The burst of clock pulses adjusts the count in the polarity-inversion counter.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: August 4, 1998
    Assignee: NeoMagic Corp.
    Inventor: Chester F. Bassetti
  • Patent number: 5781171
    Abstract: A shift register has four systems of shift registers for bidirectional scans and normal/redundant lines. The respective systems of shift registers are divided into blocks, so that transmission circuits are provided therebetween. The transmission circuits form switching circuits through transfer gates. The transmission circuits receive output signals from both of the shift registers for the normal/redundant lines, and output only normal output signals to next stage shift registers in accordance with control signals.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: July 14, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Katsuya Kihara, Masayuki Koga
  • Patent number: 5760757
    Abstract: To eliminate or suppress the effect of inductance from changes in signal electrode potential on scan electrode potential due to liquid crystal static capacitance, dummy electrodes DH, DM, and DL have virtually the same construction as a scan electrode X, and are crossed with signal electrodes Y1.about.YM, sandwiching the liquid crystal. The output terminals of operational amplifiers 20, 22, and 24 are respectively coupled to dummy electrodes DH, DM, and DL through output buffer transistors 26H, 26M, and 26L, while at the same time being coupled to each scan electrode X.sub.i through output buffer transistor 28H(i), 28M(i), and 28L(i). Dummy electrodes DH, DM, and DL are respectively coupled to the inverting input terminals of operational amplifiers 20, 22, and 24.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: June 2, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Shinichi Tanaka, Fujihiko Sugihashi, Takeshi Nosaka
  • Patent number: 5736972
    Abstract: A liquid crystal display apparatus includes first and second PLL circuits, a memory, and a liquid crystal panel. Dot data or line data of a video signal is written into the memory in response to a write clock signal from the first PLL circuit. Data are read from the memory in response to a read clock signal from the second PLL circuit. A read reset signal for reading dummy data is also supplied from the second PLL circuit to the memory. If the number of dot data the video signal has in one horizontal period is smaller than the number of horizontally arranged pixels of the liquid crystal panel, dummy data is read in response to the read reset signal after all the dot data in that one horizontal period have been read. On the other hand, if the number of line data in one vertical period is smaller than the number of vertically arranged pixels of the liquid crystal panel, dummy data is read in response to the read reset signal after all the line data in that one vertical period have been read.
    Type: Grant
    Filed: July 11, 1995
    Date of Patent: April 7, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hirohisa Kitagishi, Kazunori Kodama
  • Patent number: 5699076
    Abstract: During a vertical blank period, in order to prevent generation of noise lines, a display controller outputs the same video data FVD as that of a display final line as dummy data of a vertical blank period start line, and outputs, in advance, video data to be displayed on a display start line in the next frame cycle as dummy data of a vertical blank period final line. The display controller also output a shift clock together with these dummy data. As a result, both upon a change from the display period to the vertical blank period and upon a change from the vertical blank period to the display period, a video data value difference can be eliminated, and generation of noise lines can be prevented.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: December 16, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuichi Tomiyasu
  • Patent number: 5635949
    Abstract: Each pixel consists of an image electrode formed on a first insulating substrate, a ferroelectrlc material portion formed on the image electrode, a pixel electrode formed on the ferroelectric material layer, a scanning electrode formed on a second insulating substrate, and a liquid crystal portion disposed between the pixel electrode and the scanning electrode. When an input signal is written to the respective pixels, a liquid crystal portion of each of pixels selected for display is supplied with an effective voltage that makes a transmittance of the liquid crystal portion smaller than 50%.
    Type: Grant
    Filed: October 17, 1994
    Date of Patent: June 3, 1997
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Yoshiyuki Shiratsuki, Yoshinori Yamaguchi, Kazuhiro Hayashi, Takehiro Niitsu
  • Patent number: 5619223
    Abstract: A redundant row select driver circuit system is provided for enhancing manufacturing yield and reducing manufacturing costs in the liquid crystal data displays. In particular, a row select driver circuit is provided with redundant subcircuits that can effectively replace any damaged subcircuit within the row select driver circuit. In addition, there is disclosed a capacitance compensating scheme to adjust the gray scale level in a damaged row select line with a break inside the display area. And finally, an enhanced diagnostic scheme is disclosed for testing of each row select driver subcircuits in a active matrix display having row select driver circuits connected to each end of row select lines.
    Type: Grant
    Filed: April 14, 1994
    Date of Patent: April 8, 1997
    Assignee: Prime View HK Limited
    Inventors: Sywe N. Lee, Dyi-Chung Hu, Huann-Min Tang
  • Patent number: 5608245
    Abstract: A repair structure for an array with first and second sets of lines that cross includes a repair line extending within the array, approximately parallel to at least one line in the first set and crossing a subset of the lines in the second set. The repair line is separated from the lines it crosses by an insulating layer but a repair operation can form an electrical connection between the repair line and an open line it crosses by operating on the region where they cross. For example, the insulating layer can be melted so that molten metal from the lines mixes to form an electrical connection. The repair structure also includes a connecting lead outside the array through which the repair line can be electrically connected to the signal circuitry for the open line, so that the open line receives signals from or provides signals to its signal circuitry as though it were continuous.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: March 4, 1997
    Assignee: Xerox Corporation
    Inventor: Russel A. Martin
  • Patent number: 5598178
    Abstract: A liquid crystal display is provided with a dummy-capacity driver for applying dummy capacities to scanning lines, in accordance with the number of on-state display elements and the number of off-state display elements in each scanning line. This arrangement makes it possible to suppress distortions that tend to appear in a waveform of the driving voltage upon inversion of the polarity. Thus, it becomes possible to obtain liquid crystal images of high picture quality with virtually no crosstalk when displaying any pattern.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: January 28, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hidetsugu Kawamori
  • Patent number: 5555001
    Abstract: An LCD display having at least one redundant data driving circuit on a substrate that can be substituted for a defective data driving circuit on the substrate. These redundant subcircuits are exact copies of a column driving subcircuit except that some of the connecting points to the control and driving signal lines are not hardwired. That is, the connecting points are left as potential welding points. If a column driving circuit that is coupled to a particular input data line is damaged, then a redundant data driving subcircuit can be hardwired by welding the corresponding crossing points to compensate the damaged circuit. The damaged circuit is also disconnected (by using a laser cut or compatible methods) from the corresponding input data line and the internal data line as necessary.
    Type: Grant
    Filed: March 8, 1994
    Date of Patent: September 10, 1996
    Assignee: Prime View HK Limited
    Inventors: Sywe N. Lee, Huann-Min Tang, Dyi-Chung Hu
  • Patent number: 5528163
    Abstract: A method of inspecting cells of liquid crystal displays comprising the first step in which the empty TFTs in the active color LCD arrays are energized to charge the auxiliary pixel capacitor corresponding to the individual electrodes, the charged condition is maintained by deenergizing the TFT's, the electric charge is released through the source and drain of the TFTs and the resistor connected to the ground side thereof by re-energizing the TFTs, and the amount of the discharge is measured and the second step in which the same energizing, deenergizing, re-energizing, charging, discharging and measurement as done in the first step are made on the TFTs filled with a liquid crystal in the active color LCD arrays, the difference between the amounts of discharge measured in the first and second steps is integrated or the time constant of the amount of discharge measured in the first step is deducted from the time constant of the amount of discharge measured in the second step.
    Type: Grant
    Filed: July 12, 1995
    Date of Patent: June 18, 1996
    Assignee: Tohken Industries Co., Ltd.
    Inventor: Isamu Takahashi
  • Patent number: 5473451
    Abstract: An active matrix for liquid crystal displays having a plurality of picture elements, a plurality of address buses, and a plurality of data buses orthogonal to the address buses. Each picture element includes at least one display electrode; a first switching device coupled between the display electrode and a first respective one of the address buses and a first respective one of the data buses; and a second switching device coupled between the display electrode and a second respective one of the address buses and a second respective one of the data buses, the second switching device including a device for preventing the display electrode from discharging whenever the second respective data bus becomes defective.
    Type: Grant
    Filed: December 15, 1993
    Date of Patent: December 5, 1995
    Assignee: Goldstar Co., Ltd.
    Inventors: Boris I. Kazurov, Oleg F. Ogurtsov, Gennadi Y. Krasnikov, Boris P. Chernorotov
  • Patent number: 5465053
    Abstract: A shift register or other electronic drive circuit, for an LCD or other active matrix device includes a series of circuit blocks each having redundancy in the form of parallel circuit paths. When the circuit is turned on, self-testing and redundancy selection is carried out by individual test and control arrangements which are associated with the circuit blocks. The test and control arrangements may comprise memory elements, such as a bistable, which electrically program themselves in response to their electrical testing of the circuit paths so as to generate a control signal at an output coupled to one or more output switches. The output switches control which of the parallel circuit paths provides an output to the active matrix device. Each test and control arrangement also comprises a routing circuit controlled by the control signal, for transmitting the correct serial output of that circuit to all serial inputs of a next circuit block.
    Type: Grant
    Filed: September 14, 1993
    Date of Patent: November 7, 1995
    Assignee: U.S. Philips Corporation
    Inventor: Martin J. Edwards
  • Patent number: 5457552
    Abstract: An active matrix color liquid crystal display panel having a triangular arrangement of picture elements with a redundancy.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: October 10, 1995
    Assignee: Goldstar Co., Ltd.
    Inventors: Oleg F. Ogurtsov, Boris I. Kazurov, Boris P. Chernorotov
  • Patent number: 5434686
    Abstract: An active matrix display device comprising two pixel electrodes in each rectangular area defined by adjacent signal lines and adjacent scanning lines. The pixel electrodes disposed across each signal line are connected with respective switching elements, which are connected to the common scanning line and the common signal line. In this way, each pixel electrode has only one signal line formed on one side thereof. As a result, a line defect conventionally produced by a leakage between adjacent signal lines through a pixel electrode is prevented. Further, a defective pixel can be easily corrected by short-circuiting the pixel electrode with the adjacent signal line.
    Type: Grant
    Filed: September 9, 1993
    Date of Patent: July 18, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuzuru Kanemori, Akihiko Imaya, Hiroaki Kato, Kozo Yano, Katsumi Irie
  • Patent number: 5424752
    Abstract: A method of fine intermediate gradation display by an electro-optical device, with little difference in devices is disclosed. In case of driving each picture element of an active matrix electro-optical device, a visual intermediate gradation display can be carried out by using a modified transfer gate complementary field effect device, in a structure where one of input/output terminal thereof is connected with a picture element electrode, by applying a bipolar pulse to its control electrode in a cycle and by applying voltage to the other input/output terminal, or by cutting voltage at the same time, and whereby digitally controlling duration of voltage applied to the picture element.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: June 13, 1995
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akira Mase, Masaaki Hiroki, Yasuhiko Takemura
  • Patent number: 5406301
    Abstract: A character display in which failures are evident. Selected segments of a seven-segment LCD are activated by control signals supplied through selected fore plane and back plane traces. By coupling specific ones of the fore plane and back plane control signals to selected segments, any failure in the control signal or circuitry providing the signal to the segments of the display character becomes immediately evident to an operator when the character represented by the display is not one of a predefined set of characters.
    Type: Grant
    Filed: October 27, 1993
    Date of Patent: April 11, 1995
    Assignee: Abbott Laboratories
    Inventor: Arie Ravid
  • Patent number: 5392143
    Abstract: A liquid crystal display provides redundant circuits to ensure reliable operation of all pixels of a display and includes a substrate, a scanning line formed on the substrate, a pixel electrode formed on the substrate, a first switching element which is switched on and off in accordance with a potential level of the scanning line, a second auxiliary switching element which is initially electrically isolated from the pixel electrode by a switchable link.
    Type: Grant
    Filed: March 16, 1993
    Date of Patent: February 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Akiyama, Yutaka Nakai
  • Patent number: 5343216
    Abstract: An active matrix substrate comprising picture element electrodes disposed in a matrix on a substrate, each of which is composed of divided electrodes, and an electrically conductive film on which two of said divided electrodes adjacent to each other are superposed in a manner to sandwich an insulating film therebetween so as to form a connection. The connection is irradiated with laser beams from the outside of the display apparatus when one of the divided electrodes brings about a picture element defect, so that both the divided electrodes can be electrically connected to each other, thereby attaining a correction of the picture element defect. A display apparatus using the active matrix substrate is also provided.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: August 30, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mikio Katayama, Hiroaki Kato, Takayoshi Nagayasu, Akihiko Imaya, Hidenori Negoto, Yuzuru Kanemori, Toshihiko Hirobe
  • Patent number: 5335102
    Abstract: An active matrix display device comprising: scanning branch lines each branching from the scanning line; and switching elements each formed on an end portion of the scanning branch line, wherein the distance between the scanning line side of the switching element and the scanning line is so provided as to enable the scanning branch line to be cut off by irradiation with light energy. Alternatively, an active matrix display device comprising: a conductive layer disposed under the signal line and the pixel electrode with an insulating film interposed therebetween; and a conductive piece formed between the pixel electrode and the insulating film.
    Type: Grant
    Filed: February 19, 1991
    Date of Patent: August 2, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuzuru Kanemori, Mikio Katayama, Kiyoshi Nakazawa, Hiroaki Kato, Kozo Yano, Naofumi Kondo, Hiroshi Fujiki, Toshiaki Fujihara, Hidenori Negoto, Manabu Takahama
  • Patent number: 5298891
    Abstract: A data line defect avoidance structure for a display device having an array of display elements arranged in rows and columns includes a plurality of repair lines overlapping the ends of data lines which extend between the columns. Each repair line spans a set of data lines, and there is a sufficient number of repair lines to span all the data lines in the array. One end of each repair line can be welded to a data line during fabrication to decrease the number of steps required for avoiding an open in a data line.
    Type: Grant
    Filed: April 18, 1991
    Date of Patent: March 29, 1994
    Assignee: Thomson, S.A.
    Inventors: Dora Plus, Peter M. Freitag
  • Patent number: 5283566
    Abstract: A plane display includes a plurality of pixel capacitors, each of which includes first and second electrodes and a non-linear optical material disposed therebetween. A plurality of storage capacitors are respectively provided in association with the plurality of pixel capacitors, each of which includes the first electrode of the corresponding pixel capacitor, an insulating film, and a third electrode insulated from the first electrode through the insulating film and connected to an external power supply terminal. Additionally, a provided for each storage capacitor and connected between the third electrode of the associated storage capacitor and the external power supply terminal, for preventing a potential drop causable in the course of storing electric charge in the associated storage capacitor.
    Type: Grant
    Filed: April 15, 1992
    Date of Patent: February 1, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Akio Mimura, Kikuo Ono, Takashi Suzuki, Masao Yoshimura, Nobutake Konishi, Jun-ichi Ohwada
  • Patent number: 5268678
    Abstract: A matrix-type display device includes a display electrode board that has a plurality of pixel electrodes arranged into a matrix. A set of scan lines extend in parallel in one direction and a set signal lines extend in an orthogonal direction so that these lines are arranged between adjacent pixel electrodes. A spare line intersects at least some of the scan lines and/or said signal lines at each end of said set of lines so as to sandwich an insulating film therebetween, and a lead-out line is connected to one end of the spare line. The lead-out lines are connected to external connecting lines, which are outside of the display electrode board, so that the lead-out lines can be connected to each other through said connecting lines. Line breakdowns can be corrected and the correction of the breakdowns entails little or no increase in load capacity, electrical resistance, and noise with respect to the corrected line.
    Type: Grant
    Filed: June 20, 1990
    Date of Patent: December 7, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kiyoshi Nakazawa, Mikio Katayama, Hiroaki Kato, Yuzuru Kanemori, Takayoshi Nagayasu, Hidenori Negoto
  • Patent number: 5262881
    Abstract: A driving method of a matrix type liquid crystal display element comprising at least J.times.L number (J subgroup) of row electrodes and a plurality of column electrodes. When information of the j-th row electrode subgroup in a specified column is expressed by a column vector D.sub.j having an L number of elements, the following conditions are satisfied: (1) and j-th row electrode subgroup is selected so that the elements of a selection voltage vector which constitute a selection voltage matrix in which the product of a matrix and a transposed matrix of the same assumes a scalar multiple of the unit matrix is selected, and the selection voltage matrix comprising election voltage vectors arranged in a matrix are selected, and (2) when the j-th row electrode subgroup is selected, the voltage applied to the column electrodes to indicate a display information by means of the vector D.sub.j are determined as in the following items (a) and (b): (a) a vector .beta.
    Type: Grant
    Filed: July 8, 1992
    Date of Patent: November 16, 1993
    Assignee: Asahi Glass Company Ltd.
    Inventors: Takeshi Kuwata, Temkar Ruckmongathan, Yutaka Nakagawa, Hidemasa Koh, Hiroshi Hasebe, Takashi Yamashita, Hideyuki Nagano, Takanori Ohnishi