Abstract: A display device, including: pixels coupled to scan lines and data lines; a data driver configured to supply respective data signals to the data lines, including an amplifier disposed at an output terminal of the data driver, the amplifier including a first power terminal and a second power terminal; a switch unit configured to perform a power switching operation of alternately connecting the first power terminal and the second power terminal of the amplifier to a first driving power source and a second driving power source; and a driving controller configured to control the data driver and the switch unit, wherein the driving controller is configured to output a switch control signal to control the switch unit and interrupt the power switching operation during a blank period between source output periods, during which the data driver is configured to output the data signals of each frame.

Abstract: A sensing circuit for an organic light-emitting diode driver includes a sample and hold circuit and a gain amplifier. The sample and hold circuit is configured to sample a sensing signal received via an input terminal. The gain amplifier is coupled to the sample and hold circuit. The sample and hold circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch and a fourth switch. The first capacitor is coupled between the input terminal and the gain amplifier. The second capacitor is coupled between a reference terminal and the gain amplifier. The first switch is connected between the first capacitor and the input terminal. The second switch is connected between the second capacitor and the reference terminal. The third switch is connected between the first capacitor and the gain amplifier. The fourth switch is connected between the second capacitor and the gain amplifier.

Abstract: A display apparatus includes a display panel including an active area that includes at least one module area and a bezel area positioned outside the active area, wherein a pixel array is positioned in the active area, and the at least one module area is formed as a light-transmissive area.

Abstract: This application discloses a driving method of a display panel, a driving circuit and a display device. The display panel includes a first gate driving circuit and a second gate driving circuit respectively controlling all gate lines in a scanning display area, and the driving method includes the following steps: when a first preset condition is met, controlling the first gate driving circuit to be in a dormant state, and meanwhile, controlling the second gate driving circuit to be in a working state; and when a second preset condition is met, controlling the second gate driving circuit to be in a dormant state, and meanwhile, controlling the first gate driving circuit to be in a working state.

Abstract: According to one embodiment, an electronic circuitry that converts DC voltage into AC voltage includes first to fourth switching circuitries. A cycle includes first and second periods. During the first period, the first and second switching circuitries are turned on, and the third and fourth switching circuitries are turned off, and during the second period, the first switching and second circuitries are turned off, and the third and fourth switching circuitries are turned on. At least one of the first to fourth switching circuitries includes a first switching element and a second switching element in parallel. During a time period during which at least one of the first to fourth switching circuitries is turned on, the first switching element is turned on during a first subperiod, and the second switching element is turned on during a second subperiod that overlaps the first subperiod.

Abstract: The present disclosure relates to a drive device and a drive method of a display panel, and a display device. The drive device includes a driving unit configured to output a drive signal for driving a sub-pixel. The drive device includes a compensating unit coupled to the driving unit and a fanout line of a fanout region. The drive device is configured to compensate an impedance of the fanout line based on a reference impedance and the drive signal. The fanout region includes a plurality of fanout lines, and the reference impedance is a maximum impedance among the impedances of the plurality of fanout lines or an impedance greater than the maximum impedance.

Abstract: This application is directed to intra-panel communication in a touch display device in which a touch-integrated timing controller (TTCON) is coupled to touch-embedded source drivers (TSDs) via a plurality of forward links and a set of backward links. The forward links include a first subset of display forward links and a second subset of touch forward links. The TSDs are electrically coupled to a display panel including a plurality of display pixels and a plurality of touch sensors. The TTCON sends a display drive signal including display content data and display control data over the display forward links, and sends a touch control signal including an instruction to initiate an operation mode over the touch forward links. Upon receiving the touch control signal, the TSDs identify the instruction to initiate the operation mode, generate touch data accordingly, and return the touch data to the TTCON via the backward links.

Abstract: The present application provides an integrated fingerprint detection touch control display apparatus. The integrated fingerprint detection touch control display apparatus includes a plurality of fingerprint sensing driver circuits respectively configured to independently control fingerprint detection respectively in a plurality of sensing regions in the integrated fingerprint detection touch control display apparatus; a touch sensing driver circuit configured to control touch detection in the integrated fingerprint detection touch control display apparatus; a counter substrate; and an array substrate facing the counter substrate.

Abstract: The present disclosure provides a common voltage regulating circuit and a common voltage regulating method, a display driving circuit and a display device, the common voltage regulating circuit is applied to a display panel, and the display panel includes a pixel electrode and a common electrode, the common voltage regulating circuit includes: a first regulating sub-circuit configured to provide a signal from a second signal input terminal to a first signal output terminal under the control of an enabling signal terminal in a power-on stage of the display panel; the first signal input terminal is configured to input a signal to be provided to the common electrode in a display stage of the display panel, the second signal input terminal is configured to input a signal to be provided to the pixel electrode in the power-on stage, the first signal output terminal is coupled with the common electrode.

Abstract: The present disclosure provides a set-voltage generation unit, a set-voltage generation method and a display device. The set-voltage generation unit includes a voltage generation circuit. The set-voltage generation unit is configured to generate a set voltage according to a gamma main voltage such that a ratio between a variation of the set voltage and a variation of the gamma main voltage is a voltage coefficient K, and K is a positive number less than or equal to 1.

Abstract: The present disclosure relates to a pixel circuit. The pixel circuit may include a switch sub-circuit (10), a storage sub-circuit (20), and a driving sub-circuit (30). The storage sub-circuit (20) may include a first storage transistor (Tf1) and a second storage transistor (Tf2). Both the first storage transistor (Tf1) and the second storage transistor (Tf2) may be floating gate transistors. The storage sub-circuit (20) and the driving sub-circuit (30) may be configured to transmit a data signal from one of a plurality of data lines to a pixel electrode under control of the switch sub-circuit (10).

Abstract: A display device and data driver are provided. The display device includes a plurality of data drivers provided for a predetermined number of data lines in a plurality of data lines. The plurality of data drivers receive the serialized video data signal from the display controller, generate a modulated data timing signal whose period changes within the one frame period, and supply a gradation voltage signal to each of the predetermined number of data lines for each of data periods based on a data timing of the modulated data timing signal, each of data periods corresponding to the data timing of the modulated data timing signal.

Abstract: There is disclosed an electronic device including a display panel including one or more pixels, one or more gate drivers receiving electric power from a first power supply, and a display driver integrated circuit configured to drive the display panel.

Abstract: An array substrate and a display panel are provided. The array substrate includes: a plurality of sub-pixels arranged along a row direction and a column direction, four or six adjacent sub-pixel columns constituting a sub-pixel column group; a plurality of data lines extending along the column direction and comprising a first data line and a second data line. In the row direction, the first data line and the second data line are respectively provided on two sides of the sub-pixel column group, and a data line pair including the first data line and the second data line is located between adjacent sub-pixel column groups.

Abstract: A display device, comprising: a plurality of pixels arranged in a matrix (row-column configuration) in a display area; a scanning line that is coupled to each of the pixels aligned in a row direction in the display area, and to which a scanning signal is supplied; a signal line that is coupled to each of the pixels aligned in a column direction in the display area, and to which a pixel signal is supplied; a gate driver that supplies the scanning signal to the scanning line; a signal selection circuit that separates the pixel signal that is time-division multiplexed to an image signal; a first control signal output circuit that outputs a first control signal supplied to the gate driver; and a second control signal output circuit that outputs a second control signal supplied to the signal selection circuit.

Abstract: According to an aspect, a display device includes: sub-pixels arranged in row and column directions and each including a memory block including memories to store therein sub-pixel data; memory selection line groups corresponding to rows and each including memory selection lines electrically coupled to the memory blocks in the respective sub-pixels that belong to the corresponding row; and a memory selection circuit configured to concurrently output a memory selection signal to the memory selection line groups. Each sub-pixel displays an image based on the sub-pixel data stored in one of the memories in accordance with the memory selection line supplied with the memory selection signal. The number of times that the set value is changed is less than the number of times that images are switched from one to another based on the memory selection signal output from the memory selection circuit.

Abstract: A display apparatus that operates at high speed is provided. The display apparatus includes a display portion provided with a pixel, and the display portion has a function of displaying a first-color image and a second-color image. A first period in which first image data and first data are written to the pixel, a second period in which the first-color image corresponding to the first image data is displayed on the display portion, a third period in which second image data is generated in the pixel on the basis of the first image data and the first data, and a fourth period in which the second-color image corresponding to the second image data is displayed on the display portion are included.

Abstract: The present disclosure provides a source driving circuit, a driving method, and a display device. The source driving circuit includes a gamma generating circuit, a gamma regulating circuit, and a control circuit. The gamma regulating circuit is configured to determine, according to a plurality of gamma reference voltage pairs, a first output voltage, a second output voltage, a third output voltage, and a fourth output voltage corresponding to each of the gamma reference voltage pairs. Further, the control circuit is configured to perform driving and displaying with the first output voltage in a first image frame, with the second output voltage in a second image frame, with the third output voltage in a third image frame, and with the fourth output voltage in a fourth image frame.

Abstract: In a liquid crystal display (LCD) device having a touch panel function, power consumption is reduced in the standby state. The display section is divided into blocks each of which is formed of a plurality of display lines. The counter electrode is disposed for each block. A driving circuit selectively supplies, to the counter electrode of each block, the voltage used for the liquid crystal display and the voltage used for the touch panel scanning. The driving circuit has a source amplifier that supplies the video voltages to the video lines. The driving circuit reduces the current in the source amplifier, such that the current is lower than current at the time of a normal operation, to lower the power consumption, and stops the operation of the source amplifier and supplies the GND voltage to the video lines to further lower the power consumption.

Abstract: The liquid crystal display device includes a first substrate provided with a terminal portion, a switching transistor, a driver circuit portion, and a pixel circuit portion including a pixel transistor and a plurality of pixels, a second substrate provided with a common electrode electrically connected to the terminal portion through the switching transistor, and liquid crystal between a pixel electrode and the common electrode. In a period during which a still image is switched to a moving image, the following steps are sequentially performed: a first step of supplying the common potential to the common electrode; a second step of supplying a power supply voltage to the driver circuit portion; a third step of supplying a clock signal to the driver circuit portion; and a fourth step of supplying a start pulse signal to the driver circuit portion.

Abstract: Organic EL display module including a pixel disposed in respective intersections between a plurality of scanning lines and a plurality of data lines, which lines are aligned in a matrix, and a current supply line that supplies electric current to the pixel, wherein the pixel includes an active device selected by the scanning line, a data storage device that stores a data signal that is supplied from the data line by control of the active device, and an organic light emitting device that emits light by the electric current supplied by the current supply line according to the data signal stored in the data storage device, wherein the data storage device provides a lower electrode, an insulating layer and an upper electrode, and wherein the lower electrode has a same layer with a channel layer of the active device and the upper electrode is made of a metal material.

Abstract: A structure of a memory device is described. The structure can include an array of memory cells. A memory cell can include at least one metal-oxide-semiconductor (MOS) element, where a source terminal of the at least one MOS element is connected to a drain terminal of the MOS element. The source terminal being connected to the drain terminal can cause the at least one MOS element to exhibit capacitive behavior for storing electrical energy. A first transistor can be connected to the at least one MOS element, where an activation of the first transistor can facilitate a write operation to the memory cell. A second transistor can be connected to the at least one MOS element, where an activation of the second transistor can facilitate a read operation from the memory cell.

Abstract: A display device includes plurality of pixels arranged to form rows and columns, row selection circuit, and signal supply circuit for supplying signal to pixels of a row selected from the plurality of pixels by the row selection circuit The signal supply circuit includes first holder including first data holders, scanning circuit for sequentially selecting the first data holders and causing each selected first data holder to receive data, a second holder including blocks each including second data holders, the second holder being configured to time-divisionally receive a plurality of data held by the first holder, and DA converter for supplying a plurality of analog signals corresponding to the plurality of data held by the second holder to the pixels of the row selected from the plurality of pixels by the row selection circuit.

Abstract: A display device includes: a substrate having a display area and non-display area; a first conductive layer disposed on the substrate and corresponding to the display area; a second conductive layer disposed on the substrate and corresponding to the display area, wherein the first and second conductive layers cross from top view; a first insulating layer disposed between the first and second conductive layers; a third conductive layer disposed on the substrate, corresponding to the non-display area, and including a first connection line; and a second insulating layer disposed between the second and third conductive layers. The first connection line electrically connects to the first or second conductive layer. The result of a sheet impedance of the first connection line divided by a sheet impedance of the first or second conductive layer is greater than 0 and less than or equal to 10.

Abstract: A display panel includes a first panel region (FPR) including (n?1)-th and n-th pixel rows ((n?1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n?1)-th scan line ((n?1)SL) connected to the (n?1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n?1)SL and the nRL.

Abstract: A display component, a display device and a display control method are provided. The display component includes a plurality of sub-pixel units arranged in a matrix; a plurality of storage units, arranged in one-to-one correspondence with the plurality of sub-pixel units, wherein, each sub-pixel unit is configured to display according to gray-scale data in a corresponding storage unit; and a control portion, in communication with the plurality of storage units, configured to execute at least one inter-transmission operation within one frame period.

Abstract: The driving device includes: a common voltage drive, a source drive, a gate drive, and a control circuit including a sub-control circuit electrically connected to the common voltage drive and the source drive, and a first switch electrically connected to the sub-control circuit and the gate drive. The sub-control circuit controls the first switch to turn off the gate drive to transmit the scan signal to the display panel after the driving device is powered on; and controls the first switch to turn on the gate drive to transmit the scan signal to the display panel when the difference between the data signal and the common voltage signal reaches a predetermined difference.

Abstract: A display device includes: a display panel in which a non-display region and a display region surrounding the non-display region are defined, wherein the display panel includes: a base layer comprising a first region in which a hole is defined corresponding to the non-display region, a second region surrounding the first region, and a third region corresponding to the display region; and first signal line parts disposed on the second region and the third region, the first signal line parts arrayed spaced apart from each other in a first direction, and each of the first signal line parts includes: a first line; a second line spaced apart from the first line; and a first connection part configured to connect the first line and the second line.

Abstract: Provided are a display panel and a display device. The display panel includes a display area and a non-display area surrounding the display area, the display area includes a first rectangular area and a first special-shaped area disposed adjacent to the first rectangular area, and the non-display area includes a second rectangular area adjacent to the first rectangular area and a second special-shaped area adjacent to the first special-shaped area. The display area includes pixel units arranged in an array, and a plurality of shift registers are disposed in the second rectangular area and the second special-shaped area, where each of the plurality of shift registers is connected to a row of pixel units. The second special-shaped area includes a laser cutting affected area, where none of the plurality of shift registers is disposed in at least part of the laser cutting affected area.

Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes: a plurality of pixel zones in an array on a base substrate, where each pixel zone includes a pixel electrode, a common electrode, a compensation electrode, and a control circuit. The compensation electrode is insulated from the common electrode, the orthographic projection of the compensation electrode on the base substrate has an overlap area with the orthographic projection of the pixel electrode on the base substrate, and the orthographic projection of the common electrode on the base substrate has an overlap area with the orthographic projection of the pixel electrode on the base substrate; and the control circuit is configured to connect the pixel electrode with the compensation electrode while the pixel electrode is being charged.

Abstract: A display apparatus includes a gate line, a data line, and a pixel. The pixel includes first and second pixels displaying grayscales different from each other in response to a data voltage provided through the data line. The first pixel includes a first transistor including a gate electrode connected to the gate line and a first terminal connected to the data line and a first liquid crystal capacitor connected to a second terminal of the first transistor. The second pixel includes a second transistor including a gate electrode connected to the gate line and a first terminal connected to the second terminal of the first transistor and a second liquid crystal capacitor connected to a second terminal of the second transistor.

Abstract: A display device includes a display panel, a driver IC, and a control circuit. The control circuit includes operation circuitry to calculate the magnitude of a driving current flowing in a first pixel column in response to first voltage information from the driver IC, where the first voltage information corresponding to a voltage level of a first power supply line applied to a first pixel group of the display panel. The operation circuitry also calculates a compensation gain by comparing the magnitude of the driving current with preset current information. Further, the control circuit includes a compensator to receive a first data signal, generate a second data signal by applying the compensation gain to the first data signal, and transfer the second data signal to the driver IC. The display device and driving method may suppress image quality degradation by monitoring a high-potential voltage and correcting a data signal.

Abstract: A method for transferring light emitting elements precisely during manufacture of display panels includes providing light emitting elements; providing a first electromagnetic plate defining magnetic adsorption positions; providing a receiving substrate defining receiving areas; energizing the first electromagnetic plate to magnetically adsorb one light emitting element at one adsorption position; facing the first electromagnetic plate to the receiving substrate; and transferring the light emitting elements to one receiving area of the receiving substrate.

Abstract: A display includes a plurality of pixels grouped into a plurality of lines of pixels. Each line of pixels of the plurality of lines comprises a group of pixels of the plurality of pixels that are coupled to a common scan line as well and that are coupled to different data lines to individually activate each pixel of the group of pixels. The display also includes a common voltage (VCOM) driving circuit configured to receive a waveform and drive the waveform to the display as a VCOM having a value tailored to an individually activated pixel of the group of pixels.

Abstract: A common voltage compensation circuit unit including a trigger signal terminal, a common voltage output terminal, a design common voltage signal terminal, a power signal terminal, a compensation common voltage signal terminal, a reset signal terminal, a clock signal terminal, a trigger signal input sub-circuit, a first output sub-circuit, a control sub-circuit, a second output sub-circuit, and a reset sub-circuit. The present disclosure further provides a display panel, a display device, and a common voltage compensation method for a display panel.

Abstract: A clock distribution circuit including a Phase Locked Loop (PLL), a first Phase Detecting and Converting (PDC) circuit, a second PDC circuit, and a clock generating and compensating (CGC) circuit may be provided. The PLL may generate reference clock signals. The first PDC circuit may generate input phase difference voltages based on phase differences between respective pairs of two reference clock signals among the reference clock signals. The second PDC circuit may generate output phase difference voltages based on phase differences between respective pairs of two power switching signals among power switching signals received from external switching regulators. The CGC circuit may generate input clock signals provided to the plurality of external switching regulators by shifting phases of the reference clock signals, and additionally control a phase of at least one of the input clock signals based on the input phase difference voltages and the output phase difference voltages.

Abstract: The present application discloses a pixel circuit of a display panel. The pixel circuit includes a first latch-control sub-circuit configured to provide a data signal under controls of a first scan signal, a latch sub-circuit including a first inverter having an input terminal coupled to receive the data signal and a second inverter, a second latch-control sub-circuit configured to disconnect the second inverter from the first inverter to form an open circuit under controls of the first scan signal or form a latch loop under controls of a second scan signal to stabilize two voltage levels at the first output terminal of the first inverter and the second output terminal of the second output inverter, and an output sub-circuit configured to switch connection between an output terminal and two reference voltage ports under controls of the two voltage levels alternatively.

Abstract: A thin film transistor array panel includes a substrate, a first gate electrode disposed on the substrate, a voltage wire disposed on the substrate, a gate insulating layer disposed on the first gate electrode and the voltage wire, a semiconductor pattern including an oxide semiconductor material disposed on the gate insulating layer, a source electrode and a drain electrode disposed at a distance from each other on the semiconductor pattern, a first passivation layer disposed on the source electrode and the drain electrode, and a first electrode disposed on the first passivation layer and connected with the voltage wire.

Abstract: Disclosed are a drive circuit of a display device, a display device and a display panel. The drive circuit of the display device drives a first drive signal output branch and a second drive signal output branch to output a preset logic level signal separately by drive signals of a timing controller.

Abstract: An electronic device may be provided with a display. The display may be a variable frame rate display capable of adaptively adjusting a frame rate at which display frames are displayed in response to information associated with the current state of operation of the device. The information may be gathered using control circuitry in the electronic device. The control circuitry may gather the information for adjusting the frame rate by monitoring the electronic device power supply configuration, other device components, the type of content to be displayed, and user-input signals. The control circuitry may adjust the frame rate based on the gathered information by increasing or decreasing the frame rate. The control circuitry may be formed as a portion of display control circuitry for the device such as a display driver integrated circuit or may be formed as a portion of storage and processing circuitry external to the display.

Abstract: A display device can include a gate driver configured to drive gate lines of a panel; a data driver configured to drive data lines of the panel; a timing controller configured to control operations of the gate driver and the data driver; and a level shifter integrated circuit (IC) configured to receive a plurality of control signals from the timing controller, and generate and output a plurality gate control signals for controlling driving of the gate driver, in which the plurality of control signals include an on clock and an off clock, and the level shifter IC stores the on clock and the off clock in buffers based on one or more control signals from the timing controller, generates a plurality of scan clocks by logically processing the on clock and the off clock, and outputs the plurality of scan clocks to the gate driver.

Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

Abstract: A display device includes signal supply circuit having N blocks and data supply circuit for supplying data to the N blocks. Each block includes holding block having k data holders for supply signals to k columns, and scanning circuit block for sequentially selecting the k data holders to receive data from the data supply circuit. The scanning circuit block includes k-stage shift register formed from k registers. Scanning circuit is formed by N scanning circuit blocks each arranged in one of the N blocks, and sequentially selects the N holding blocks each arranged in one of the N blocks to sequentially select the k data holders of each selected holding block to receive data. In response to output from i-th register of n-th block, the data supply circuit sets (n+1)-th block in operation-enabled state.

Abstract: An optical sensing circuit includes a capacitor, and a light sensing unit, a compensation unit, and a switching element coupled to the capacitor. The light sensing unit includes a first light sensing transistor for sensing a first color. The compensation unit includes a second light sensing transistor for sensing a second color. The spectra of the second color and the first color do not overlap each other. When the light illuminates, the light sensing unit generates a first current and the compensation unit generates a second current. The second current reduces the magnitude of the charging or discharging current when the capacitor is charged or discharged by the first current. When the switching element turned on, the voltage of the capacitor is read to determine the color of the light. The voltage level of the gate of the first or second light sensing transistor is adjustable.

Abstract: To achieve a display device that is suitable for increasing in size and to provide a high-resolution display device. In the display device, three or more adjacent gate lines are supplied with the same selection signal. Three or more pixels that adjoin in the column direction are connected to different source lines. In each of the pixels, a transistor including a semiconductor layer is disposed. An inner source line among three or more source lines is disposed to overlap with a conductive layer that functions as a pixel electrode. Part of the semiconductor layer of the transistor is provided between the outer source line and a source line adjacent to the outer source line.

Abstract: Embodiments are directed to a display device having a display panel, a driving circuit, a sensing circuit, and a compensation circuit. The driving circuit provides a preset sensing voltage to a pixel of the display panel. The sensing circuit senses a pixel current generated by the pixel. The sensing circuit includes a sensing circuit that generates an integrated voltage signal indicative of the pixel current, and an offset circuit for adding an offset to the integrated voltage signal. The offset is based on a previously stored compensation amount for the pixel. The compensation circuit determines a new compensation amount for the pixel based on the offset integrated voltage. Additionally, the compensation circuit compensates a display voltage of the pixel by the new compensation amount in a subsequent display frame of the display device.

Abstract: According to one embodiment, a display device includes a display panel including a display area where first drive areas and second drive areas are alternately disposed, and display function layers which include first display function layers and second display function layers and which are changed to a transparent state and a scattering state, and a control unit. The control unit applies a drive voltage to the first display function layers, in a first field period. The control unit applies the drive voltage to the second display function layers, in a second field period. A polarity of the drive voltage in the first field period is different from a polarity of the drive voltage in the second field period.

Abstract: A level shift block of a level shift circuit includes a level shifter by which an amplitude level of a signal to drive a P-type transistor is extended to a negative side, and a level shifter by which an amplitude level of a signal to drive an N-type transistor is extended to a positive side.

Abstract: A display panel may include a plurality of pixel groups, a first lighting test circuit for testing at least one pixel of the plurality of pixel groups, a demultiplexer for providing data signals to the plurality of pixel groups, and a second lighting test circuit for testing one or more pixels of the plurality of pixel groups. At least one of the first lighting test circuit and the demultiplexer is positioned between the plurality of pixel groups and the second lighting test circuit.

Abstract: A liquid crystal display includes gate lines, data lines intersecting with the gate lines to define sub-pixels, and a transmission part including transmission lines connected with the data lines to transmit data signals, where at least one pair of the transmission lines are arranged to cross each other, some of the transmission lines cross each other so that a sequence of data signals applied to the data lines can be changed, any of the transmission lines is opened at a crossing point of the transmission lines and the opened portion is connected by a separate conductor, thereby insulating the transmission lines crossing each other from each other, and an additional process for connecting the opened portion is not needed, thereby simplifying a fabrication process for the liquid crystal display.