Abstract: According to one embodiment, a display device includes a display panel, switching elements, a power supply, a controller and a noise suppression circuit. The display panel displays an image. The switching elements supply a pixel signal to the display panel. The power supply supplies a power source voltage to the switching elements. The controller switches between a display period during which the display panel displays an image and a non-display period during which the display panel does not display an image. The noise suppression circuit preliminarily reduces a potential difference between the switching elements and the power supply when the controller switches between the display period and the non-display period.

Abstract: A display device according to an embodiment of the present invention includes: a plurality of data lines; a plurality of gate lines crossing the plurality of data lines; a non-quadrangular display panel including a plurality of pixels, each of the plurality of pixels being connected to one corresponding data line from among the plurality of data lines and one corresponding gate line from among the plurality of gate lines; and a data driver configured to supply a plurality of data signals to the plurality of data lines. At least one of the plurality of data lines is connected to a pixel from among the plurality of pixels in a first pixel column and another pixel in a second pixel column that is different from the first pixel column.

Abstract: There are provided a source driver integrated circuit, a controller, an organic light emitting display panel, an organic light emitting display device, and a method for driving the organic light emitting display device. Thus, it is possible to provide a structure in which different sensing components configured to sense sub-pixel characteristics can sense characteristics of the same sub-pixel together, and the structure enables more accurate recognition of a sensing difference between the sensing components on the basis of sensing values obtained from the respective sensing components and the sensing difference to be corrected using the recognized sensing difference. Thus, an image quality can be improved.

Abstract: A touch display panel includes a first substrate and a drive layer on the first substrate. The drive layer includes a plurality of gate lines. The touch display panel defines at least two blocks; each block includes at least two gate lines. A driving circuit system includes a gate driver coupled to the gate lines. The touch display panel includes a plurality of drive cycles. The driving circuit system drives the blocks in sequence during each drive cycle. Each block includes at least one display scanning period Ta and a touch scanning period Tb during each drive cycle. The gate driver is configured to scan the gate lines in sequence during each Ta. For each block, the gate lines are scanned from an initial gate line to an interrupted gate line in sequence, then the Tb starts. For one block, the interrupted gate lines in different drive cycles are different.

Abstract: A liquid crystal drive device includes a common driver configured to sequentially output a scanning signal having a plurality of voltage levels to a plurality of common wirings in a time division manner, a segment driver configured to output a display signal having a plurality of voltage levels to a plurality of segment wirings, and a contrast adjustment unit configured to generate contrast adjustment periods that are inserted into all duty periods, and output, to the common driver and the segment driver, a contrast control signal to control the timing of when the contrast adjustment periods are inserted into the duty periods in synchronization with the timing of the scanning signal and the display signal. The scanning signal and the display signal are output at an identical potential when a contrast adjustment period is indicated by the output of the contrast control signal.

Abstract: A display driver includes a driving circuit and a control circuit. An electro-optical panel includes plural sampling sections respectively provided for a predetermined number of plural source lines. The control circuit causes a relative time relationship between an ith graded output period of the driving circuit and an ith active period of an enable signal when a sampling operation is enabled for the ith sampling section to differ from a relative time relationship between a jth graded output period of the driving circuit and a jth active period of the enable signal when the sampling operation is enabled for the jth sampling section.

Abstract: To provide a semiconductor device for driving an electric load to be divided into a plurality of opening/closing devices so that when an abnormality exists in any one of the division devices, that division device can be removed and replaced by an auxiliary device. Each of a plurality of opening/closing circuit units has an upper-side opening/closing device and a lower-side opening/closing device; while load driving is stopped, there is monitored the potential of the connection point between the upper and lower opening/closing devices at a time when any one of the opening/closing devices is closed or both of them are opened, and it is determined whether there exists short-circuit abnormality or disconnection abnormality in each of the opening/closing devices. When abnormality exists, the upper and lower opening/closing devices are removed and the auxiliary circuit is made effective.

Abstract: Present invention is related to a display device and a driving method thereof, and particularly, to a display device and a driving method thereof, which control an output timing of a scan signal output to gate lines by using two or more external start signals having different timings.

Abstract: A display including a pixel cell is provided. When the liquid crystal display is displaying a static image, the pixel cell is refreshed through a first period, a second period, and a third period in sequence. In the first period, the pixel cell is charged by a target voltage. In the second period, the pixel cell is charged by a post voltage. In the third period, the pixel cell is charged by a base voltage until next of the first period. The post voltage is between the target voltage and the base voltage. In addition, a driving method for a display is also provided.

Abstract: A display device includes a display array and a driving circuit. The display array includes at least one scan line. The driving circuit drives the display array and includes a timing controller and a gate driver. The timing controller controls a refresh rate of the display array at a first frequency or a second frequency, where the first frequency is higher substantially than the second frequency. The gate driver switches between supplying an enable voltage signal and a disable voltage signal to the scan line. Under the first or frequency, a corresponding first or second voltage difference exists between the enable voltage signal and the disable voltage signal. The first voltage difference is substantially greater than the second voltage difference, and the enable voltage signal has a same enable period.

Abstract: A display device includes a pixel portion including a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element, in which a gate of the first transistor is electrically connected to a scan line, one of a source and a drain of the first transistor is electrically connected to a signal line, and the other of them is electrically connected to a gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to a power supply line and the other of them is electrically connected to the light-emitting element, and the first transistor includes an oxide semiconductor layer. A period when the display device displays a still image includes a period in which output of a signal to all the scan lines in the pixel portion is stopped.

Abstract: A clock generation circuit includes: a clock generator to receive a gate pulse signal and to generate at least one gate clock signal corresponding to the gate pulse signal; an over-current protector to detect a current level of the at least one gate clock signal, and to output a shutdown enable signal and at least one switching signal corresponding to the detected current level; and a switching unit including at least one switching device to output the gate pulse signal as the at least one gate clock signal. The clock generator is to generate the at least one gate clock signal in response to the shutdown enable signal, and the at least one switching device is to transmit the gate pulse signal as the at least one gate clock signal in response to the at least one switching signal.

Abstract: The present disclosure provides a shift register unit comprising a first signal input terminal, a second signal input terminal, an input and reset module, a pull-up module, a pull-down module, a pull-down control module, a clock signal input terminal, a first level input terminal, a second level input terminal, a first voltage terminal, a second voltage terminal, a signal output terminal, a discharge module and a current leakage suppression module. The present disclosure further provides a gate driving circuit, a touch display device, and a method for driving a shift register unit. A phenomenon of dark lines does not occur during display on the touch display device.

Abstract: A display device correction method performed by a control unit that performs display control on an organic electroluminescent (EL) panel including a plurality of display pixels, in an organic EL display which includes the organic EL panel and the control unit. The display device correction method includes: obtaining a cumulative value of a pixel signal supplied to a drive transistor which is included in a current pixel to be processed among the plurality of display pixels and supplies drive current according to the pixel signal to an organic EL element (OEL); calculating a shift amount of a threshold voltage of the drive transistor, using the cumulative value; calculating an amount of change in mobility, using the shift amount; and calculating a correction parameter for correcting a pixel signal, using the amount of change in mobility.

Abstract: An active matrix circuit substrate includes a first power supply line, a second power supply line, a third power supply line, a fourth power supply line, a first control line, and a second control line; a pixel electrode and a memory circuit; a common electrode that is electrically connected to the fourth power supply line; a capacitor that is provided between the third power supply line and the pixel electrode; a first switch circuit that is provided between the first power supply line and the pixel electrode and operates on the basis of an output of the memory circuit and a potential of the first control line; and a second switch circuit that is provided between the second power supply line and the pixel electrode and operates on the basis of the output of the memory circuit and a potential of the second control line.

Abstract: Circuits for displaying an input image in improved perceived resolution are described. A circuit includes memory cells, a horizontal decoder and a vertical decoder. Each of the memory cells is provided to store a pixel value to drive a pixel element on a display. The horizontal decoder (X-decoder) includes horizontal switches, each of the horizontal switches provided to address at least two rows of the cells simultaneously. Each of the horizontal switches is controlled by a horizontal switch signal to toggle among three rows of the cells with the middle row of the cells always selected. The vertical decoder (Y-decoder) includes vertical switches, each of the vertical switches provided to address at least two columns of the cells simultaneously. Each of the vertical switches is controlled by a vertical switch signal to toggle among three columns of the cells with the middle column of the cells always selected.

Abstract: The present disclosure provides a liquid crystal display panel and a driving method thereof. The liquid crystal display panel includes a common electrode, a plurality of common electrode lines, a plurality of data lines, and a plurality of gate lines, and at least a part of the data lines overlap with the common electrode and/or the common electrode line. The plurality of data lines are divided into at least two groups. The driving method includes: starting to supply, to the data lines in different groups, data signals corresponding to a gate line at different time points after the gate line is enabled.

Abstract: The embodiments of the present application disclose a display driving method for driving a display system, comprising: receiving K image information sequentially; generating combined image information according to the K image information; and displaying a combined image based on the combined image information; wherein generating combined image information comprises: receiving kth image information, storing the kth image information as a data matrix with mk rows and nk columns, and recording a storage address associated with nkth data in each row to acquire a kth address table, wherein various rows in the data matrix are stored sequentially by using addresses in a (k?1)th address table as first addresses, where K, mk, nk are integers greater than 1, and k is an integer greater than or equal to 1 and less than or equal to K; and repeating the above operations until k is equal to K.

Abstract: A display device includes a substrate including a first surface, and a second surface opposite the first surface, and defining a through portion passing therethrough, a pixel array including a plurality of pixels surrounding the through portion at the first surface, a plurality of scan lines extending along a first direction for providing scan signals to the pixels, and a plurality of data lines extending along a second direction crossing the first direction for providing data signals to the pixels, the plurality of data lines including first and second data lines adjacent the through portion at different layers, and having at least a portion thereof curved along a perimeter of the through portion.

Abstract: A data driver includes a digital to analog converter configured to receive a reference gray voltage and image data, and configured to generate gray voltages corresponding to the image data, and an output buffer including a plurality of buffer circuits connected to an output terminal of the digital to analog converter, and configured to selectively receive one of the gray voltages.

Abstract: To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor, a clock signal is input to a gate electrode of the first switching transistor, and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.

Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: a charging module, a reset module, a pull-up module, a first pull-down module, a second pull-down module and a compensation module. In a denoising phase, the first pull-down module can denoise the pull-up node and the output terminal respectively under the control of a pull-down node, a third power supply signal from a third power supply signal terminal and a switch power supply signal from a switch power supply terminal. Therefore, noises of the pull-up node and the output terminal in the shift register unit are reduced, the output effect of the shift register unit is improved and the problem of noise existing in driving process of the shift register unit is solved.

Abstract: The present disclosure provides a liquid crystal display panel composed of red pixel units, green pixel units and blue pixel units that are arranged in the form of matrix. Every adjacent two rows of pixel units form a pixel-unit group. Polarities of pixel units located at the same column in the same pixel-unit group are the same, and polarities of pixel units located at the same column in adjacent two pixel-unit groups are opposite, thus solving problem of color shift at large viewing angles. Polarities of adjacent red pixel units in each row of pixel units are alternately changed and polarities of adjacent blue pixel units in each row of the pixel units are alternately changed to alleviate grainy effect generated on the entire display image, thereby display effect is greatly enhanced. The present disclosure also provides a liquid crystal display device having the liquid crystal display panel.

Abstract: According to an aspect, a display device includes: a display unit; a lighting unit emitting internal light; a measurement unit; and a control unit controlling an intensity of the internal light and a gradation value of each pixel in the display unit. The control unit calculates a required luminance value for a luminance value of a pixel to be N times as high as a luminance value indicated by an input signal, the pixel performing output with the largest gradation value out of the pixels in a predetermined image display region. The control unit determines the intensity of the internal light based on an intensity of the external light measured by the measurement unit and the required luminance value, and calculates an output gradation value based on the gradation value indicated by input signal, the intensity of the external light, and the intensity of the internal light.

Abstract: The present application discloses a scanning driving circuit and a flat display apparatus, the scanning driving circuit includes a plurality of cascaded scanning driving unit, each scanning driving unit including a forward and reverse scanning circuit for controlling the forward or reverse scanning; an input circuit to perform charging to the pull-up control signal point and the pull-down control signal point; a leakage prevention circuit to preform a process to the leakage of the input circuit; an output circuit to generate a scanning driving signal and output to the level scanning line to drive a pixel unit.

Abstract: The present disclosure proposes a driving circuit. The driving circuit includes a gate-driver on array (GOA) unit at n stages and n scan lines. A scan line is arranged on the GOA unit at every stage. GOA units at any two neighboring stages arranged at both sides of the scan line. The GOA unit near the first clock signal line is connected to the first clock signal line. The GOA unit near the second clock signal line is connected to the second clock signal line. The nth stage GOA unit couples to an (n?1)th stage GOA unit and an (n+1)th stage GOA unit.

Abstract: According to one embodiment, a display device comprises a plurality of pixel circuits arrayed two-dimensionally. Each of the pixel circuits comprises a display element and a pixel memory configured to store a signal to drive the display element. An X-directional driver and a Y-directional driver can select arbitrary pixel circuits and drive the pixel circuits. A touch panel controller converts a sensing output of a touch-type input panel to coordinate data. A display controller receives the coordinate data and partially rewrites the coordinate data in units of pixel circuits of the display device via the X-directional driver and the Y-directional driver.

Abstract: The present disclosure provides a shift register unit, its driving method, a gate driver circuit and a display device. The shift register unit includes a first output module, a second output module, an input module and a control module. The first output module is connected to a first signal end, a first node and an output end. The second output module is connected to the output end, a second node and a second signal end. The control module is connected to the first node, the second node, the first signal end, the second signal end, a first clock signal end and a second clock signal end. The input module is connected to an input end, the second node and the second clock signal end.

Abstract: A touch-control panel and a touch-control display device are provided. The touch-control panel comprises a plurality of touch-control emitting electrodes arranged along a first direction, a plurality of touch-control receiving electrodes arranged along a second direction, and a touch-control driving circuit electrically with the plurality of touch-control emitting electrodes. The plurality of touch-control emitting electrodes are divided into a plurality of touch control emitting electrode groups along the first direction. The first direction crosses or intersects the second direction. In a first touch-control mode, the touch-control driving circuit is configured to electrically connect all touch-control emitting electrodes in a same touch-control emitting electrode group, and sequentially transit a touch-control detecting signal to the plurality of touch-control emitting electrode groups.

Abstract: A precharge voltage terminal as a connection unit that is for connection with an external precharge voltage output unit that outputs a precharge voltage, a voltage switching circuit that is connected to a data line drive circuit and the precharge voltage terminal in an input stage, is connected to data lines in an output stage, and switches a connection target of the data lines between the data line drive circuit and the precharge voltage terminal, and a control circuit that controls the voltage switching circuit such that the connection target of the data lines is switched to the precharge voltage terminal and the precharge is supplied to the data lines in a fly-back period before a tone display period in which a voltage of an image signal is supplied to pixels via the data lines are provided.

Abstract: The present application discloses an N-th shift register unit circuit including at least a gate-drive signal output sub-circuit, a pull-up control sub-circuit, and a pull-down control sub-circuit respectively connected between a pull-up node and a pull-down node and provided with a p-th clock signal in addition to an n-th clock signal. A driving method includes controlling the pull-down node at turn-off voltage level when the p-th clock signal is at turn-on voltage level during which the n-th clock signal is correspondingly rising to turn-on voltage level from turn-off voltage level.

Abstract: A shift register unit and a method for driving the shift register unit, a gate drive circuit and a display device are provided. The shift register unit includes a driving signal generating module and a selecting module. The driving signal generating module generates a driving signal for driving n rows of gate lines to be turned on, a duration of the driving signal being equal to a duration spent on scanning the n rows of gate lines, and n is equal to or greater than 2. The selecting module, connected to the driving signal generating module and input terminals of the n rows of gate lines, selects the n rows of gate lines sequentially and connects each selected gate line to the driving signal generating module, such that the driving signal is inputted to the n rows of gate lines sequentially.

Abstract: A chip on film circuit board is provided. The chip on film circuit board includes a film circuit board configured to include a first edge and a second edge each extending in a first direction, and a source driver IC configured to be connected to a plurality of voltage lines placed on the film circuit board, in which a ratio of an area in which the plurality of voltage lines are placed to a film area of the film circuit board is about 0.7 or greater and about 0.996 or less.

Abstract: A gate driving circuit includes a plurality of shift registers arranged to output the gate driving signals in sequence. The shift registers are divided into groups arranged in sequence, wherein the driving signal from a first one of a N+1th group of shift registers is next to the driving signal from a first one of a Nth group of shift registers; and at least one first compensation circuit connected to the last one of the Nth group of shift registers and the first one of the N+1th group of shift registers, wherein the first compensation circuit provides a first control signal to enable the last one of the Nth group of shift registers to perform signal holding, and provides a second control signal to enable the first one of the N+1th group of shift registers to perform pre-charging, wherein N is an integer greater than zero.

Abstract: A shift register includes: a plurality of clock signal terminals; and a plurality of input terminals. The plurality input terminals are configured to provide input signals under control by one or more clock signals from one or more of the plurality of clock signal terminals to realize both a forward scan and a backward scan of the shift register.

Abstract: A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.

Abstract: A gate driving circuit is disclosed which includes n stages that are sequentially arranged, n being an integer larger than or equal to 4. The n stages are divided into a first, second, third and fourth sets of stages that are configured to receive respective different combinations of a first clock signal, a second clock signal, a third clock signal and a fourth clock signal. The stages in the first set of stages and the stages in the third set of stages are cascaded with each other, and the stages in the second set of stages and the stages in the fourth set of stages are cascaded with each other. Also disclosed are an array substrate including the gate driving circuit, a display panel including the array substrate, and a driving method of the display panel.

Abstract: An exemplary virtual reality media provider system (“system”) includes a configuration of synchronous video and depth capture devices disposed at fixed positions at a real-world event. In real time, the video and depth capture devices capture two-dimensional video data and depth data for surfaces of objects at the real-world event. The system generates a real-time volumetric data stream representative of a dynamic volumetric model of the surfaces of the objects at the real-world event in real time based on the captured two-dimensional video data and captured depth data. The dynamic volumetric model of the surfaces of the objects at the real-world event is configured to be used to generate virtual reality media content representative of the real-world event as experienced from a dynamically selectable viewpoint corresponding to an arbitrary location at the real-world event and selected by a user experiencing the real-world event using a media player device.

Abstract: A display device includes a display panel including a plurality of data lines, a data driver to supply a source voltage to each data line through a source line, a switching circuit to connect each data line to the source line, and a multiplexer controller to produce a control signal operating the switching circuit and vary a voltage level of the control signal depending on the source voltage.

Abstract: A display device includes a display portion that includes a plurality of pixels; common potential supply main wiring that is disposed so as to surround the display portion on an outside of the display portion; a common potential wiring layer that extends to a gap region between the plurality of pixels in the display portion and is electrically connected to the common potential supply main wiring; an organic film that is disposed to cover the plurality of pixels; and a common electrode film that covers the display portion and the common potential supply main wiring, and is disposed to be in contact with the common potential supply main wiring. The common potential wiring layer has a plurality of contact regions in the gap region and the common electrode film is in contact with the plurality of contact regions.

Abstract: A data driver according to an exemplary embodiment includes a plurality of first output channels, a plurality of second output channels, a data controller and a data driving integrated circuit IC. The plurality of first output channels are connected to a plurality of data lines. The data controller receives an image data signal and a data control signal. The data controller generates an image data of one frame unit according to the image data signal and the data control signal. The data controller generates an output channel on/off data based on channel selection data. The data driving IC generates a plurality of data signals and a plurality of dummy signals according to the image data of one frame unit. The data driving IC switches a plurality of first switches transmitting the plurality of data signals to the plurality of first output channels and a plurality of second switches transmitting the plurality of dummy signals to the plurality of second output channels.

Abstract: A color-variable terminal includes a touchscreen, a display screen, a circuit board, and a liquid crystal light adjustment film. The touchscreen is located above the display screen. The circuit board is located below the display screen, and the circuit board includes a drive circuit. The liquid crystal light adjustment film is disposed on the touchscreen. The drive circuit is configured to apply a control voltage to the liquid crystal light adjustment film. The liquid crystal light adjustment film is in a transparent state when an amplitude of the control voltage is greater than or equal to a preset threshold, or the liquid crystal light adjustment film is in a non-transparent state when an amplitude of the control voltage is less than the preset threshold, and a color of the liquid crystal light adjustment film in the non-transparent state is different from a color of the display screen.

Abstract: A display device including: a plurality of sub-pixels arranged in a matrix, each including an electro-optical element having a structure in which a display functional layer is sandwiched between an upper electrode and a lower electrode; and an auxiliary interconnect contact in a pixel area in which the plurality of sub-pixels are arranged in a matrix and electrically connecting the upper electrode to an auxiliary interconnect, wherein m (m is an integer equal to or larger than two) sub-pixels adjacent to each other along an arrangement direction of the sub-pixels are regarded as one group, and n (n is a natural number smaller than m) auxiliary interconnect contacts are formed for each group.

Abstract: A display device is disclosed, which includes: a first substrate with a data line disposed thereon, wherein the data line extends along a data line-extension-direction; and plural pixel units disposed on the first substrate and each of the plural pixel units comprising: a transistor disposed on the first substrate; an insulating layer disposed on the transistor and including a via hole; a first electrode disposed on the insulating layer and electrically connecting to the transistor; and a pixel defining layer disposed on the first electrode and exposing partial first electrode to form a light emitting region. Herein, in a first pixel unit of the pixel units, an extension direction of a connecting line defined by a minimum distance between a first outline of the via hole and a second outline of the light emitting region is not perpendicular and not parallel to the data-line-extension direction.

Abstract: A disclosed display device includes a data driver configured to receive data signals corresponding to an input image and to output a first data signal corresponding to a first portion of the input image to be displayed. The display device also includes a display panel having a plurality of data lines and a display area configured to display the first portion of the input image based on the first data signal from the data driver. The data driver is further configured to cut off a second data signal corresponding to a second portion of the input image substantially outside the display area of the display panel from being output.

Abstract: A display device comprises a display panel having a plurality of pixels arranged in pixel rows and pixel columns, and a source circuit. The source circuit includes a plurality of signal lines, each signal line coupled to each pixel of a pixel column; a plurality of column drivers, each column driver connected to one of the signal lines so as to transmit pixel voltages to the pixels of its respective pixel column, the pixel voltages corresponding to image data values for displaying an image upon the display panel; and a plurality of pixel refresh circuits. Each pixel refresh circuit corresponds to one of the signal lines and is coupled to the respective column driver so as to be arranged to determine a voltage stored in the corresponding pixel and to transmit a refresh signal to the respective column driver to refresh the voltage stored in the corresponding pixel.

Abstract: An organic light emitting display device includes a display panel which is operated in a sensing mode or display mode and is provided with a plurality of sub-pixels, wherein each sub-pixel includes a driving transistor driven in accordance with a differential voltage between data and reference voltages, and an organic light emitting diode which emits light by a current flowing in accordance with driving of the driving transistor; a first memory for storing a characteristic value of the driving transistor sensed from the sub-pixel by the sensing mode; and a panel driver for generating the reference voltage based on the characteristic value of the driving transistor for the display mode.

Abstract: A liquid crystal display panel is provided, comprising a plurality of sub pixels arranged in a pixel array, which is formed by a plurality of data lines and a plurality of scan lines perpendicular to each other. The plurality of scan lines comprises a first scan line connected with a first sub pixel, the first scan line being enabled within a first time period after a polarity inversion of a drive signal level of a data line, and at least one second scan line being enabled within a second time period after the first time period. An RC delay of the second scan line is larger than that of the first scan line.

Abstract: A programmable level shifter for providing upshifted control signals to an active matrix display based on logic-level control signals received from a timing controller. The programmable level shifter includes a programmable state machine, level-shifting output drivers, and a programming interface. The programmable state machine is configured to receive at least one control signal from a timing controller. The state machine generates, based on said at least one control signal, a plurality of outputs for driving gate drivers of the active matrix display. The level-shifting output drivers convert the plurality of outputs generated by the programmable state machine to a higher-magnitude voltage level. The programming interface facilitates the programming of aspects of the programmable state machine.

Abstract: A pixel array, a display device and a display method are provided.