Particular Row Or Column Control (e.g., Shift Register) Patents (Class 345/100)
  • Patent number: 11935458
    Abstract: A display device includes: a first pixel connected to a first data line and a first scan line; a second pixel connected to the first data line and a second scan line; a first scan driver connected to a first scan start line and the first scan line; and a second scan driver connected to a second scan start line and the second scan line. In a first frame period, the second scan start line is to be suppled with a second scan start signal having a turn-on level, after a first period elapses after a first scan start signal having a turn-on level is supplied to the first scan start line. In a second frame period, a difference between a time at which the first scan start signal having the turn-on level is supplied and a time at which the second scan start signal having the turn-on level is supplied corresponds to a second period. The second period is shorter than the first period.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: March 19, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji Hyun Ka, Ki Myeong Eom, Kyong Hwan Oh, Hai Jung In
  • Patent number: 11929035
    Abstract: A display device includes a display panel including a plurality of pixels, a plurality of data lines extending in a first direction and coupled to the plurality of pixels, a plurality of first scan lines extending in a second direction different from the first direction and coupled to the plurality of pixels, and a plurality of second scan lines extending in the first direction and coupled to the plurality of first scan lines, a data driver which provides data voltages to the plurality of pixels through the plurality of data lines, and a scan driver which sequentially provides a scan signal to the plurality of pixels on a row-by-row basis through the plurality of second scan lines and the plurality of first scan lines. The data driver and the scan driver are implemented with a data-scan integration chip which outputs the data voltages and the scan signal.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: March 12, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jiwoong Kim, Jaekeun Lim
  • Patent number: 11929046
    Abstract: An electronic device including a substrate, a first signal line, a second signal line, a third signal line, a first level shifter, and a second level shifter is provided. The first signal line, the second signal line, and the third signal line are disposed on the substrate. Each of the first signal line, the second signal line, and the third signal line has two endpoints. The second signal line is disposed between the first signal line and the third signal line. The first level shifter is coupled to the first signal line and the third signal line. The second level shifter is coupled to the second signal line. The first level shifter is coupled to the two endpoints of the first signal line and the two endpoints of the third signal line. The second level shifter is coupled to the two endpoints of the second signal line.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: March 12, 2024
    Assignee: Innolux Corporation
    Inventor: Ching-Wen Shih
  • Patent number: 11929009
    Abstract: A shift register comprises a first shift register unit and a second shift register unit. The first shift register unit comprises a first input circuit connected to a first input terminal and a first pull-up node, a first output circuit connected to the first pull-up node, a first output terminal and a first clock terminal, and a first pull-down circuit. The second shift register unit comprises a second input circuit connected to a second input terminal and a second pull-up node, and a second output circuit connected to the second pull-up node, a second output terminal and a second clock signal.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: March 12, 2024
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11910665
    Abstract: Provided are an array substrate and a display device. The array substrate includes: a base substrate including a display area and a peripheral area including a first peripheral area and a corner area; plurality of sub-pixels, data lines, and power lines at the display area; a plurality of control signal lines, data signal input lines, a multiplexing circuit and a first power bus which are at the first peripheral area and the corner area; a plurality of control signal connecting lines electrically connected to the control signal lines, at least partially overlapping with the data signal input lines, and located between the first power bus and the display area; and a plurality of control signal input lines electrically connected to the control signal connecting lines, at least partially overlapping with the first power bus, and on one side of the control signal connecting lines away from the display area.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: February 20, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Pengfei Yu, Zhenhua Zhang, Shun Zhang, Huijuan Yang
  • Patent number: 11908373
    Abstract: The present application provides a display driving circuit and a display device, wherein the display driving circuit comprises a plurality of driving units, each of the driving units comprises a plurality of stages of sub driving units, each of the driving units is electrically connected to one of independent triggering units, and the sub driving units in the driving units are electrically connected stage by stage; and the display device comprises the display driving circuit. A structure of the driving circuit can realize partitioned work of the driving circuit, and can reduce power consumption of the display device when the display driving circuit is applied in the display device.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: February 20, 2024
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zuzhao Xu, Seungkyu Choi
  • Patent number: 11885991
    Abstract: A display device includes a display panel including a first array of light emitters having a first spacing in a first emission region of the display panel and a second array of light emitters having a second spacing in a second emission region of the display panel. The second spacing is distinct from the first spacing. The display device includes an optical filter including a first filter region and a second filter region. The first filter region changes distribution of first light from the first array of light emitters impinging on the first filter region so that the first light has a first distribution after passing through the first filter region. The second filter region changes distribution of second light from the second array of light emitters impinging on the second filter region so that the second light has a second distribution after passing through the second filter region.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: January 30, 2024
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Andrew John Ouderkirk, James Ronald Bonar, Jasmine Soria Sears
  • Patent number: 11887512
    Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a gate driving circuit, power lines, a first signal line group, and a second signal line group. The gate driving circuit includes cascaded shift register units; the power lines are configured to provide power signals to the shift register units; the first signal line group includes at least one clock signal line, and the clock signal line is configured to provide a clock signal to the shift register units; the second signal line group includes a trigger signal line, and the trigger signal line is configured to provide a trigger signal to a first-stage shift register unit; and the gate driving circuit includes at least one transistor, and an extending direction of a channel of the transistor is parallel to an extending direction of the one clock signal line.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: January 30, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao Zeng, Weiyun Huang, Yue Long, Yao Huang, Meng Li
  • Patent number: 11882730
    Abstract: Provided are a display panel and a display apparatus. The display panel includes a driving array layer having functional layers and insulation layers. The driving array layer includes a first transistor, a second transistor, a first capacitor including a first plate and a second plate, and a second capacitor including a third plate and a fourth plate. An active layer of the first transistor contains silicon, and an active layer of the second transistor contains oxide semiconductor. The first plate and the second plate are located in two of the functional layers, respectively, and the third plate and the fourth plate are located in two of the functional layers, respectively.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: January 23, 2024
    Assignee: Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventors: Jieliang Li, Jiaxian Liu
  • Patent number: 11875751
    Abstract: A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: January 16, 2024
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Soon-Dong Cho, Jung-Jae Kim, Min-Gyu Park, Jae-Won Han, Dong-Won Park
  • Patent number: 11862104
    Abstract: A gate driver may include: a controller to charge and discharge a first control node that pulls up an output voltage and a second control node that pulls down the output voltage; a first output unit having a first pull-up transistor to apply a gate high voltage to an output node in response to a charging voltage of the first control node, and a first pull-down transistor to apply a gate low voltage to the output node in response to a charging voltage of the second control node; and a switch unit to change a current path between a first output node and a first power line to which a high potential voltage is applied or a second power line to which a first clock signal is applied according to a carry signal transmitted from a previous signal transmission unit and a voltage level of the second control node.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: January 2, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: Seung Ho Heo, Hun Ki Shin
  • Patent number: 11854456
    Abstract: An electro-optic display having a plurality of pixels is driven from a first image to a second image using a first drive scheme, and then from the second image to a third image using a second drive scheme different from the first drive scheme and having at least one impulse differential gray level having an impulse potential different from the corresponding gray level in the first drive scheme. Each pixel which is in an impulse differential gray level in the second image is driven from the second image to the third image using a modified version of the second drive scheme which reduces its impulse differential The subsequent transition from the third image to a fourth image is also conducted using the modified second drive scheme but after a limited number of transitions using the modified second drive scheme, all subsequent transitions are conducted using the unmodified second drive scheme.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: December 26, 2023
    Assignee: E Ink Corporation
    Inventors: Demetrious Mark Harrington, Kenneth R. Crounse, Karl Raymond Amundson, Teck Ping Sim, Matthew J. Aprea
  • Patent number: 11854467
    Abstract: A gate driver and a display device including the gate driver are discussed. The gate driver in one example includes a shift register configured to control charging and discharging of a Q node and a QB node, and i output buffers sequentially connected to the shift register, where i is a natural number of at least 2. Each output buffer is configured to output a gate signal to a corresponding gate line in response to a voltage of the Q node and a voltage of the QB node. The gate driver further includes a dummy output buffer connected to the last stage of the shift register and configured to output a dummy signal to a dummy line in response to the voltage of the Q node.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: December 26, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sunghak Jo, Binn Kim
  • Patent number: 11847988
    Abstract: The present invention relates to a driving method for flicker suppression of a display panel and a driving circuit thereof. The driving circuit includes a source driving circuit and a common voltage generating circuit. The driving method includes driving the source driving circuit to generate at least one first source signal and at least one second source signal, the first source signal corresponds to at least one first pixel on a first scanning line; the second source signal corresponds to at least one second pixel on a second scanning line. The common voltage generating circuit generates at least one common voltage. While driving the first pixel and the second pixel to display the same gray scale image, the first source signal is not equal to the second source signal, or a first common voltage and a second common voltage generated by the common voltage generating circuit are different.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: December 19, 2023
    Assignee: Sitronix Technology Corporation
    Inventors: Hung-Yu Lu, Rong-Fong Chen
  • Patent number: 11847959
    Abstract: A display panel includes pixels connected to first and second data lines and a readout line. The data driver supplies data signals to the first and second data lines and supplies an initialization voltage to the readout line. Each of the pixels includes at least one light emitting element and a driving transistor. The driving transistor controls an amount of current based on a difference between a corresponding data signal among the data signals and an initialization voltage. In a sensing mode, the data driver supplies a test voltage to the first data line and a first off voltage to the second data line in a first period and supplies a second off voltage to the second data line in a second period after the first period. The second off voltage is different from the test voltage and the first off voltage.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: December 19, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dae Gwang Jang, Soo Yeon Kim
  • Patent number: 11847280
    Abstract: The present invention provides a touch panel and the touch detection circuit thereof, which comprise a gate driving circuit, a source driving circuit, and a detection circuit. The gate driving circuit is coupled to a plurality of gate lines of a display panel, outputs a plurality of gate signals to the plurality of gate lines, and controls state transition of the plurality of gate signals. The source driving circuit is coupled to a plurality of source lines of the display panel. The detection circuit is coupled to the plurality of source lines or to a portion of the plurality of source lines. The detection circuit detects the levels of the plurality of signals on the coupled source lines when the gate signals change states and generates a plurality of detection signals.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 19, 2023
    Assignee: Sitronix Technology Corp
    Inventor: Min-Nan Liao
  • Patent number: 11847967
    Abstract: A display substrate, including: a display region and a peripheral region located on the periphery of the display region. A scan driver circuit is disposed in the peripheral region. A plurality of sub-pixels, and a plurality of first signal lines that are connected to the scan driver circuit and extend in a first direction, are disposed in the display region. The display region includes: a substrate, and a semiconductor layer, a first conductive layer, a second conductive layer and a third conductive layer that are sequentially disposed on the substrate. The third conductive layer comprises: a plurality of first signal lines, and first electrodes and second electrodes of a plurality of transistors. An insulating layer between the third conductive layer and the first conductive layer is provided with first via holes.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: December 19, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Mengyue Fan, Wenbo Chen, Zhongliu Yang, Bing Zhang, Chenyu Chen, Shuang Zhao
  • Patent number: 11842667
    Abstract: The present disclosure relates to electronic displays and display components, specifically to a method of addressing more pixels with a smaller number of driver outputs while also allowing very narrow frames on three sides of a display. It further discloses a display driver integrated circuit capable of providing the signals required for the disclosed addressing method and display systems capable of being addressed by the disclosed method and display driver integrated circuit.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: December 12, 2023
    Assignee: New Vision Display, Inc.
    Inventor: Matthias T. Pfeiffer
  • Patent number: 11842660
    Abstract: A display apparatus includes a display panel including an active area that includes at least one module area and a bezel area positioned outside the active area, wherein a pixel array is positioned in the active area, and the at least one module area is formed as a light-transmissive area.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: December 12, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Namwook Cho, Changsoo Kim, Cheolhwan Lee
  • Patent number: 11823625
    Abstract: A shift register includes n shift register units which are cascaded. Each shift register unit includes a shift module and multiple enable modules. The shift module of an i-th-level shift register unit is configured to receive and latch a shift signal output by the shift module in an (i?1)-th-level shift register unit. The multiple enable modules of the i-th-level shift register unit are electrically connected to the shift module of the i-th-level shift register unit, and each of the multiple enable modules is configured to generate a gate driving signal according to the shift signal. n and i are positive integers, 1?i?n.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: November 21, 2023
    Assignee: Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventors: Hao Wu, Hao Wu, Poping Shen
  • Patent number: 11810394
    Abstract: The present invention provides a fingerprint identification panel and the fingerprint identification circuit thereof, which comprise a gate driving circuit, a source driving circuit, and a detection circuit. The gate driving circuit is coupled to a plurality of gate lines, outputs a plurality of gate signals to the plurality of gate lines, and controls a state transition of the plurality of gate signals. The source driving circuit is coupled to a plurality of source lines. The detection circuit is coupled to the plurality of source lines or to a portion of the plurality of source lines. The detection circuit detects the levels of the plurality of signals on the coupled source lines when the state of the gate signal is changed and generates a plurality of detection signals.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: November 7, 2023
    Assignee: Sitronix Technology Corp.
    Inventor: Min-Nan Liao
  • Patent number: 11804184
    Abstract: A source driver includes a plurality of shift register groups cascaded in sequence, an enable control circuit and at least one switching circuit electrically connected to the enable control circuit. Each shift register group includes a plurality of stages of shift registers, and is configured to sample digitized image data; a first start signal of an n-th shift register group is output by an (n?1)-th shift register group, n is a positive integer greater than 2. The enable control circuit is configured to output a first turn-on signal or a first turn-off signal. In two adjacent shift register groups, a last-stage shift register in a present shift register group is electrically connected to a first-stage shift register in a next shift register group through a switching circuit.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 31, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tangxiang Wang, Fei Yang
  • Patent number: 11790854
    Abstract: An electronic device includes a display panel including pixels respectively connected to scan lines, scan stages corresponding to the scan lines, where each of the scan stages receives a carry signal, and outputs a scan signal, masking circuits electrically connected to some of the scan stages, respectively, where each of the masking circuits outputs a masking carry signal in response to a masking signal and the scan signal, and transmission circuits electrically connected to others of the scan stages, respectively, where each of the transmission circuits outputs the scan signal output from a corresponding scan stage among the scan stages. A j-th (j is an integer greater than 1) scan stage among the scan stages receives one of the scan signal output from a (j?1)-th scan stage and the masking carry signal as the carry signal.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: October 17, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Heerim Song, Gyungsoon Park, Jinseok Jeong
  • Patent number: 11782321
    Abstract: An array substrate includes pixel electrodes arranged in an array, a plurality of scan lines extending along the row direction of the array and arranged along the column direction of the array and a plurality of data lines extending along the column direction and arranged along the row direction. One group of data lines includes a first data line and a second data line. The loaded drive voltage of the first data line and the loaded drive voltage of the second data line are different in the same frame. The driving process of one frame includes a reset stage and a display stage. At the reset stage, the first data line is connected to the second data line. At the display stage, the first data line is disconnected from the second data line.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: October 10, 2023
    Assignee: Shanghai Tianma Microelectronics Co., Ltd.
    Inventor: Yang Zeng
  • Patent number: 11776969
    Abstract: To provide a novel shift register. Transistors 101 to 104 are provided. A first terminal of the transistor 101 is connected to a wiring 111 and a second terminal of the transistor 101 is connected to a wiring 112. A first terminal of the transistor 102 is connected to a wiring 113 and a second terminal of the transistor 102 is connected to the wiring 112. A first terminal of the transistor 103 is connected to the wiring 113 and a gate of the transistor 103 is connected to the wiring 111 or a wiring 119. A first terminal of the transistor 104 is connected to a second terminal of the transistor 103, a second terminal of the transistor 104 is connected to a gate of the transistor 101, and a gate of the transistor 104 is connected to a gate of the transistor 102.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: October 3, 2023
    Inventor: Atsushi Umezaki
  • Patent number: 11776478
    Abstract: An electroluminescent display device includes a display panel including a display region, which includes a plurality of pixel arrangement regions and a plurality of scan circuit regions between the plurality of pixel arrangement regions, and a non-display region around the display region; a scan driving circuit formed in the plurality of scan circuit regions, and a clock signal line transferring a clock signal, and a first voltage line and a second voltage line located at both sides of the clock signal line, the clock signal line and the first and second voltage lines being located in the scan circuit region, wherein the first voltage line transfers a low potential driving voltage which is supplied to a cathode corresponding to the display region.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: October 3, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Eui-Hyun Chung, Sung-Hun Kim, Da-Hye Shim, Soon-Hwan Hong
  • Patent number: 11763752
    Abstract: A display substrate, a manufacturing method and a display device are provided. The display substrate includes a scan driving circuit; the scan driving circuit includes a plurality of shift register units, at least one shift register unit includes a signal output line and an output circuit, the output circuit includes an output transistor and an output reset transistor; the signal output line includes a first output line portion extending along the first direction; the first output line portion is coupled to the second electrode of the output transistor or the output reset transistor through a plurality of first or second signal line via holes arranged in a signal line overlap area, and the plurality of first or second signal line via holes are arranged along the first direction.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: September 19, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lu Bai, Xin Zhang, Pengfei Yu
  • Patent number: 11763715
    Abstract: An electronic device and a scan driving circuit each including a shift register and a demultiplexer are provided. The demultiplexer is electrically connected to the shift register. The demultiplexer includes at least one scan unit. The at least one scan unit includes a switch circuit and a buffer. An input terminal of the buffer is electrically connected to the switch circuit. An output terminal of the buffer is electrically connected to a scan line.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: September 19, 2023
    Assignee: Innolux Corporation
    Inventors: Yi-Shiuan Cherng, Chia-Hao Tsai
  • Patent number: 11764074
    Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: September 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Yukinori Shima, Masahiko Hayakawa, Takashi Hamochi, Suzunosuke Hiraishi
  • Patent number: 11763719
    Abstract: The present application provides a gate driving unit circuit and a method of driving the same, a gate driving circuit and a display apparatus. The gate driving unit circuit includes a shift register and a plurality of driving signal output sub-circuits. Each driving signal output sub-circuit corresponds to one of gate lines on an array substrate, is coupled to a first power supply terminal and a signal output terminal of the shift register, and also coupled to a corresponding one of driving scan signal lines. Each driving signal output sub-circuit is configured to output, under the control of a signal output by the signal output terminal of the shift register, a driving scan signal provided by the corresponding driving scan signal line or an OFF voltage provided by the first power supply terminal to the corresponding gate line.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: September 19, 2023
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangxing Wang, Kan Zhang, Bin Zhang, Pengming Chen, Dianzheng Dong, Qiang Zhang, Wenpeng Xu, Heng Lu
  • Patent number: 11749215
    Abstract: A display driving device for improving the definition of an image according to one aspect of the present invention includes a brightness calculator for calculating first brightness data corresponding to a first resolution and second brightness data corresponding to a second resolution less than the first resolution using input image data, an offset calculator for calculating an offset on the basis of the first brightness data and the second brightness data, an input image converter for converting the input image data into input image data to which the calculated offset has been applied, a first data output unit for generating output image data for a first panel using the converted input image data and outputting the generated output image data, and a second data output unit for generating output brightness data for a second panel using the second brightness data and outputting the generated output brightness data.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: September 5, 2023
    Assignee: LX SEMICON CO., LTD.
    Inventors: Do Hoon Lee, Jung Eun Baek, Chan Yung Kim, Hyun Kyu Jeon, Ji Won Lee
  • Patent number: 11749195
    Abstract: A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: September 5, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yoon Jung Chai, Won Jun Lee, Chol Ho Kim, Sung Hoon Lim, Yoo Seok Jang
  • Patent number: 11741914
    Abstract: An array substrate and a display panel are disclosed in an embodiment of the present application. The array substrate includes a plurality of GOA units in cascade and a plurality of clock signal lines. The plurality of clock signal lines are arranged on one side of the GOA units and are arranged at intervals along a direction away from the GOA units. The plurality of GOA units are electrically connected to the plurality of clock signal lines, respectively. Wherein, a number of the GOA units electrically connected to each of the clock signal lines is equal. The array substrate reduces a resistance difference and a capacitance difference between the plurality of clock signal lines and alleviates a problem of dense horizontal lines by adjusting a number of stages of the GOA units.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: August 29, 2023
    Assignees: Huizhou China Star Optoelectronics Display Co., Ltd., TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Jie Li, Zhixiang Chen
  • Patent number: 11740795
    Abstract: Techniques for configurable link interfaces for a memory device are described. In some examples, memory devices may require periodic link training to support data transfer with a host device at relatively fast rates. However, in some managed memory applications, memory dies of a memory device may have integrated controllers that do not support such link training, and accordingly may not support some clock rates or data rates. To support data transfers between a host device and a memory device at relatively fast clock rates or data rates without link training, a memory die may be fabricated with a configurable link interface that can support different mappings between components and operation according to different clock rates or data rates. In some examples, a memory die may be fabricated in a manner that supports configurable mappings between an array and a data channel interface that are operable according to different multiplexing and serialization.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: August 29, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Suryanarayana B. Tatapudi, John David Porter, Jaeil Kim, Mijo Kim
  • Patent number: 11735116
    Abstract: A pixel circuit, a method for driving the pixel circuit and a display device including the same are disclosed. The pixel circuit includes a driving element including a first electrode connected to a first power line to which a pixel driving voltage is applied, a gate electrode connected to a first node, and a second electrode connected to a second node; a first switch element including a first electrode connected to a second power line to which a data voltage is applied, a gate electrode to which a first scan pulse is applied, and a second electrode connected to the first node; a second switch element including a first electrode connected to the second power line, a gate electrode to which a second scan pulse is applied, and a second electrode connected to the first node.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: August 22, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: In June Kim, Jae Woong Youn
  • Patent number: 11735598
    Abstract: To provide a novel shift register. Transistors 101 to 104 are provided. A first terminal of the transistor 101 is connected to a wiring 111 and a second terminal of the transistor 101 is connected to a wiring 112. A first terminal of the transistor 102 is connected to a wiring 113 and a second terminal of the transistor 102 is connected to the wiring 112. A first terminal of the transistor 103 is connected to the wiring 113 and a gate of the transistor 103 is connected to the wiring 111 or a wiring 119. A first terminal of the transistor 104 is connected to a second terminal of the transistor 103, a second terminal of the transistor 104 is connected to a gate of the transistor 101, and a gate of the transistor 104 is connected to a gate of the transistor 102.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: August 22, 2023
    Inventor: Atsushi Umezaki
  • Patent number: 11705050
    Abstract: A power management integrated circuit includes a flip-flop circuit configured to perform a logic operation on a start clock signal which sets a driving start time point of a gate driving circuit and an on-clock signal which sets an output start time point of the gate driving circuit; a first AND gate circuit configured to receive one among output signals of the flip-flop circuit and the start clock signal, to perform an AND logic operation thereon, and to generate a gate start signal; and a second AND gate circuit configured to receive the other of the output signals of the flip-flop circuit and the start clock signal, to perform an AND logic operation thereon, and to generate a gate reset signal.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: July 18, 2023
    Assignee: LX SEMICON CO., LTD.
    Inventors: Jin Su Byeon, Cheol Ho Lee
  • Patent number: 11694586
    Abstract: A display panel and a display device are provided. The display panel and display device include gate driver on array (GOA) units in a first column, GOA units in a second column, and signal input lines. By adjusting a positional relationship between the signal input line and the GOA units in the first column and the GOA unit in the second column, the GOA units in the first column and the GOA units in the second column may share the signal input line, so as to save a set of signal input lines and reduce a width of the frame area.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 4, 2023
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: You Pan
  • Patent number: 11688326
    Abstract: Disclosed is a shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a blanking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of the first node, the composite output signal including a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: June 27, 2023
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11688358
    Abstract: A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: June 27, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki
  • Patent number: 11688339
    Abstract: A display substrate and manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit and a first clock signal line that are on the base substrate, the first clock signal line extends along a first direction on the base substrate and is configured to provide a first clock signal to the shift register unit, the shift register unit includes an input circuit, an output circuit, a first control circuit and an output control circuit, and the first control circuit includes a first control transistor and a second control transistor, an active layer of the first control transistor and an active layer of the second control transistor are a continuous control semiconductor layer, the control semiconductor layer extends along the first direction.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: June 27, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pengfei Yu, Lu Bai, Jie Dai, Linhong Han
  • Patent number: 11682332
    Abstract: Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: June 20, 2023
    Assignee: Semionductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Umezaki
  • Patent number: 11676556
    Abstract: A method and light-emitting diode (LED) device configured to compensate for crosstalk between rows of the LED device.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: June 13, 2023
    Assignee: APPLE INC.
    Inventors: Vehbi Calayir, Rodrigo Calderon Rico, Bret Rothenberg, Chengrui Le
  • Patent number: 11645968
    Abstract: A shift register comprises a first shift register unit and a second shift register unit. The first shift register unit comprises a first input circuit connected to a first input terminal and a first pull-up node, a first output circuit connected to the first pull-up node, a first output terminal and a first clock terminal, a first pull-down circuit and a unidirectional isolation circuit, and the first output terminal is connected to the first pull-down circuit by the unidirectional isolation circuit. The second shift register unit comprises a second input circuit connected to a second input terminal and a second pull-up node, and a second output circuit connected to the second pull-up node, a second output terminal and a second clock signal, and the second output terminal is connected to a node between the first pull-down circuit and the unidirectional isolation circuit.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: May 9, 2023
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11640522
    Abstract: An artificial neural network (ANN) generates a base expanded matrix that represents an output of a layer of the ANN, such as the output layer. Values in each row are grouped with respect to a set of network parameters in a previous layer, and a sum of the values in each row produces an output vector of activations. The ANN updates the values in at least one column of the expanded matrix according to parameter updates, which results in an updated expanded matrix or an update expanded matrix. An error or a total cost can be computed from the updated expanded matrix or the update expanded matrix. Nonlinear activation functions can be modeled as piecewise linear functions, and a change in an activation function's slope can be modeled as a linear update to an expanded matrix. Parameter updates can be constrained to a restricted value set in order to simplify update operations performed on the expanded matrices.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: May 2, 2023
    Assignee: Tybalt, LLC
    Inventor: Steve Shattil
  • Patent number: 11636798
    Abstract: A display device includes: a pixel unit including pixels connected to data lines and scan lines, and signal output lines, where at least one signal output line of the signal output lines is connected to each of the scan lines through a contact point; a data driver disposed at one side of the pixel unit to drive the data lines; a scan driver disposed at the one side of the pixel unit together with the data driver to drive the scan lines; and a timing controller controlling the data driver and the scan driver. The data driver includes: output buffers outputting data signals to the data lines, respectively; and a slew rate controller adjusting a slew rate of the data signals by controlling a bias value supplied to the output buffers in units of pixel rows based on positions of the pixels and a change in the data signals.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ki Hyun Pyun, Min Young Park, Eun Jin Choi
  • Patent number: 11626060
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: April 11, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kang Nam Kim, Sung Hoon Lim, Woo Geun Lee, Kyu Sik Cho, Jae Beom Choi
  • Patent number: 11619848
    Abstract: According to one embodiment, a display device includes a first common electrode and a second common electrode arranged in a first direction, a first switch unit selectively supplying a first drive signal or a second drive signal different from the first drive signal to the first common electrode, and a second switch unit selectively supplying the first drive signal or the second drive signal to the second common electrode, wherein the second common electrode and the first switch unit are arranged in a second direction intersecting the first direction, the first switch unit comprises a first switch circuit and a second switch circuit arranged in the second direction.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: April 4, 2023
    Assignee: Japan Display Inc.
    Inventor: Gen Koide
  • Patent number: 11615757
    Abstract: A liquid crystal display device according to the present disclosure includes: a liquid crystal unit including a pixel electrode, a counter electrode facing the pixel electrode, and a liquid crystal layer sealed between the pixel electrode and the counter electrode; a first writing circuit configured to write a positive polarity video signal among video signals whose polarity changes periodically; and a second writing circuit configured to write a negative polarity video signal among the video signals whose polarity changes periodically. The liquid crystal unit, the first writing circuit, and the second writing circuit are provided for each pixel. The first writing circuit and the second writing circuit include transistors having conductivity types different from each other.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: March 28, 2023
    Assignee: SONY CORPORATION
    Inventor: Koichi Amari
  • Patent number: 11610550
    Abstract: A gate driving unit includes an input module, a first output module, a second output module, a feedback module, and an output-controlling module. The input module outputs a previous level-transferring signal into a first node. The first output module outputs a present level-transferring signal. The second output module outputs a scan signal. The feedback module outputs a present-level feedback signal. The output-controlling module pulls up potential of the scan signal to a first direct-current high voltage and pulls up potential of the present level-transferring signal to a second direct-current high voltage.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: March 21, 2023
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Liuqi Zhang, Baixiang Han