Particular Timing Circuit Patents (Class 345/99)
  • Patent number: 11443699
    Abstract: A display device includes a display panel having pixels. A timing controller generates a first control signal and data control signals. Data driving circuits each recover a data signal from a corresponding data control signal of the data control signals in response to the first control signal, generate a data voltage corresponding to the data signal, and provide the data voltage to the display panel. Each of the data driving circuits includes: a setting unit configured to acquire a setting value from the data control signal; an equalizer configured to compensate for distortion of the corresponding data control signal according to the setting value to output compensated data control signal; and a recoverer configured to recover a clock signal from the compensated data control signal and recover the data signal from the compensated data control signal based on the clock signal.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: September 13, 2022
    Inventors: Tae Gon Im, Jong Jae Lee, Jun Pyo Lee, Byung Kil Jeon, Won Hee Lee
  • Patent number: 11410632
    Abstract: A display device includes a plurality of pixels, a serial-to-parallel converter (SPC), a plurality of digital-to-analog converters (DACs), a plurality of switches, and a controller. The pixels are arranged in rows and columns. The columns include a first column and an adjacent second column. The SPC generates parallelized pixel data based on serial pixel data sent by a graphics controller. The DACs are coupled to the SPC and include a first DAC corresponding to the first column and a second DAC corresponding to the second column. The switches include a first switch that includes a first input coupled directly to an output of the SPC, a second input coupled to an input of the first column, and an output coupled to an input of the second column. The controller selects pixel data on one of the first input and the second input for output by the first switch.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: August 9, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Lee Atkinson
  • Patent number: 11402916
    Abstract: Embodiments of the present disclosure relate to a touch display device, a driving method, and a driving circuit. More particularly, embodiments of the present disclosure relate to a touch display device, a driving method, and a driving circuit capable of preventing touch sensitivity from being affected by display driving even though simultaneously performing the display driving and touch driving by supplying a data voltage to a plurality of data lines disposed in a display panel, supplying a common voltage to a plurality of common electrodes disposed in the display panel, displaying an image through the display panel, and supplying a common voltage to the common electrodes.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: August 2, 2022
    Assignee: LG Display Co., Ltd.
    Inventors: CheolSe Kim, HoonBae Kim, SunYeop Kim
  • Patent number: 11393374
    Abstract: A display device and a method of driving the same are provided. The display device according to an embodiment includes a plurality of pixel rows, a data driver configured to provide first data voltages which correspond to first line grayscale data to pixels disposed in an (N?1)-th pixel row, provide second data voltages which correspond to second line grayscale data to pixels disposed in an N-th pixel row, and provide third data voltages which correspond to third line grayscale data to pixels disposed in an (N+1)-th pixel row, and a data compensator configured to compensate for the second line grayscale data by using one of a first compensation and a second compensation based on the first line grayscale data, the second line grayscale data, and the third line grayscale data.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 19, 2022
    Inventors: Won Jin Seo, Eun Jin Choi, Ki Hyun Pyun
  • Patent number: 11373599
    Abstract: An array substrate, a display panel and a display device are provided in the present disclosure. The array substrate includes a plurality of pixel circuits arranged in an array and a first signal line electrically connected to a pixel circuit of the plurality of pixel circuits. The first signal line includes a branch portion; the pixel circuit includes a storage capacitor, a drive transistor, and a first connection portion electrically connected to a gate electrode portion of the drive transistor; one plate of the storage capacitor at least partially overlaps the gate electrode portion of the drive transistor; and the branch portion at least partially overlaps the first connection portion.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: June 28, 2022
    Assignees: Wuhan Tianma Micro-Electronics Co., Ltd., Wuhan Tianma MicroElectronics Co., Ltd. Shanghai Branch
    Inventor: Xian Chen
  • Patent number: 11367375
    Abstract: The present embodiment relates to a data processing device and a display device and, more specifically, to data processing device and a display device for selectively applying an image quality improvement function in consideration of the characteristics depending on the positions on a display panel.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: June 21, 2022
    Assignee: LX Semicon Co., Ltd.
    Inventors: Jae Uk Jeon, Jung Bae Yun, Man Jeong Ko, Byung Seob Song
  • Patent number: 11348532
    Abstract: The display device includes a first pixel connected to a first scan line and a first data line, a second pixel connected to a second scan line and the first data line, a scan driver configured to supply a scan signal to the first scan line and the second scan line, and a data driver connected to the first data line. The data driver provides a first data signal to the first pixel when the scan signal is applied to the first scan line, the data driver provides a second data signal to the second pixel when the scan signal is applied to the second scan line, and a length of a first period in which the first data signal is provided is different from a length of a second period in which the second data signal is provided.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: May 31, 2022
    Inventors: Ki Hyun Pyun, Young Soo Sohn
  • Patent number: 11335227
    Abstract: Device for displaying images comprising: a line selector, the line selector and/or the column controller comprising a selection circuit comprising a succession of output channels corresponding to various rows of the matrix, said selection circuit further comprising a succession of shift registers and a succession of switches controlled by at least one configuration word for controlling the respective configurations of the succession of switches of said selection circuit and for placing the switches of said succession of switches respectively in one of said first configuration or second configuration according to the respective states of configuration bits of this configuration word, the first configuration allowing to propagate a signal in the succession of registers, the second configuration allowing to duplicate a signal emitted on the preceding output channel on the given output channel in order to consequently duplicate on a row corresponding to the given output channel a piece of data intended for a row
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 17, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Yoann Seauve
  • Patent number: 11335295
    Abstract: A processing system includes a timing controller and source driver circuitry. The timing controller is configured to stop scanning of a plurality of gate lines of a display panel in response to a detection of a communication failure between the processing system and a controller. The source driver circuitry is configured to update a plurality of display elements of the display panel to cause a black display in response to expiration of a time limit after the detection of the communication failure. The timing controller may be further configured to resume the scanning of the plurality of gate lines in response to the expiration of the time limit.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: May 17, 2022
    Assignee: Synaptics Incorporated
    Inventors: Tomohiro Hirakawa, Takayuki Noto, Masaaki Shiomura, Hirokazu Hatayama, Yoriaki Miyoshi, Keiichi Yoshida, Hiroshi Shimura
  • Patent number: 11322071
    Abstract: An operational amplifier includes an input stage with a first main input unit, a first auxiliary input unit, a second main input unit and a second auxiliary input unit, an amplification stage with a first current mirror receiving currents from the first main input unit and the first auxiliary input unit, and a second current mirror receiving currents from the second main input unit and the second auxiliary input unit, an output stage receiving voltages from the first current mirror and the second current mirror, a voltage storage unit storing an intermediate voltage based on an output signal generated by the output stage during at least one of a first operation period and a second operation period, and a switching unit that differently controls a first feedback path between the output stage and the input stage and a second feedback path between the output stage to the voltage storage unit in accordance with the first operation period and the second operation period.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: May 3, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyunghoon Chung, Jaesung Kang, Jihyun Lee, Jeongwoo Lim, Yunseok Jang, Jaewon Choi
  • Patent number: 11315478
    Abstract: A display device according to an embodiment of the present disclosure includes a display panel configured to display an image using a plurality of pixels, a timing controller configured to generate an embedded clock point-to-point interface (EPI) data signal according to an EPI protocol, a display panel driver configured to write pixel data of an input image onto the plurality of pixels based on the EPI data signal, a wireless signal detection unit configured to detect an electromagnetic wave signal surrounding the display device and convert the detected electromagnetic wave signal into an electric signal, and a detection signal output unit configured to compare the electric signal with a reference signal and output a detection signal according to a comparison result, wherein the timing controller converts a preset signal characteristic of the EPI data signal according to the detection signal and outputs the EPI data signal.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: April 26, 2022
    Assignee: LG Display Co., Ltd.
    Inventors: Jun Su Kim, Jae Kwon Chae
  • Patent number: 11315476
    Abstract: The present disclosure proposes a power management chip, a driving method, and a driving system. The power management chip includes a register, a signal receiving circuit configured to receive a second voltage data, and a processing circuit configured to examine the first voltage data and the second voltage data and write the second voltage data into the register when the first voltage data and the second voltage data are different. After the signal receiving circuit receives the second voltage data, the processing circuit examines the first voltage data and the second voltage data to prevent the first voltage data from being modified. This prevents the abnormality of the display and solves the above-mentioned problem of a conventional power management chip, whose data may be modified such that the display panel abnormally displays.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: April 26, 2022
    Inventors: Wenfang Li, Dan Cao
  • Patent number: 11308911
    Abstract: This application discloses a display device, a driving method, and a display system. The display device includes the display panel, where the display panel includes a scanning line and a data line; a source driver chip arranged to output a source driver signal of the display panel and a gate driver chip arranged to output a gate driver signal of the display panel; a signal delay circuit, where the gate driver signal is output to the scanning line by the signal delay circuit; and the source driver signal is directly output to the data line.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: April 19, 2022
    Assignee: HKC CORPORATION LIMITED
    Inventor: Xiaoyu Huang
  • Patent number: 11270642
    Abstract: A pixel unit includes a first sub-pixel circuit and a second sub-pixel circuit. The first sub-pixel circuit includes a first sub-pixel driving circuit and a first light-emitting element, and the second sub-pixel circuit includes a second sub-pixel driving circuit and a second light-emitting element. The first sub-pixel driving circuit and the second sub-pixel driving circuit are connected to a first data line, and the first sub-pixel driving circuit is connected to a first gate line, the second sub-pixel driving circuit is connected to the second gate line. The first sub-pixel driving circuit is configured to drive the first light-emitting element by a data voltage on the first data line under the control of the first gate line. The second sub-pixel driving circuit is configured to drive the second light-emitting element by the data voltage on the first data line under the control of the second gate line.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: March 8, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Meng Li, Yongqian Li, Song Meng, Zhidong Yuan, Can Yuan, Haixia Xu, Wenchao Bao
  • Patent number: 11237664
    Abstract: The present disclosure discloses a driving method and device of a touch display panel. The driving method includes: acquiring image data of an image to be displayed; judging whether the acquired image data is a reloaded picture with a default polarity mode; performing polarity adjustment on the image data when judging that the image data is a reloaded picture with a default polarity mode; and driving the touch display panel to display image according to the image data after polarity adjustment. Wherein the default polarity mode includes: the polarities of image data corresponding to each two adjacent data lines are opposite, while the polarities of image data corresponding to the same data line are the same.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: February 1, 2022
    Assignees: Hefei BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixiang Fang, Liangliang Zheng, Guanglei Yang, Peng Ding
  • Patent number: 11232763
    Abstract: The embodiments of the present disclosure provide a shift register and a driving method thereof, a gate driving circuit, and a display device. The shift register includes a compensation selection circuit, a storage circuit, a blanking input circuit, and a shift register circuit. The compensation selection circuit is configured to provide an input signal to a first node. The storage circuit is configured to store and maintain a voltage difference between a blanking control signal terminal and the first node. The blanking input circuit is configured to provide a blanking input signal to a second node. The shift register circuit is configured to provide a compensation driving signal during a blanking period, and provide a scan driving signal during a display period.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: January 25, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhidong Yuan, Yongqian Li, Haixia Xu, Can Yuan
  • Patent number: 11200938
    Abstract: Several embodiments of memory devices and systems with selective page-based refresh are disclosed herein. In one embodiment, a memory device includes a controller operably coupled to a main memory having at least one memory region comprising a plurality of memory pages. The controller is configured to track, in one or more refresh schedule tables stored on the memory device and/or on a host device, a subset of memory pages in the plurality of memory pages configured to be refreshed according to a refresh schedule. In some embodiments, the controller is further configured to refresh the subset of memory pages in accordance with the refresh schedule.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: December 14, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Ameen D. Akel
  • Patent number: 11160170
    Abstract: The invention provides a display and an electronic device. The display includes a first substrate, a second substrate, a display medium layer, and a flexible printed circuit board. The first substrate is an active component array substrate and has a first region and a second region. The second substrate is disposed opposite to the first substrate and faces the first region of the first substrate, wherein the second region of the first substrate is a region of the first substrate extending beyond the second substrate. The display medium layer is disposed between the first substrate and the second substrate and located in the first region. The flexible printed circuit board is disposed in the second region and electrically connected to the first substrate, and an orthographic projection of the flexible printed circuit board on the first substrate is located within the range of the first substrate.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: October 26, 2021
    Assignee: Coretronic Corporation
    Inventors: Xin-Xian Li, Yao-Cheng Lu, Chin-Lung Chen
  • Patent number: 11127337
    Abstract: The present embodiment relates to a device for driving pixels arranged on a display panel, and a data driving device according to the present embodiment can transmit image data to a plurality of channel groups by including two or more mapping units for mapping the image data to a channel link or by using one data mapping unit connected to a plurality of multiplexers.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 21, 2021
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Min Young Jeong, Yong Jung Kwon, Ho Sung Hong, Jung Bae Yun, Jeung Hie Choi
  • Patent number: 11114039
    Abstract: A micro-display device comprises a silicon substrate in which a plurality of gate lines, a plurality of data lines, a plurality of emission signal lines, and a plurality of subpixels are disposed; a gate driver circuit disposed on a first side of a pixel array to drive the plurality of gate lines; an emission driver circuit driving the plurality of emission signal lines and disposed on a second side of the pixel array different from the first side of the pixel array where the gate driver circuit is disposed; a data driver circuit disposed on a third side of the pixel array to drive the plurality of data lines; a memory storing duty data regarding duty ratios of an emission signal applied to the plurality of emission signal lines; and a control circuit controlling signals applied to the gate driver circuit, the data driver circuit and the emission driver circuit, wherein the control circuit is set to have different emission times with respect to subpixels connected to the plurality of emission signal lines acc
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: September 7, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sojung Jung, Beom-Jin Kim, Bongchoon Kwak
  • Patent number: 11011128
    Abstract: The present invention teaches a GOA circuit driving method and a GOA circuit driving device. Through the configuration of a buffer capacitor electrically connected to the level shift IC, the level shift IC connects to the buffer capacitor and switches to the transition level during shifting the target clock signals from high to low level or from low to high level. Through the buffer capacitor, the present invention is able to keep the transition level always equal to one half of the sum of the low voltage and the high voltage, thereby maximizing reduction of power consumption and feedthrough effect of the GOA circuit.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: May 18, 2021
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xiang Gao
  • Patent number: 11003034
    Abstract: The present invention relates to a display device comprising: a display panel having a plurality of pixels and a plurality of source lines, wherein each of the pixels is electrically connected to a respective source line; and an SD IC for providing pixel voltages and receiving a noise storage control signal and a noise output control signal; characterized in that the SD IC further comprises a noise reduce module to store voltage levels of the pixel voltages as compensating voltages based on the noise storage control signal and to output the compensating voltages based on the noise output control signal, wherein during a normal period, the SD IC outputs the pixel voltages to the pixels; during a compensation period, the SD IC outputs the compensating voltages to the pixels; wherein the noise output control signal is phased-delayed with respect to the noise storage control signal.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: May 11, 2021
    Assignee: AU OPTRONICS (KUNSHAN) CO., LTD.
    Inventors: Chung-Yu Huang, Jian-Feng Li, Kai-Yuan Siao
  • Patent number: 10991295
    Abstract: A display driver (100) drives a liquid crystal panel (200) that is driven by a static drive method. The display driver (100) includes an interface circuit (110), a selection circuit (120), and a drive circuit (130). The interface circuit (110) receives instruction information and display data from the outside. The selection circuit (120) selects n pieces of selected duty ratio data, which are n pieces of duty ratio data of k pieces of duty ratio data, based on the instruction information. The drive circuit (130) selects output duty ratio data corresponding to a tone value indicated by the display data from the n pieces of selected duty ratio data, and performs PWM driving of the liquid crystal panel (200) by outputting a drive signal having a duty ratio indicated by the selected output duty ratio data.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 27, 2021
    Inventors: Ryota Takizawa, Norichika Muraki
  • Patent number: 10978010
    Abstract: The present invention provides a line over driving (LOD) table adjustment method and a system thereof, which divides a display panel into M*N blocks. In an i-th row and a j-th column in the LOD table corresponding to a block, according to a brightness value of a grayscale value of a pixel of a previous line and a current line corresponding to an initial grayscale value of over driving pixels, calculate a target brightness value of an adjustment screen corresponding to a combination of the grayscale value of the pixel of the previous line and the current line corresponding to the initial grayscale value of over driving pixels, and obtain a measured brightness value of the adjustment screen to compare whether the difference between the target brightness value and the measured brightness value is within the default error range value to determine a final grayscale value of over driving pixel.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: April 13, 2021
    Assignee: TCL China Star Optoelectronics Technolog Co., Ltd.
    Inventors: Bobiao Chang, Yichien Wen
  • Patent number: 10978012
    Abstract: A display device capable of setting an optimal output enable value according to a color pattern and a method for driving the display device. A timing controller is configured to receive an image signal from an external source, identify a color pattern and set an output enable value corresponding to the identified color pattern. A scan driver is configured to receive the output enable value and generate a first scan signal having a first turn-on signal and a second scan signal adjacent to the first scan signal and having a second turn-on signal. The scan driver may adjust an interval between the first turn-on signal and the second turn-on signal based on the output enable value.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: April 13, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang Jun Park, Kyun Ho Kim, Shim Ho Yi, Yong Jin Shin, Yu Chol Kim
  • Patent number: 10957260
    Abstract: A source driver of a display system includes a plurality of channels, and each of the plurality of channels includes a first latch, a second latch, an output driver and a comparator. The first latch receives a first data code and a second data code from a timing controller of the display system. The second latch receives the first data code from the first latch. The output driver is used for transmitting the first data code to a display panel of the display system. The comparator, coupled to the first latch, the second latch and the output driver, is used for comparing the first data code stored in the second latch with the second data code stored in the first latch, to generate a signal indicating a power level for the output driver to transmit the second data code.
    Type: Grant
    Filed: July 23, 2017
    Date of Patent: March 23, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Cheng-Kai Kuei, Chin-Hung Hsu
  • Patent number: 10957242
    Abstract: A display panel is provided. The display panel includes a display area comprising a gate line and a data line, and a gate driver connected to a terminal of the gate line. The gate driver includes a plurality of stages that are integrated on a substrate, and each stage comprises an inverter unit, an output unit, and a Q node stabilization unit. The output unit includes a first transistor and a first capacitor, wherein the first transistor includes an input terminal for receiving a clock signal, a control terminal connected to a node Q, and an output terminal connected to a gate voltage output terminal to output a gate voltage. A Vgs voltage of a transistor in the Q node stabilization unit has a value of equal to or less than 0 V when the output unit outputs a gate-on voltage.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: March 23, 2021
    Inventors: Jung Hwan Hwang, Beom Jun Kim, Seong Yeol Syn, Bong-Jun Lee, You Mee Hyun
  • Patent number: 10943530
    Abstract: A mura compensation apparatus for an organic light emitting diode (OLED) display includes a calculator and a mura compensator. The calculator is configured to calculate a non-maximum-luminance demura offset value of a pixel of the OLED display for a determined gray level on the basis of a gamma value, a maximum-luminance demura offset value of the pixel of the OLED display for a relocated gray level and a non-maximum luminance value of the OLED display. The mura compensator is configured to perform mura compensation on the pixel of the OLED display by the non-maximum-luminance demura offset value for the determined gray level.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: March 9, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Ying-Han Yeh
  • Patent number: 10909905
    Abstract: A flat panel display that includes a switch bank to couple a signal from a driver integrated circuit to a column data line of a display panel is disclosed. The switch bank can be adjusted based on the frame rate of the display. When the frame rate is high, all sub-switches in the switch bank may be used to reduce an ON resistance of the switch bank. This high frame rate configuration may maintain or increase the speed at which pixels can be controlled but consumes more power. Accordingly, when the frame rate is low, a portion of the sub-switches in the switch bank are unused to reduce the power consumed. This low frame rate configuration may maintain or decrease the speed at which pixels of the display can be controlled but consumes less power.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: February 2, 2021
    Assignee: Google LLC
    Inventors: Sangmoo Choi, Chang Ju Kang
  • Patent number: 10909061
    Abstract: A communication system includes: a transmitter configured to be responsive to a control request from a local device that facilitates toggling of the transmitter On and Off in a pattern of interruption to generate multiple consecutive On/Off bits having On/Off signals with a same pulse width that represents control information, the transmitter configured to transmit data via a communication medium at a first end thereof, the communication medium also having a second end; and, in response to the pattern of interruption, the transmitter is configured to interrupt the communication medium at the first end, each interrupting of the communication medium at the first end resulting in a detection of a loss of signal at the second end.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: February 2, 2021
    Assignee: THINKLOGICAL, LLC
    Inventor: Martin Green
  • Patent number: 10903253
    Abstract: An imaging device is provided in which, at a position where a line passes a pixel in a first row along a second direction intersecting with a first direction, a first signal line and a second signal line are arranged at overlapping positions, in which, at a position where a line passes a pixel in a second row along the second direction, the first and the second signal lines are arranged at non-overlapping positions, and, in which, at a position where a line passes a pixel in a third row along the second direction, the first and the second signal lines are arranged at overlapping positions.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: January 26, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoichi Wada, Daisuke Yoshida, Fumihiro Inui
  • Patent number: 10902760
    Abstract: The present disclosure belongs to the field of display technology, and particularly relates to a test circuit, a display substrate, a test method of a display substrate and a display apparatus. The test circuit includes a signal generating device and a plurality of output channels that are mutually independent. Each output channel includes a signal line configured to transmit a test signal. The signal generating device is coupled to the plurality of output channels, and is configured to provide, to each of at least one of the plurality of output channels, the test signal corresponding to an impedance of the signal line in the output channel, and provide the test signal to the signal line in the output channel.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: January 26, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Xiaowei Wang, Guoqing Zhang, Weifeng Wang, Hongwei Gao
  • Patent number: 10901273
    Abstract: A display apparatus includes a first base plate, a second base plate and a liquid crystal layer. A first scan line and a second scan line are disposed above the first base plate and extend along a first direction. A first data line and a second data line are disposed above the first base plate, wherein the first scan line, the second scan line, the first data line and the second data line define a first region. A first thin-film transistor is electrically connected to the first scan line. A first common electrode is disposed above the first base plate and disposed in the first region, wherein the first common electrode comprises a first part, the first part is adjacent to the first scan line and extends along the first direction, and the first part overlaps the first thin-film transistor.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: January 26, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Tsung-Han Tsai, Hsia-Ching Chu, Mei-Chun Shih
  • Patent number: 10902812
    Abstract: A display apparatus includes a display panel displaying an image and including a gate line and a data line, a gate driver outputting a gate signal to the gate line, a data driver outputting a data signal to the data line, a timing controller outputting a vertical start signal and a gate clock, and a gate clock signal compensator generating an inner clock signal based on the vertical start signal, selecting one of the gate clock signal and the inner clock signal based on a comparison result of a time difference between the gate clock signal and the inner clock signal and a reference time which corresponds to tolerance of jitter of the gate clock signal, increasing a level of the selected clock signal, and outputting the increased clock signal to the gate driver, where the gate driver generates the gate signal based on the increased clock signal.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: January 26, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Chang-Soo Lee
  • Patent number: 10891886
    Abstract: A shift register, a gate line driving method, an array substrate and a display device are provided. The shift register includes a plurality of shift register s arranged in a one-to-one correspondence with gate lines on an array substrate; and a control circuit configured to control signals outputted from the shift register s to the gate lines, to control each row of gate lines to be turned on and off, so that a display area has a high-resolution area and a low-resolution area. In the low-resolution area, the control circuit controls the gate lines to be turned on and off group by group. Each group of gate lines include at least two adjacent gate lines, and gate lines in the same group are turned on and off synchronously.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: January 12, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lei Mi, Shijun Wang, Yanna Xue
  • Patent number: 10847091
    Abstract: A display driver includes a data fetching unit that fetches first to Nth pixel data pieces corresponding to luminance levels of respective pixels and outputs the same at a timing of an edge of a clock signal, first to Nth amplifiers that amplify first to Nth gradation voltages corresponding to the first to Nth pixel data piece to obtain first to Nth driving voltages, and a bias voltage generation unit that generates and supplies bias voltages for setting current values of operation currents to the respective amplifiers. The bias voltage generation unit stores a first value and a second value of the bias voltage used for setting the current value to a higher value and a lower value, and generates a bias voltage having the first value during a period from the timing of the edge of the clock signal, and switches the voltage value to the second value thereafter.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: November 24, 2020
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroki Aizawa
  • Patent number: 10818220
    Abstract: A driving method of a display panel is provided. The display panel includes first signal lines, second signal lines, pixel structures, first signal line driving circuits, and second signal line driving circuits. The first signal line driving circuits divide the first signal lines into first signal line groups and sequentially enable the first signal lines of the first signal line groups. In one of the first signal line groups, when one first signal line adjacent to another first signal line group is enabled, the second signal line driving circuits provide a first data signal to each of the second signal lines; and when the rest of the first signal lines are enabled, the second signal line driving circuits provide a second data signal to each of the second signal lines. The first data signal and the second data signal have different waveforms to display a predetermined gray scale.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: October 27, 2020
    Assignee: E Ink Holdings Inc.
    Inventors: Chao-Ming Tseng, Yu-Hsun Kuo
  • Patent number: 10810946
    Abstract: The present disclosure provides a gate clock generator including a counter, a buffer control signal generator, and an output unit. The counter receives control data having rising timing information and falling timing information and a main clock. The counter generates a first output when a value is obtained by counting the main clock from a preset reference time point reaches rising data. The counter further generates a second output when a value is obtained by counting the main clock from the reference time point reaches falling data. The buffer control signal generator generates a first buffer control signal of a gate ON voltage from a timing of the first output to a timing of the second output. The output unit outputs a gate ON voltage of a gate clock during an output period of the gate ON voltage of the first buffer control signal.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 20, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jaewon Han, Soondong Cho, Jungjae Kim, Sanguk Lee, Hyungjin Choe
  • Patent number: 10783820
    Abstract: Disclosed herein are a gate driver capable of implementing a narrow bezel by deleting dummy gate-in-panels (GIPs) and a flat panel display device including the same. The gate driver includes gate-in-panels (GIPs) equal in number to a plurality of gate lines in order to sequentially supply scan pulses to the plurality of gate lines. A k-th GIP is enabled by a carry pulse from a GIP of a (k?a)-th stage and is disabled by a carry pulse output from a GIP of a (k+b)-th stage (a and b are natural numbers), first a GIPs are enabled by a gate start signal output from a timing controller, and last b GIPs are disabled by a reset signal output from the timing controller.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 22, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Seok Noh, Hae-Jin Park, Ki-Min Son
  • Patent number: 10770018
    Abstract: The present application discloses a scanning signal line drive circuit capable of reducing power consumption and narrowing a picture-frame while ensuring high-speed scanning for image display. First and second gate drivers 410, 420 are arranged to face each other via a display unit 500. Based on a DC buffer method, odd-numbered gate lines are driven by the first gate driver 410 while even-numbered gate bus lines are driven by the second gate driver 420, and when each gate bus line GLi is to be brought into a non-selected state, charges are released from both ends thereof. For this purpose, for example, the end portion of the odd-numbered gate bus line on the first gate driver side is connected to a buffer made up of the activation and inactivation transistors M10, M13L, and the end portion of the odd-numbered gate bus line on the second gate driver side is connected to the inactivation auxiliary transistor M13R.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: September 8, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takatsugu Kusumi, Takuya Watanabe, Akira Tagawa, Yasuaki Iwase, Yohei Takeuchi
  • Patent number: 10762816
    Abstract: A display device may include a timing controller, a data driver and a plurality of pixels. The timing controller supplies a clock training pattern over a data/clock signal line in a first time period, and supplies pixel/control data over the data/clock signal line in a second time period. The data driver generates a clock signal, using the clock training pattern, in the first period, and generate a plurality of data voltages based on the plurality of pixel data, using the clock signal, in the second period. The plurality of pixels receive the plurality of data voltages and emit corresponding light. During the second period, the data driver outputs a feedback signal to the timing controller indicating that the locking of the clock signal has failed. The timing controller re-supplies the clock training pattern in response to the feedback signal.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: September 1, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jae Han Lee, Myeong Su Kim, Sun Koo Kang, Bo Yeon Kim, Dong Won Park, Tae Gon Im, Jung Hwan Cho
  • Patent number: 10750148
    Abstract: An unevenness correction system according to the present invention includes a panel drive circuit provided with a gamma correction circuit that performs gamma correction on an image signal input to an input interface, a gamma correction information acquisition circuit that acquires a gamma correction signal obtained through gamma correction as gamma correction information, an unevenness correction circuit that performs an unevenness correction on the gamma correction signal based on correction data, and an output interface that externally outputs the gamma correction information, and an unevenness correction apparatus provided with a pattern generator that outputs the image signal of a predetermined image to the input interface, and a control unit that generates correction data based on gamma correction information of each individual display panel input to and read by a gamma correction information reading unit from the output interface regarding the output image signal.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: August 18, 2020
    Assignee: IIX INC.
    Inventors: Makoto Hatakenaka, Takashi Sakamoto, Keisuke Okada
  • Patent number: 10665143
    Abstract: A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: May 26, 2020
    Assignee: Ignis Innovation Inc.
    Inventors: Gholamreza Chaji, Yaser Azizi
  • Patent number: 10657901
    Abstract: Varying electrical currents are selectively applied to each pixel within an OLED display to create desired images. High applied electrical currents to groupings of nearby pixels create high luminance features, while low applied electrical currents to groupings of nearby pixels create low luminance features. A combination of a high luminance and low luminance features may be present on the OLED display. Pulse-width modulation (PWM) is often used to increase the current applied to the OLED display by modulating the applied current, particularly when creating low luminance features. The presently disclosed systems and methods detect a gray portion of an image to be presented, and select PWM independently of peak luminance based on the detected gray portion. The allows the OLED display to display low-luminance features at high quality, even when high-luminance features are also present within a frame.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: May 19, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Minhyuk Choi, Samu Matias Kallio, Ying Zheng
  • Patent number: 10650766
    Abstract: A semiconductor device with a small circuit area that consumes low power is provided. The semiconductor device includes a shift register, a sample-and-hold circuit, a first buffer circuit, and a second buffer circuit. The sample-and-hold circuit includes a first input terminal, a second input terminal, and an output terminal. An output terminal of the first buffer circuit is electrically connected to the first input terminal. The shift register is electrically connected to the second input terminal. An input terminal of the second buffer circuit is electrically connected to the output terminal of the sample-and-hold circuit. In the semiconductor device, the potential of an input analog signal is retained in the sample-and-hold circuit and the analog signal is output from an output terminal of the second buffer circuit.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: May 12, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Tatsunori Inoue
  • Patent number: 10614749
    Abstract: A source driver apparatus for a display panel includes source drivers and a slew rate controller. Each of the source drivers includes a data latch, a decoder, and an output buffer. The data latch is configured to hold sub-pixel data. The decoder is configured to decode the sub-pixel data held in the data latch to provide a driving signal. The output buffer has an adjustable slew rate and is configured to buffer the driving signal to provide a buffered driving signal. The slew rate controller is configured to analyze the sub-pixel data in the data latch in each of the source drivers and dynamically control the slew rate of the output buffer in each of the source drivers.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: April 7, 2020
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Hyoung Kyu Kim, Won Seok Lee, Jin Seok Yang, Dae Young Yoo
  • Patent number: 10607563
    Abstract: A display device includes a timing controller, a driver, and a display panel. The timing controller outputs a first clock signal having first rising time during an active section and a second clock signal having second rising time during a blank section adjacent to the active section. The driver generates a data signal based on the first clock signal and the second clock signal and to output the data signal. The display panel displays an image based on the data signal. The first rising time is shorter than the second rising time.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: March 31, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong In Kim, Jin Kyu Park, Yo Han Lee, Ki Hoon Choi, Hyun Seok Hong
  • Patent number: 10565935
    Abstract: A scan driving circuit for OLED and a display panel are provided. The scan driving circuit for OLED comprising a plurality of scan driving units connected in cascade. The scan driving units at each stages for receiving the stage transmission signal at previous-stage, the first scan signal at previous-stage, the first scan signal at next-stage, the first clock signal and the second clock signal, and outputting a stage transmission signal at current-stage, the first scan signal at current-stage, the second scan signal at current-stage and the third scan signal at current-stage, wherein duty cycle of the first clock signal and the second clock signal are difference. The invention could generating three types shift scanning signal required for pixel compensation circuit and solved the problem of threshold voltage drift, then reducing difference brightness of display and enhancing display effect.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: February 18, 2020
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd
    Inventor: Mian Zeng
  • Patent number: 10535311
    Abstract: A displaying method for a displaying apparatus having a liquid crystal display panel for displaying images thereon is used for displaying images in accordance with a periodic time sequence. The periodic time sequence includes a plurality of scanning time periods and a plurality of vertical blanking intervals. The scanning time periods and the vertical blanking intervals are staggered. The displaying method includes the steps of: providing a substantially identical frame image data by a control module of the displaying apparatus to the liquid crystal display panel for each scanning time period; and providing a back light by a backlight module of the displaying apparatus to the liquid crystal display panel after an end point of the first one of the scanning time periods. Therein, the back light has a light intensity. Further, the light intensity can be designed to be adjustable.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: January 14, 2020
    Assignee: BenQ Corporation
    Inventor: Hsin-Nan Lin
  • Patent number: 10431132
    Abstract: A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: October 1, 2019
    Assignee: Ignis Innovation Inc.
    Inventors: Gholamreza Chaji, Yaser Azizi