Abstract: Double pass back side image (BSI) sensor systems and methods are disclosed. The BSI sensor may include a substrate, pixel reflectors formed on the substrate, and pixel photodiodes fabricated in the substrate, each pixel photodiode positioned over a respective one of the pixel reflectors. Micro-lenses may be formed over each photodiode and an image filter may be formed between the photodiodes and the micro-lenses. The pixels reflectors, photodiodes, micro-lenses, and filter may be formed using CMOS fabrication.

Abstract: A solid-state imaging device includes: a first photodiode receiving light of a first color; a second photodiode that is arranged next to the first photodiode in a first direction and receives light of a second color; a third photodiode that is arranged next to the second photodiode in a second direction and receives light of the first color; a fourth photodiode that is arranged next to the third photodiode in the first direction and receives light of a third color; a first reset transistor for discharging a charge generated in the first photodiode and the second photodiode; and a second reset transistor for discharging a charge generated in the third photodiode and the fourth photodiode. The first photodiode and the third photodiode have a small difference in area.

Abstract: A pixel is provided with a photodiode region which includes a photoelectric conversion portion for receiving light and generating electrons, and a charge storage portion for storing electric charge. The pixel is configured in such a manner that an electron exclusion region is provided in the photodiode region with the diameter of a circle having the maximum diameter among circles that can exist in the surface of a region through which electrons can pass in the photodiode region as the width of an electron passage region in the photodiode region, and the width of the electron passage region is smaller than when the electron exclusion region is not provided.

Abstract: A solid-state imaging sensor which has a first face and a second face, and includes an image sensing region and an electrode region, comprising a first portion including an insulating member and a wiring pattern, a second portion including a plurality of photoelectric conversion portions in the image sensing region, and a third portion including a plurality of microlenses in the image sensing region, wherein an opening is formed on the side of the first face in the electrode region so as to expose the wiring pattern, and the sensor includes a first film covering the plurality of microlenses, and a second film covering a side face of the opening and exposing part of the wiring pattern in the electrode region, with covering the first film in the image sensing region.

Abstract: An array comprises a plurality of pixels logically arranged in rows and columns. The pixels comprise a photoreceptor (11) for converting impinging radiation into electronic charge, a transfer element (12) for transferring the electronic charge towards a sense node, a reset transistor (13) for resetting the sense node (16), means for converting the electronic charge onto the sense node (16) into a voltage, and for outputting the voltage as a pixel signal, and means adapted for biasing the sense nodes at a low voltage lower than a reset voltage which is meant to initialize the photoreceptor, during integration of impinging radiation on the photoreceptors. The means for converting and outputting comprise a source follower (14) for converting the electronic charge, and a select transistor (15) for outputting the voltage as a pixel signal, and the reset transistor of at least one pixel is coupled with one main electrode to the gate of the reset transistor of another pixel.

Abstract: Disclosed herein is a solid-state imaging device including: a photoelectric conversion portion generating signal electric charges corresponding to a quantity of light; a pixel array block having pixels, each of the pixels including three or more electric charge accumulating portions having a first electric charge accumulating portion, a second electric charge accumulating portion, and a third electric charge accumulating portion, and plural pixel transistors; a scanning block carrying out scanning in such a way that accumulation periods of time for the signal electric charges become simultaneous for all of the pixels, and scanning reading-out of the low illuminance signal and the high illuminance signal; and an arithmetic operation processing portion acquiring a false signal accumulated in the third electric charge accumulating portion before the reading-out of the low illuminance signal, and correcting the low illuminance signal and the high illuminance signal by using the false signal.

Abstract: An imaging device formed as a CMOS semiconductor integrated circuit having two adjacent pixels in a row connected to a common column line and a processor based system with such an imaging device. By having adjacent pixels of a row share column lines, the CMOS imager circuit eliminates half the column lines of a traditional imager allowing the fabrication of a smaller imager. The imaging device also may be fabricated to have a diagonal active area to facilitate contact of two adjacent pixels with the single column line and allow linear row select lines, reset lines and column lines.

Abstract: A solid-state image capturing apparatus including: a pixel array unit including two-dimensionally arranged pixels each including a photoelectric conversion unit, a transfer transistor that transfers charges accumulated in the photoelectric conversion unit, and a charge discharging transistor that selectively discharges the charges accumulated in the photoelectric conversion unit; and a driving unit that performs driving for reading signals from each pixel of the pixel array unit, and drives the charge discharging transistor by using a signal for the driving.

Abstract: An integrated die-level camera system and method of making the camera system include a first die-level camera formed at least partially in a die. A second die level camera is also formed at least partially in the die. Baffling is formed to block stray light between the first and second die-level cameras.

Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, a plurality of readout circuits provided in each column of the plurality of pixels arranged in a matrix, configured to read out for each column a signal of the plurality of pixels, a plurality of comparison units configured to compare a signal output from the plurality of readout circuits with a reference signal whose level changes with time, a counter configured to perform a count operation from when the level of the reference signal starts to change, first and second buffers each configured to buffer a count value of the counter, and a plurality of storing units connected to the plurality of comparison units, configured to store a count value of the counter when a magnitude relation between a signal output from the plurality of the readout circuits and the reference signal is inverted.

Abstract: An image capturing apparatus comprises a lens array, an image sensor, a display unit, a recording unit configured to record the video data read out from the image sensor, a readout control unit which has a first readout mode of reading out video data of pixels in first regions coinciding with a position relative to each lens and a second readout mode of reading out video data of pixels in second regions, and a control unit configured to perform control, upon reading out video data from the image sensor in the first readout mode, to read out video data from the image sensor in the second readout mode and display a video obtained from the video data read out in the first readout mode, and to record the video data read out in the second readout mode.

Abstract: A processor for determining whether or not a first position of an image sensor corresponding to a pixel of an image sensor is included in areas of the image sensor corresponding to microlenses of the image sensor includes a cache configured to store one or more second positions of the image sensor corresponding to centers of the microlenses, each of the second positions being included in one or more of multiple regions defining an entire region of the image sensor, and a first controller configured to cause one or more of the second positions to be stored in the cache. Whether or not the first position is included in the areas corresponding to the microlenses is determined based on the second positions stored in the cache.

Abstract: Imager arrays, array camera modules, and array cameras in accordance with embodiments of the invention utilize pixel apertures to control the amount of aliasing present in captured images of a scene. One embodiment includes a plurality of focal planes, control circuitry configured to control the capture of image information by the pixels within the focal planes, and sampling circuitry configured to convert pixel outputs into digital pixel data. In addition, the pixels in the plurality of focal planes include a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information, and the pixel stack defines a pixel area and includes a pixel aperture, where the size of the pixel apertures is smaller than the pixel area.

Abstract: Disclosed herein is a camera system including, a camera apparatus having, an image sensor, a correction section, a first transmission processing section, and a synchronization processing section, and a video processing apparatus having a second transmission processing section and a conversion section, wherein the video processing apparatus outputs the video data obtained by the conversion by the conversion section.

Abstract: A method for performing correlated double sampling for a sensor, such as an image sensor. The method includes collecting a first charge corresponding to a first parameter, transferring the first charge to a first storage component, transferring the first charge from the first storage component to a second storage component, resetting the first storage component, transferring the first charge from the second storage component to the first storage component, and reading the first storage component to determine the first charge. The method may be implemented in electronic devices including image sensors.

Abstract: A solid-state imaging device includes: an imaging region; a peripheral circuit region; photodiodes arranged in rows and columns in the imaging region; output circuits in the imaging region for outputting, to the outside of the imaging region, pixel signals corresponding to electric charges photoelectrically converted in the photodiodes; a read circuit in the peripheral circuit region for reading the pixel signals from the imaging region; and signal lines extending in a column direction to connect output circuits to the read circuit. One pixel cell includes two photodiodes adjacent in a row direction and an output circuit. An output circuit in a first pixel cell is adjacent, in the row direction, to a second pixel cell adjacent to the first pixel cell in the column direction and shifting from the first pixel cell by one column of the photodiodes in the row direction.

Abstract: A high dynamic range imager system is provided that includes an imager having a pixel array, and memory in communication with the pixel array, the memory comprising a plurality of memory cells, wherein the number of memory cells is approximately the number of whole row-times of exposures between the first conditional reset and row readout.

Abstract: An image pickup sensor that can properly carry out correction processing on noise components at high speed without bringing about an increase in cost. In an effective pixel region, pixels for obtaining image pickup signals used as a picked-up image are arranged. A plurality of reference pixel regions in which pixels for obtaining reference signals for the image pickup signals are arranged are disposed adjacent to opposing sides of the effective pixel region. A holding unit holds the image pickup signals obtained from the effective pixel region and the reference signals obtained from the plurality of reference pixel regions, the image pickup signals and the reference signals vertically scanned on a row-by-row basis. A horizontal scanning unit that horizontally scans the image pickup signals and the reference signals held by the holding unit horizontally scans the reference signals held by the holding unit before the image pickup signals.

Abstract: In an image sensing apparatus having a plurality of unit cells, each including a plurality of photoelectric conversion elements and a common circuit shared by the plurality of photoelectric conversion elements, arranged in either one or two dimensions, the plurality of photoelectric conversion elements are arranged at a predetermined interval.

Abstract: An A/D converter includes: a first comparator that compares an input signal, with a first reference signal which is a ramp wave having a predetermined polarity, and that when the input signal matches the first reference signal, reverses an output signal thereof; a second comparator that compares the input signal, with a second reference signal which is a ramp wave having a different polarity from the first reference signal, and that when the input signal matches the second reference signal, reverses an output signal thereof; and a counter capable of counting up so as to measure the comparison times taken by the first comparator and second comparator, wherein when either of the output signal of the first comparator and the output signal of the second comparator is first reversed, the counter ceases a counting action.

Abstract: This is generally directed to systems and methods for reduced metal lines and control signals in an imaging system. For example, in some embodiments a pixel cell of an imaging system can operate without a row select transistor, and therefore can operate without a row select metal control line. As another example, in some embodiments a pixel cell can share its reset transistor control line with a transfer transistor control line of another pixel cell. In this manner, an imaging system can be created that averages a single metal line per pixel cell. In some embodiments, operation of such reduced-metal line imaging systems can use modified timing schemes of control signals.

Abstract: A circuit for processing an analog signal having a time sequence of discrete signal levels, each of which lies in a time interval and represents an information-bearing segment of the interval while the rest of the time interval is a non-information-bearing segment, comprises a transistor in emitter-follower or source-follower configuration, a high emitter or source resistance or, instead, a high-ohm constant current source, and a device for applying a voltage supply, as well as a switch which is connected between the emitter and a reference potential to prevent a current from flowing via the high-ohm resistance or the high-ohm voltage source for charge reversal of an output capacitance of the circuit in one direction, whereas for charge reversal in the other direction the dynamic current boosting effect of the transistor is exploited. This results in a fast emitter-follower or source-follower circuit which is particularly suitable as the output stage for image sensors.

Abstract: A polarization camera includes a microlement polarizer that is situated in proximity to a focal plane array. The microlement polarizer is selectively scanned with respect to an optical image direct to the focal plane array, and an image processor stores a set of images associated with the scanning. Based on the stored images, a polarization image can be produced and displayed. A periodic microelement polarizer modulates the individual images of the set, and these images can be processed by filtering in the spatial frequency domain to isolate contributions associated with one or a combination of Stokes parameters. After filtering, Stokes parameter based images can be obtained by demodulating and inverse Fourier transforming the filtered frequency domain data.

Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.

Abstract: According to one embodiment, a solid-state imaging device includes a pixel region which is configured such that a photoelectric conversion unit and a signal scanning circuit unit are included in a semiconductor substrate, and a matrix of unit pixels is disposed, and a driving circuit region which is configured such that a device driving circuit for driving the signal scanning circuit unit is disposed on the semiconductor substrate, wherein the photoelectric conversion unit is provided on a back surface side of the semiconductor substrate, which is opposite to a front surface of the semiconductor substrate where the signal scanning circuit unit is formed, and the unit pixel includes an insulation film which is provided in a manner to surround a boundary part with the unit pixel that neighbors and defines a device isolation region.

Abstract: Providing for pausing data readout from an optical sensor array is described herein. By way of example, an interruption period can be introduced into a readout cycle of the optical sensor array to suspend readout of data. During the interruption period, other operations related to the optical sensor array can be performed, including operations that are typically detrimental to image quality. Moreover, these operations can be performed while mitigating or avoiding negative impact on the image quality. Thus, greater flexibility is provided for global shutter operations, for instance, potentially improving frame rates and fine control of image exposure, while preserving image quality.

Abstract: To provide an apparatus that generates an RGB pattern data from an image pickup signal by an image pickup element having an RGBW pattern and a method. An edge detection unit analyzes an output signal of the image pickup signal of the RGBW pattern to obtain edge information corresponding to the respective pixels, and a texture detection unit generates texture information. Furthermore, a parameter calculation unit executes an interpolation processing in which an applied pixel position is changed in accordance with an edge direction of a transform target pixel to generate parameters equivalent to an interpolation pixel value.

Abstract: Solid-state imaging devices and electronic apparatuses are provided. More particularly, a solid-state imaging device that includes first and second substrates are provided. The first and second substrates are stacked on top of one another. The first substrate includes a pixel array and a peripheral circuit. The second substrate also includes a peripheral circuit. The device can be configured such that all resistors are formed in the second substrate, with no resistors being formed in the first substrate. Alternatively, the device can be configured such that all capacitors are formed in the second substrate, with no capacitors being formed in the first substrate. As yet another alternative, the second substrate can be configured such that it contains all resistors and capacitors of the peripheral circuits, with no resistors or capacitors being formed in the peripheral circuit of the first substrate.

Abstract: An image sensor includes a first semiconductor chip having a first surface and a second surface, the first semiconductor chip a including an array of unit pixels configured to capture light corresponding to an image and to generate image signals based on the captured light; and a second semiconductor chip having a first surface and a second surface, the second semiconductor chip including first peripheral circuits configured to control the array of pixels and receive the generated image signals, the first peripheral circuits including a vertical scanning circuit, a horizontal scanning circuit, and a signal read-out circuit, the first semiconductor chip being stacked on the second semiconductor chip, the first semiconductor chip not being smaller than the second semiconductor chip.

Abstract: An image pickup device may include an image capturing unit that includes a solid-state image pickup device having a plurality of pixels arrayed in a matrix form and simultaneously outputting pixel signals of the plurality of pixels adjacent to each other in a row or column direction in sequence while sequentially shifting the pixels that output the pixel signals in the row direction, and that simultaneously outputs image capturing signals respectively corresponding to the simultaneously output pixel signals in sequence from corresponding output terminals, an image processing unit to which the image capturing signals respectively corresponding to the plurality of pixels adjacent to each other in the row or column direction of the pixels arrayed in the solid-state image pickup device are simultaneously input in sequence from corresponding input terminals, and which performs image processing on the input image capturing signals, and a signal transmitting unit.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to emitted radiation or light. The image capturing operation includes a first image capturing operation in which the detector is scanned in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in which the detector is scanned in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an initialization operation to initialize the conversion element during a period between the first image capturing operation and the second image capturing operation in accordance with switching from the first scanning area to the second scanning area.

Abstract: A solid-state imaging device includes a photoelectric conversion layer, a MOS transistor circuit. The photoelectric conversion layer is formed over a semiconductor substrate. The MOS transistor circuit reads out a signal corresponding to charges generated in the photoelectric conversion layer and then collected, and that is formed in the semiconductor substrate, the charges having a given polarity. The MOS transistor circuit includes a charge accumulation portion, a reset transistor, and an output transistor. The charge accumulation portion is electrically connected with the photoelectric conversion layer. The reset transistor resets a potential of the charge accumulation portion to a reset potential. The output transistor outputs a signal corresponding to the potential of the charge accumulation portion. The reset transistor and the output transistor have carriers whose polarity is opposite to the given polarity.

Abstract: An imaging device includes a basic cell having two or more the pixels that share floating diffusion. The imaging device also includes a transistor shared by the two or more pixels in the basic cell and arranged on the outside of the two or more pixels. The imaging device further includes a light receiving unit connected to the floating diffusion shared by the pixels in the basic cell through a transfer gate. In the imaging device, on-chip lenses are arranged substantially at regular intervals. Also, an optical waveguide is formed so that the position thereof in the surface of the solid-state imaging device is located at a position shifted from the center of the light receiving unit to the transistor and in the inside of the light receiving unit and the inside of the on-chip lens.

Abstract: To avoid reset noise in a CMOS chip for direct particle counting, it is known to use Correlative Double Sampling: for each signal value, the pixel is sampled twice: once directly after reset and once after an integration time. The signal is then determined by subtracting the reset value from the later acquired value, and the pixel is reset again. In some embodiments of the invention, the pixel is reset only after a large number of read-outs. Applicants realized that typically a large number of events, typically approximately 10, are needed to cause a full pixel. By either resetting after a large number of images, or when one pixel of the image shows a signal above a predetermined value (for example 0.8 × the full-well capacity), the image speed can be almost doubled compared to the prior art method, using a reset after acquiring a signal.

Abstract: A photoelectric conversion apparatus includes a plurality of unit pixels each including a first photoelectric conversion unit, a second photoelectric conversion unit, and a pixel output unit shared by the first photoelectric conversion unit and the second photoelectric conversion unit. The unit pixels are arranged in a first direction, and the first and second photoelectric conversion units are arranged in a second direction different from the first direction.

Abstract: An electric camera includes an image sensing device with a light receiving surface having N vertically arranged pixels and an arbitrary number of pixels arranged horizontally, N being equal to or more than three times the number of effective scanning lines M of a display screen of a television system, a driver to drive the image sensing device to vertically mix or cull signal charges accumulated in individual pixels of K pixels to produce, during a vertical effective scanning period of the television system, a number of lines of output signals which corresponds to 1/K the number of vertically arranged pixels N of the image sensing device, K being an integer equal to or less than an integral part of a quotient of N divided by M, and a signal processing unit having a function of generating image signals by using the output signals of the image sensing device.

Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. A first chip and a second chip are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip having a function of sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and a function of quantizing the sampled signals to obtain digital signals.

Abstract: A solid-state image pickup apparatus which is capable of enlarging dynamic range and taking images at high frame rate. The solid-state image pickup apparatus has a pixel unit having first pixels with a first sensitivity to the light and second pixels with a second sensitivity lower than the first sensitivity, and the first pixels and the second pixels being alternately arranged in a row direction. Pixel signals are read out from the first pixels as first pixel signals, and analog-to-digital conversion of the first pixel signals is performed to obtain first digital signals. Pixel signals are read out from the second pixels as second pixel signals, and analog-to-digital conversion of the second pixel signals is performed to obtain second digital signals. The first digital signals and the second digital signals are output as image data.

Abstract: A solid-state image sensing apparatus, comprising, a pixel portion, a conversion portion including a first group and a second group each of which includes at least one analog/digital conversion unit to convert an analog signal of the pixel portion into a digital signal, and a clock supply unit including a first clock buffer and a second clock buffer connected in series for propagation of a clock signal, wherein each of the analog/digital conversion units includes a comparison unit and a counter unit, the comparison unit compares the analog signal with a comparison reference potential, the counter unit measures a time from the start of the comparison to the change of the comparison result, each of the first clock buffer and the second clock buffer corrects a duty ratio of a clock signal by using a differential circuit.

Abstract: There is provided a solid-state image pickup device including ADCs that can be arranged in a limited space. The potential of a pixel signal outputted through a vertical readout line is held at a node. A plurality of capacitors are capacitively coupled to the node at which the pixel signal is held. The potential of the node is decreased in a stepwise manner by sequentially switching the voltages of the counter electrodes of the capacitors by the control of transistors. A comparator compares the potential of the node with the potential of the dark state of the pixel, and determines the upper bits of a digital value when the potential of the node becomes lower than the potential of the dark state. Following this, the conversion of the lower bits of the digital value is started. Therefore, it is possible to simplify the configuration of each ADC and arrange each ADC in a limited space.

Abstract: A method of an aspect includes acquiring analog image data with a pixel array, and reading out the analog image data from the pixel array. The analog image data is converted to digital image data by performing an analog-to-digital (A/D) conversion using a multiple slope voltage ramp. At least some of the digital image data is adjusted with calibration data. Other methods, apparatus, and systems, are also disclosed.

Abstract: A solid-state image pickup apparatus includes a storage, first and second common lines, a first block line that is disposed between the storage and the first common line and receives a signal from an odd-numbered column, a second block line that is disposed between the storage and the second common line and receives a signal from an even-numbered column, first switches for controlling connections between the storage and the first block line, second switches for controlling connections between the storage and the second block line, first control lines for the first switches, second control lines for the second switches, a first lead line for transmitting a signal from the first block line to the first common line, a second lead line for transmitting a signal from the second block line to the second common line, and a scanning unit for supplying pulses to the first and second control lines.

Abstract: In a manufacturing method of a solid-state image pickup device according to an embodiment, a transfer gate electrode is formed in a predetermined position on an upper surface of a first conductive semiconductor area, through a gate insulating film. A second conductive charge storage area is formed in an area adjacent to the transfer gate electrode in the first conductive semiconductor area. A sidewall is formed on a side surface of the transfer gate electrode. An insulating film is formed to extend from a circumference surface of the sidewall on a side of the charge storage area to a position partially covering the upper part of the charge storage area. A first conductive charge storage layer is formed in the charge storage area by implanting first conductive impurities from above, into the charge storage area which is partially covered with the insulating film.

Abstract: A solid-state imaging device includes: a pixel section in which a plurality of pixels including a photoelectric conversion element are arranged in a matrix; a pixel driving section that drives the pixels in a row unit so as to read out a pixel signal from the pixel section; a column processing section that performs a column process, synchronized with a first clock of a first frequency previously selected, on the pixel signal read out by driving of the pixel driving section; and a rate conversion control section that performs a rate conversion control of data processed in the column processing section in accordance with rate conversion information. The rate conversion control section includes a first rate converter, a second rate converter, a data rate conversion section, and a data output section.

Abstract: A single slope AD converter circuit includes a comparator that compares a ramp voltage varying with a predetermined slope as time elapses with an analog input voltage, a counter that counts a predetermined clock in parallel with the comparing process of the comparator, and a controller that outputs a clock count value corresponding to elapsed time when the ramp voltage is smaller than the analog input voltage, as an AD converted first digital value. The comparator compares the ramp voltage with a predetermined first reference voltage, the counter counts the clock in parallel with the comparing process, and the controller outputs the clock count value corresponding to the elapsed time as an AD converted second digital value.

Abstract: According to one embodiment, a solid-state imaging device includes a VOB region, an effective pixel region, a comparator, a holder, and a drive controller. The effective pixel region outputs the reset signal, and an image signal to the vertical signal line. The comparator compares the reset signal transferred from the VOB region through the vertical signal line with a reference signal, and determining whether the reset signal is within a digital level range. The holder is capable of holding either a value representing a first result or a value representing a second result, according to a determination result of the comparator. The drive controller varies a pulse timing period according to the value held by the holder, and automatically sets the period when the reset signal is read from the effective pixel region to the vertical signal line. A voltage of the vertical signal line is clamped in the period.

Abstract: A chip with a built-in self-test (BIST) component capable of testing the linearity of an ADC is described herein. The BIST component uses hardware registers to facilitate a sliding histogram technique to save space on the chip. A subset of detected digital codes are analyzed, and DNL and INL calculations are performed by a controller to determine whether any of the digital codes in the subset exceed maximum or minimum DNL and INL thresholds. New digital codes being detected by the ADC are added to the subset as lower-value digital codes are pushed out of the subset, maintaining the same number of digital codes being analyzed as the subset moves from lower codes detected during lower voltages to higher codes detected at higher voltages. A synchronizer and pointer ensure that the subset moves through the digital codes at the same rate as the analog input ramp source.

Abstract: According to one embodiment, a solid-state imaging device includes a pixel array and AD converting unit. In the AD converting unit, a plurality of AD converts are arranged in a horizontal direction. The pixel is configured by a small pixel group. The small pixel group is formed of a plurality of small pixels. The plurality of small pixels read out the signal charges. The small pixel group includes two or more small pixels having different optical sensitivities. The solid-state imaging device includes N AD converting units. N is the number of small pixel groups which are arranged in a vertical direction at every small pixel. N is an integer of 2 or higher.

Abstract: A new method and apparatus for addressing hexagonally arranged data sampling elements is described. Array set addressing, or ASA, is a new method for capturing information from a hexagonal grid of image sensor pixels, or any hexagonal grid of data sampling elements, for image processing or any computational manipulation of sampling data. ASA represents the hexagonal grids as a set of two rectangular arrays which can individually indexed by integer-valued row and column indices. The two arrays are distinguished using a single binary coordinate so that a full address for any point on the hexagonal grid is uniquely represented by three coordinates representing which array and the row and column. The new addressing method supports efficient linear algebra and other image processing manipulation and can be straightforwardly implemented in conventional electronic hardware and digital processing systems.

Abstract: Disclosed are a CMOS image sensor having a wide dynamic range and a sensing method thereof. Each unit pixel of the CMOS image sensor of the present invention includes multiple processing units, so that one shuttering section for the image generation of one image frame can be divided into multiple sections to separately shutter and sample the divided sections by each processing unit. Thus, the image sensor of the present invention enables many shuttering actions to be performed in the multiple processing units, respectively, and the multiple processing units to separately sample each floating diffusion voltage caused by the shuttering actions, thereby realizing a wide dynamic range.