Abstract: A multilayer ceramic capacitor 1 having dielectric layers 2 and internal electrode layers 3 formed using a conductor paste, wherein the conductor paste contains a conductive material, the conductive material is comprised of a first ingredient and second ingredient, the first ingredient includes metal elements having Ni as a main ingredient, and the second ingredient includes a metal element dissolving in the first ingredient and having a melting point of 1490° C. or more.

Abstract: A film capacitor including a first electrode is provided. The film capacitor also includes a first dielectric layer having a first dielectric constant disposed upon a first electrode, a second dielectric layer having a second dielectric constant disposed upon the first dielectric layer, wherein the second dielectric constant is at least fifty percent greater than the first dielectric constant, and a metalized film disposed upon the second dielectric layer. It further includes a second electrode disposed upon the metalized film.

Abstract: A dielectric device has a first conductor and a dielectric disposed thereon. An intermediate region is formed between the first conductor and dielectric. In the intermediate region, an additive different from the first conductor and dielectric and the dielectric are mixed with each other. The additive contains at least one element of Si, Al, P, Mg, Mn, Y, V, Mo, Co, Nb, Fe, and Cr.

Abstract: An electronic component is provided which includes external electrodes having a multilayer structure of first and second sintered electrode layers that are densely sintered and have less possibility of causing poor appearance and decreased reliability in electrical connection. The external electrodes include a first sintered electrode layer and a second sintered electrode layer containing different metals. The first and second sintered electrode layers contain a borosilicate glass containing an alkali metal.

Abstract: Devices for storing energy at a high density are described. The devices include a solid dielectric that is preformed to present a high exposed area onto which an electrode is formed. The dielectric material has a high dielectric constant (high relative permittivity) and a high breakdown voltage, allowing a high voltage difference between paired electrodes to effect a high stored energy density.

Abstract: A magnetic capacitor comprises a dielectric layer having a first surface and a second surface opposed to the first surface, a first electrode disposed on the first surface of the dielectric layer and a second electrode disposed on the second surface of the dielectric layer. The first electrode has a plurality of first magnetic dipoles with a same first direction, and the first direction of the first magnetic dipoles is perpendicular to the dielectric layer.

Abstract: A thin film capacitor includes a first electrode, second electrode opposite to the first electrode, and a dielectric layered structure disposed between the first and second electrodes and having a doped dielectric layer. The doped dielectric layer contains a dopant therein and has a doping concentration greater than 0 atoms/cm3 and not greater than 1010 atoms/cm3.

Abstract: A method of producing a capacitor for a printed circuit board includes producing high-dielectric sheets and selecting ones of the high-dielectric sheets, which are substantially free from a defect after the heat process. Each of the high-dielectric sheets is produced by providing a first electrode, forming a first sputter film on the first electrode, forming an intermediate layer on the first sputter film by calcining a sol-gel film, forming a second sputter film on the intermediate layer, and providing a second electrode on the second sputter film. The high-dielectric sheets are subjected to a heat process in which the high-dielectric sheets are subjected to a first temperature at least once and a second temperature higher than the first temperature at least once.

Abstract: A ceramic electronic part 100 having a chip element 1 having internal electrodes embedded therein, and terminal electrodes 3 that cover the end faces 11 of the chip element 1 having an exposed internal electrode and parts of the side faces 13,15 orthogonal to the end faces 11, and that are electrically connected to the internal electrodes, wherein the terminal electrodes 3 include a first electrode layer and a second electrode layer with a lower glass component content than the first electrode layer, in that order from the chip element 1 side, the second electrode layer being formed covering part of the first electrode layer on the side faces 13,15.

Abstract: A method for manufacturing a ceramic electronic component having excellent solderability is provided. In this method, the elution of barium from the ceramic electronic component and the adhesion of ceramic electronic components in tin plating are reduced. The method for manufacturing a ceramic electronic component includes the steps of providing an electronic component of barium-containing ceramic and forming an electrode on the outer surface of the electronic component, the electrode being electroplated with tin. In this method, a plating bath used in the tin plating has a tin ion concentration A in the range of 0.03 to 0.51 mol/L, a sulfate ion concentration B in the range of 0.005 to 0.31 mol/L, a molar ratio B/A of less than one, and a pH in the range of 6.1 to 10.5.

Abstract: Devices and methods for their formation, including electronic devices containing capacitors, are described. In one embodiment, a device includes a substrate and a capacitor is formed on the substrate. The capacitor includes first and second electrodes and a capacitor dielectric between the first and second electrodes. At least one of the first and second electrodes includes a metal layer having carbon nanotubes coupled thereto. In one aspect of certain embodiments, the carbon nanotubes are at least partially coated with an electrically conductive material. In another aspect of certain embodiments, the substrate comprises an organic substrate and the capacitor dielectric comprises a polymer material. Other embodiments are described and claimed.

Abstract: An improved method for forming a capacitor. The method includes: providing a carrier with a channel therein; providing a metal foil with a valve metal with a first dielectric on a first face of the metal foil; securing the metal foil into the channel with the first dielectric away from a channel floor; inserting an insulative material between the metal foil and each side wall of the channel; forming a cathode layer on the first dielectric between the insulative material; forming a conductive layer on the cathode layer and in electrical contact with the carrier; lap cutting the carrier parallel to the metal foil such that the valve metal is exposed; and dice cutting to form singulated capacitors.

Abstract: The capacitance per volume of an electric double-layer capacitor can be increased by using a raw-material carbon composition for use in a carbon material for an electrode of the electric double-layer capacitor by applying an activation process, characterized in that the raw-material carbon composition has a volatile content of 1.3% by mass to 15% by mass (both inclusive), and microstrength of 5 to 30% when the volatile content is less than 6% by mass while microstrength of 5 to 20% when the volatile content is 6% or more.

Abstract: The present invention relates to borosilicate glass compositions for a sintering agent, dielectric compositions containing the borosilicate glass compositions and a multilayer ceramic capacitor using the dielectric compositions. Borosilicate glass compositions for a sintering agent according to an aspect of the invention include an alkali oxide, an alkaline earth oxide and a rare earth oxide, can sinter ceramic dielectrics at low temperatures and improve the hot insulation resistance of a multilayer ceramic capacitor. Correspondingly, dielectric compositions including these borosilicate glass compositions and a multilayer ceramic capacitor using the dielectric compositions can be sintered at a low temperature of 1100° C. or less and have high hot insulation resistance, thereby ensuring high levels of reliability.

Abstract: The invention is directed to an improved capacitor that reduces edge defects and prevents yield failures. A first embodiment of the invention comprises a protective layer adjacent an interface of a conductive layer with the insulator, while the second embodiment of the invention comprises a protective layer on an insulator which is on a conductive layer.

Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.

Abstract: A rolled film capacitor is disclosed which includes a first dielectric film and a second dielectric film, which are wound along their length dimension to form alternating turns of the winding. A plurality of first conductive segments are arranged on a first surface of the first dielectric film along the length dimension of the first dielectric film, and a plurality of second conductive segments are arranged on a surface of the second dielectric film along the length dimension of the second dielectric film, or on a second surface of the first dielectric film along the length dimension of the first dielectric film. The first conductive segments can have a progressively increasing length along the length dimension of the first dielectric film, and the second conductive segments have a progressively increasing length along the length dimension of the first or second dielectric film. The number of the first and/or second conductive segments per turn of the winding can be equal to or more than one.

Abstract: A metal-insulator-metal (MIM) capacitor includes a lower electrode, a dielectric layer, and an upper electrode. The lower electrode includes a first conductive layer, a chemical barrier layer on the first conductive layer, and a second conductive layer on the chemical barrier layer. The chemical barrier layer is between the first and second conductive layers and is a different material than the first and second conductive layers. The dielectric layer is on the lower electrode. The upper electrode is on the dielectric layer opposite to the lower electrode. The first and second conductive layers can have the same thickness. The chemical barrier layer can be thinner than each of the first and second conductive layers. Related methods are discussed.

Abstract: A capacitor includes a ceramic capacitor body having opposite ends and comprised of a plurality of electrode layers and dielectric layers and first and second external terminals attached to the ceramic capacitor body. The internal active electrodes within the ceramic capacitor body are configured in an alternating manner. Internal electrode shields within the ceramic capacitor body are used to assist in providing resistance to arc-over. The shields can include a top internal electrode shield and an opposite bottom internal electrode shield wherein the top internal electrode shield and the opposite bottom internal electrode shield are on opposite sides of the plurality of internal active electrodes and each internal electrode shield extends inwardly to or beyond a corresponding external terminal to thereby provide shielding. Side shields are used. The capacitor provides improved resistance to arc-over, high voltage breakdown in air, and allows for small case size.

Abstract: A disclosed capacitor sheet attached to an electronic apparatus comprises: a laminated body; a first penetration electrode penetrating the laminated body, the first penetration electrode being electrically connected to a terminal electrode of the electronic apparatus; a second penetration electrode disposed at an arrangement position different from that of the first penetration electrode on the laminated body, the second penetration electrode being electrically insulated from the first penetration electrode and penetrating the laminated body; at least one first conductor thin film electrically connected to the first penetration electrode and insulated from the second penetration electrode; and at least one second conductor thin film disposed so as to face the first conductor thin film via a dielectric layer, the second conductor thin film being electrically connected to the second penetration electrode and insulated from the first penetration electrode.

Abstract: A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate. A capacitor part is manufactured by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part. A plurality of low temperature co-fired green sheets are provided. Each of the low temperature co-fired green sheet has at least one of a conductive pattern and a conductive via hole thereon. A low temperature co-fired ceramic deposition is formed by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition. The embedded capacitor part is connected either to the conductive pattern or the conductive via hole of an adjacent green sheet. Then the low temperature co-fired ceramic deposition having the capacitor part embedded therein is fired.

Abstract: A novel lead zirconium titanate (PZT) material having unique properties and application for PZT thin film capacitors and ferroelectric capacitor structures, e.g., FeRAMs, employing such thin film material. The PZT material is scalable, being dimensionally scalable, pulse length scalable and/or E-field scalable in character, and is useful for ferroelectric capacitors over a wide range of thicknesses, e.g., from about 20 nanometers to about 150 nanometers, and a range of lateral dimensions extending to as low as 0.15 ?m. Corresponding capacitor areas (i.e., lateral scaling) in a preferred embodiment are in the range of from about 104 to about 10?2 ?m2. The scalable PZT material of the invention may be formed by liquid delivery MOCVD, without PZT film modification techniques such as acceptor doping or use of film modifiers (e.g., Nb, Ta, La, Sr, Ca and the like).

Abstract: A capacitor and capacitor-like device or any other device showing capacitive effects, including FETs, transmission lines, piezoelectric and ferroelectric devices, etc., with at least two electrodes, of which at least one electrode consists of or comprises a material or is generated as electron system, whose absolute value of the electronic charging energy as defined by the charging-induced change of Ekin+Eexc+Ecorr exceeds 10% of the charging-induced change of the Coulomb field energy of the capacitor according to E=Ecoul+Ekin+Eexc+Ecorr. Therein, E is the energy of a capacitor and Ecoul=Q2/2 Ccoul=Q2d/(2 ?0 ?x A), A is the area of the capacitor electrodes, d is the distance and ?0?x the dielectric constant between them. Ecorr describes the correlation energy, Ekin the electronic kinetic energy and Eexc the exchange energy of the electrode material.

Abstract: A capacitive element that can efficiently reduce high-frequency noise generated in a circuit is provided. A capacitive element 1 includes a capacitive formation portion 100, which is formed in the shape of a loop to separate the inside from the outside. The capacitive formation portion 100 includes an electrode 110, an opposite electrode 111, and a dielectric layer 120. One or more outgoing terminals (one or more outer circumference outgoing terminals 140, and one or more internal circumference outgoing terminals 130) are provided at the outer and inner circumferences of the electrode 110, respectively. A printed wiring board is made by mounting the capacitive element inside the board or on the surface of the board. A semiconductor package is made by putting the capacitive element 1 on a target semiconductor circuit portion. Moreover, a semiconductor circuit is made by placing the capacitive element on a target functional circuit portion 301.

Abstract: A method of patterning a metal (141, 341, 841) on a vertical sidewall (132, 332, 832) of an excavated feature (130, 330, 830) includes placing a material (350) in the excavated feature such that a portion (435) of the metal is exposed in the excavated feature above the material, etching the exposed portion of the metal away from the vertical sidewall using a first wet etch chemistry, and removing the material from the excavated feature by etching it away using a second wet etch chemistry. The described method may be used to produce a MIM capacitor (800) suitable for an eDRAM device.

Abstract: A method is disclosed for manufacturing SrxTiyO3 based metal-insulator-metal (MIM) capacitors using a low temperature Atomic Layer Deposition (ALD) process. Preferably TiN is used to form the bottom electrode. The Sr/Ti ratio in the SrxTiyO3 dielectric layer of the capacitor can be varied to tune the electric properties of the capacitor. The dielectric constant and the leakage current of the SrxTiyO3 dielectric layer decrease monotonously with the Sr content of this SrxTi1-xO3 dielectric layer. By increasing the Sr content at the interface between the SrxTiyO3 dielectric layer and the TiN bottom electrode, the interfacial equivalent-oxide thickness (EOT) can be further reduced.

Abstract: A composite of a base and an array of needle-like crystals formed on a surface of the base is provided, in which the base side and the opposite side to the base with respect to the array can be isolated in a satisfactory manner. A composite 10 contains a transparent electrode 2 serving as the base and an array 4 of needle-like crystals 3 formed thereon. The needle-like crystals 3 are made of, for example, zinc oxide. The array 4 includes a first region R1 on the transparent electrode 2 side and a second region R2 on the opposite side to the transparent electrode 2 with respect to the first region R1. A proportion of the cross section of the needle-like crystals 3 in a plane parallel to the surface of the transparent electrode 2 is lower in the second region R2 than in the first region R1, and the surface of the transparent electrode 2 is substantially covered with the needle-like crystals 3 in the first region R1.

Abstract: A semiconductor device and a method of fabricating the same include an electrode having a nickel layer with impurities. The electrode having a nickel layer with impurities can be a gate electrode or a capacitor electrode. The electrode having a nickel layer with impurities may include a combination of a pure nickel layer and a nickel layer with impurities.

Abstract: A production method of a multilayer electronic device, comprising the steps of forming an electrode layer 12a on a first support sheet 20; forming a green sheet 10a on a surface of the electrode layer 12a to obtain a green sheet 10a having an electrode layer 12a; stacking the green sheets 10a, each having the electrode layer 12a, to form a green chip; and firing the green chip: wherein before stacking the green sheet 10a having the electrode layer 12a, an adhesive layer 28 is formed on a surface on the opposite side of the electrode layer side of the green sheet 10a having the electrode layer 12a; and the green sheet 10a having the electrode layer 12a formed thereon is stacked via the adhesive layer 28.

Abstract: Provided is a MLCC module used as a direct current (DC) link capacitor that is included in an inverter of a hybrid vehicle.

Abstract: The present invention relates to a porous conducting metal oxide electrode prepared by depositing a porous conducting metal oxide film comprising a conducting metal oxide film layer having a network structure of nanofibers, comprising nanograins or nanoparticles, on at least one surface of a current collector, and a conducting metal oxide coating layer on the network layer of the porous conducting metal oxide through the constant current method or the cyclic voltammetric method, and a high-speed charge/discharge and ultrahigh-capacity supercapacitor using the porous conducting a metal oxide electrode.

Abstract: The present invention relates to a solution to the unpredictable, inrush voltage or current surge such as static electricity and eddy current phenomenon. The solution provides a circuit which can guide an unpredictable voltage or current surge into the circuit and let them dissipate in the circuit. The present invention also relates to a solution to a DC power source surge. The solution provides a protection circuit to divide an input power surge into DC and AC in which AC will be dissipated in the protection circuit and the safe DC is sent to the output. The present invention further relates to an energy discharge capacitor which can quickly dissipate the charge and the capacitor can be applied to our inventive circuits.

Abstract: A metal-insulator-metal capacitor structure includes a lower electrode, a buffer layer, a barrier layer, a dielectric layer and an upper electrode. The lower electrode is disposed in the buffer layer. The barrier layer covers part of the lower electrode and is disposed between the lower electrode and the upper electrode. The buffer layer serves as an etching stop layer to define the dielectric layer. The dielectric layer in the metal-insulator-metal capacitor structure has a uniform and ideal thickness.

Abstract: A metal capacitor in which an electric conductivity is significantly improved by applying a metal material for an electrolyte and a manufacturing method thereof is provided.

Abstract: A capacitor insulating film includes a laminated structure in which aluminum oxide films and titanium dioxide films are alternately laminated, wherein the titanium dioxide films each have a rutile crystal structure, and the ratio of the total thickness of the aluminum oxide films to the total thickness of the laminated structure ranges from 3 to 8%.

Abstract: A multilayer ceramic capacitor having external electrodes. Each of the external electrodes has a lower layer resistance electrode and an upper layer conductive electrode. A glass contained in the upper layer conductive electrode has a softening point higher than that of a glass contained in the lower layer resistance electrode by 20° C. or more.

Abstract: The self-resonance insertion loss dip of a feedthrough capacitor is reduced or eliminated by raising the equivalent series resistance of the capacitor, thus minimizing the capacitor Q. The equivalent series resistance of the capacitor can be raised by forming voids in the active and/or ground electrode plates of the capacitor. The electrode plates may be formed so as to have a relatively reduced thickness, or a relatively increased thickness. A conductive material having a relatively high resistivity may be used to form the active and/or ground electrode plates of the capacitor. Alternatively, the conductive material forming the electrode plates may have a dielectric material added thereto.

Abstract: A feedthrough terminal assembly for active implantable medical devices includes a structural wire bond pad for a convenient attachment of wires from either the circuitry inside the implantable medical device or wires external to the device. Direct attachment of wire bond pads to terminal pins enables thermal or ultrasonic bonding of lead wires, while shielding the capacitor or other delicate components from the forces applied to the assembly during attachment of the wires.

Abstract: The formation of a resistive electrode layer as a portion of an external electrode of a monolithic ceramic capacitor by baking a resistive paste, which contains ITO, a glass frit, and an organic vehicle, to impart the function of a resistance element to the external electrode may lead to the occurrence of blisters or reduced denseness. This is modulated when the resistive paste further contains a densification promoting metal or oxide, which promotes densification of a sintered compact of the resistive paste, and a densification preventing metal oxide, which prevents the densification.

Abstract: A method and system for fabricating a stacked capacitor and a DMOS transistor are disclosed. In one aspect, the method and system include providing a bottom plate, an insulator, and an additional layer including first and second plates. The insulator covers at least a portion of the bottom plate and resides between the first and second top plates and the bottom plate. The first and second top plates are electrically coupled through the bottom plate. In another aspect, the method and system include forming a gate oxide. The method and system also include providing SV well(s) after the gate oxide is provided. A portion of the SV well(s) resides under a field oxide region of the device. Each SV well includes first, second, and third implants having a sufficient energy to provide the portion of the SV well at a desired depth under the field oxide region without significant additional thermal processing. A gate, source, and drain are also provided.

Abstract: A capacitor includes a first electrode, a dielectric layer, and a second electrode. The capacitor also includes a buffer layer formed over at least one of an interface between the first electrode and the dielectric layer and an interface between the dielectric layer and the second electrode, wherein the buffer layer includes a compound of a metal element from electrode materials of one of the first and second electrodes and a metal element from materials included in the dielectric layer.

Abstract: Electrical components for microelectronic devices and methods for forming electrical components. One particular embodiment of such a method comprises depositing an underlying layer onto a workpiece, and forming a conductive layer on the underlying layer. The method can continue by disposing a dielectric layer on the conductive layer. The underlying layer is a material that causes the dielectric layer to have a higher dielectric constant than without the underlying layer being present under the conductive layer. For example, the underlying layer can impart a structure or another property to the film stack that causes an otherwise amorphous dielectric layer to crystallize without having to undergo a separate high temperature annealing process after disposing the dielectric layer onto the conductive layer. Several examples of this method are expected to be very useful for forming dielectric layers with high dielectric constants because they avoid using a separate high temperature annealing process.

Abstract: This invention relates to a capacitor electrode which includes porous layers made of a fiber and/or a whisker containing crystal tungsten oxides. The tungsten oxide fiber and/or whisker contain W18O49 as a main ingredient. The tungsten oxide fiber and/or whisker are made on a substrate. When manufacturing the capacitor electrode the substrate or its precursor is heated in vacuo or in an inactive containing a minute amount of oxygen, thereby completing the fiber and/or whisker.

Abstract: A method of making a metal-metal capacitor is disclosed, in which a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, and a third metal layer are formed in the order over a substrate; an upper capacitor is defined by etching using a first mask, wherein the stop of the etching can be controlled; a lower capacitor is defined by etching using a second mask; and an anti-reflective third mask is formed to cover the surface, and the capacitor border and metal interconnect conductive wire are defined, so as to make a metal-metal capacitor with a stable structure in a wide process window.

Abstract: The capacitor has a monolithic anode and at least one anode lead wire extending from the anode. At least one sacrificial lead wire extends from the anode. A dielectric layer is on said anode and a cathode layer is on the dielectric layer. The anode lead wire is in electrical contact with the anode and a cathode lead is in electrical contact with the cathode.

Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.

Abstract: A multilayer ceramic capacitor having a high dielectric constant, a large capacitance and a high reliability can be obtained by controlling a value of residual stress in it.

Abstract: A method of producing an array type multi-layer ceramic capacitor is disclosed, comprising: forming dielectric films, forming dielectric sheets on which internal electrodes and interelectrode dielectrics formed on the same plane as the internal electrodes are printed simultaneously by spraying ink intended for internal electrodes and ink intended for dielectrics onto the dielectric film via a plurality of inkjet printer heads, stacking and compressing the dielectric sheets, cutting the stacked dielectric sheet to include a plurality of internal electrodes on the same plane as the dielectric sheet, and sintering the cut dielectric sheets. The array type multi-layer ceramic capacitor according to the invention can solve the problem of interlayer gaps by printing the dielectrics and internal electrodes simultaneously, and can solve the contact problem by printing the internal electrode and the external electrode as a single body.

Abstract: Structures and methods of forming an ideal MIM capacitor are disclosed. The single capacitor includes a first and a second metal structure overlying a substrate, a first dielectric material disposed between a first portion of the first metal structure and a first portion of the second metal structure. A second dielectric material is disposed between a second portion of the first metal structure and a second portion of the second metal structure. No first dielectric material is disposed between the second portion of the first and second metal structures, and no second dielectric material is disposed between the first portion of the first and second metal structures. The first and second dielectric material layers include materials with opposite coefficient of capacitance.

Abstract: A capacitor electrode is composed of an SrRuO3 film including first and second surfaces opposed to each other. The capacitor electrode contains a 10 atom % or less trivalent element in a region ranging from a position a predetermined distance away from the first surface in the thickness direction thereof up to the second surface side.