With Multilayer Ceramic Capacitor Patents (Class 361/321.2)
  • Patent number: 11152153
    Abstract: A method of manufacturing a multilayer ceramic electronic component includes preparing a ceramic green sheet, forming an internal electrode pattern by coating a paste for an internal electrode including nickel (Ni) powder including a coating layer having a surface including copper (Cu) on the ceramic green sheet, forming a ceramic multilayer structure by stacking the ceramic green sheet with the internal electrode pattern formed thereon, and forming a body including a dielectric layer and an internal electrode by sintering the ceramic multilayer structure. The content of Cu is equal to or greater than 0.2 wt %, based on a total weight of the Ni powder.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: October 19, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyoung Jin Cha, Jeong Ryeol Kim, Kyung Ryul Lee, Young Joon Oh, Hyo Min Kang, Jun Oh Kim
  • Patent number: 11101074
    Abstract: A ceramic electronic component includes a body including dielectric layers and a plurality of internal electrodes and an external electrode including a connection portion and a band portion. The external electrode includes an electrode layer, a conductive resin layer, a nickel plating layer, and a tin plating layer. When an electrode layer thickness, a conductive resin layer thickness, a nickel plating layer thickness, a tin plating layer thickness of the band portion are defined as t3, t4, and t5, respectively, t5 is greater than or equal to 0.5 micrometer and less than 7 micrometer, and t5/(t3+t4) satisfies 1?t5/(t3+t4)*100<17.5 in the case in which t3+t4 is less than or equal to 100 micrometers and satisfies 0.3?t5/(t3+t4)*100<4.38 in the case in which t3+t4 is more than 100 micrometers.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: August 24, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dong Hwi Shin, Dong Yeong Kim, Do Yeon Kim, Woo Chul Shin
  • Patent number: 11094462
    Abstract: A multilayer ceramic electronic component includes a laminate, a first external electrode on a first end surface of the laminate, and a second external electrode on a second end surface of the laminate. The laminate includes a central layer portion in which each first internal electrode layer and each second internal electrode layer oppose each other with a dielectric ceramic layer therebetween, peripheral layer portions sandwiching the central layer portion in a lamination direction, and side margins sandwiching the central layer portion and the peripheral layer portions in a width direction. The side margins each include multiple ceramic layers laminated in the width direction, and the ceramic layers include an inner layer disposed closest to the laminate and an outer layer disposed farthest from the laminate.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: August 17, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daiki Fukunaga, Hideaki Tanaka
  • Patent number: 11081276
    Abstract: An electronic component includes: a first frame, including a first support portion and a plurality of first extension portions, extended from the first support portion in a first direction; a second frame, including a second support portion disposed to face the first support portion and a plurality of second extension portions, extended from the second support portion in a second direction opposite to the first direction and disposed to alternate with and be spaced apart from the first extension portions in the first direction; and a plurality of capacitors disposed on first and second extension portions adjacent to each other by a predetermined interval so that first and second external electrodes are adhered thereto, respectively.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: August 3, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Jae Young Na
  • Patent number: 11056283
    Abstract: A multilayer ceramic capacitor includes: a ceramic main body having a structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two end faces of the ceramic multilayer structure, a main component of the dielectric layers being ceramic; and a pair of external electrodes that are formed from the two end faces to at least one of side faces of the ceramic main body, wherein a relationship of y?1+1.48x is satisfied when a temperature of the multilayer ceramic capacitor is increased from 190 degrees C. to 260 degrees C., wherein “y” is a total amount of hydrogen gas, water vapor and carbonic acid gas (number of molecules/1015) released from the multilayer ceramic capacitor, wherein a volume of the multilayer ceramic capacitor is “x” (mm3).
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: July 6, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yuji Matsushita
  • Patent number: 11056280
    Abstract: The object of the present invention is to provide a multilayer ceramic electronic component having improved highly accelerated lifetime and specific permittivity. A multilayer ceramic electronic component comprising a multilayer body in which an internal electrode layer and a dielectric layer are stacked in alternating manner, wherein the dielectric layer comprises a dielectric ceramic composition having a main component expressed by a general formula ABO3 (A is Ba and the like, and B is Ti and the like) and a rare earth component R, a segregation phase including the rare earth component R exists in the dielectric layer, an area ratio of the segregation phases in a cross section along a stacking direction is 104 ppm to 961 ppm, and 96% or more of a total area of the segregation phases contact with the internal electrode layer.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: July 6, 2021
    Assignee: TDK CORPORATION
    Inventors: Takuma Ariizumi, Toshihiko Kaneko, Nobuto Morigasaki, Yasuhiro Ito
  • Patent number: 11049659
    Abstract: Provided are a multilayer ceramic electronic component and a method for manufacturing the same, the multilayer ceramic electronic component including a ceramic body including a dielectric layer and an internal electrode, and an external electrode formed on an outer side of the ceramic body and electrically connected to the internal electrode, wherein the internal electrode includes a conductive metal and an additive, and the number of particles of the additive disposed per ?m2 of the internal electrode is in the range of 7 to 21, both inclusive.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: June 29, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyoung Jin Cha, Seung Heui Lee, Beom Seock Oh, Kwang Sic Kim, Dong Hoon Kim, Jong Ho Lee, Seon Jae Mun
  • Patent number: 11043456
    Abstract: A semiconductor device includes a substrate, a first electrode including a first hole, a first dielectric layer on an upper surface of the first electrode and on an inner surface of the first hole, a second electrode on the first dielectric layer, a second dielectric layer on the second electrode, a third electrode on the second dielectric layer and including a second hole, and a first contact plug extending through the second electrode and the second dielectric layer and extending through the first hole and the second hole. A sidewall of the first contact plug is isolated from direct contact with the sidewall of the first hole and a sidewall of the second hole, and has a step portion located adjacent to an upper surface of the second electrode.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: June 22, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinho Park, Shaofeng Ding, Yongseung Bang, Jeong Hoon Ahn
  • Patent number: 11004609
    Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having a structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the ceramic multilayer structure; and a pair of external electrodes that are formed on the two edge faces, wherein when an average value of insulation resistances of each pair of the internal electrode adjacent to each other in a stacking direction is IRave and a minimum value of the insulation resistances is IRmin, (IRave?IRmin)/IRave<0.50 is satisfied.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: May 11, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kunihiko Nagaoka, Noriyuki Chigira, Koichiro Morita
  • Patent number: 11004603
    Abstract: The invention is directed to a multilayer ceramic capacitor comprising a top surface and an opposing bottom surface and four side surfaces that extend between the top and bottom surfaces, a main body formed from a plurality of dielectric layers and a plurality of internal electrode layers alternately arranged, and external terminals electrically connected to the internal electrode layers wherein a first external terminal is disposed along the top surface and a second external terminal is disposed along the bottom surface. The internal electrode layer includes a first electrode electrically connected to the first external terminal and a second counter electrode electrically connected to the second external terminal, wherein the first electrode includes a central portion extending from the first external terminal toward the second external terminal and wherein the central portion extends 40% to less than 100% a distance from the first external terminal to the second external terminal.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: May 11, 2021
    Assignee: AVX Corporation
    Inventors: Jeffrey A. Horn, Marianne Berolini
  • Patent number: 10950388
    Abstract: A multi-layer ceramic capacitor includes: a ceramic body including first and second end surfaces, first and second side surfaces, first internal electrodes drawn to the first and second end surfaces, second internal electrodes drawn to at least one of the first side surface and the second side surface, and dielectric layers, the first and second internal electrodes being alternately laminated via the dielectric layers; first and second external electrodes that respectively cover the first and second end surfaces, and extend to each of the first and second side surfaces; a third external electrode including a first side-surface region formed on the first side surface and a second side-surface region formed on the second side surface, the first side-surface region and the second side-surface region being formed to be mutually shifted along the first direction and at least partially facing each other in the second direction.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: March 16, 2021
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Takashi Sasaki
  • Patent number: 10930433
    Abstract: A multilayer ceramic electronic component includes a laminated body. External electrodes are provided on both end surfaces of the laminated body. The external electrodes include a base electrode layer, a conductive resin layer disposed on the base electrode layer, and a plating layer disposed on the conductive resin layer. The conductive resin layer includes a first layer located on the base electrode layer, a second layer located on the first layer, and a third layer located on the second layer. A void volume of the first layer and the third layer calculated by a predetermined equation is about 10 vol % or less, and a void volume of the second layer is about 16 vol % or more, and thicknesses of the first layer, the second layer, and the third layer satisfy predetermined conditions.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: February 23, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Atsushi Nakamoto
  • Patent number: 10867749
    Abstract: A multilayer capacitor includes a capacitor body, a first external electrode, and a second external electrode. The capacitor body includes a plurality of first and second internal electrodes alternately stacked with dielectric layer interposed therebetween. The first and second external electrodes are electrically connected to the first and second internal electrodes, respectively. A first Schottky layer is Schottky-junctioned to an interface between the dielectric layer and the first internal electrode in the capacitor body. A second Schottky layer is Schottky-junctioned to an interface between the dielectric later and the second internal electrode in the capacitor body. The work function values of the first and second Schottky layers is higher than the work function values of the first and second internal electrodes.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: December 15, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Sung Chun, Hae Suk Chung, Kyeong Jun Kim, Byung Sung Kang
  • Patent number: 10847318
    Abstract: A method of manufacturing a ceramic electronic component includes adding a modifier to a surface of chip containing ceramics and an organic material, applying a conductive paste on the surface of the chip to which the modifier has been added, and firing the chip along with the conductive paste applied on the chip.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: November 24, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kotaro Shimizu
  • Patent number: 10840027
    Abstract: A tunable multilayer capacitor is provided. The capacitor comprises a first active electrode in electrical contact with a first active termination and a second active electrode in electrical contact with a second active termination. The capacitor comprises a first DC bias electrode in electrical contact with a first DC bias termination and a second DC bias electrode in electrical contact with a second DC bias termination. A plurality of dielectric layers disposed between the first and second active electrodes and between the first and second bias electrodes. At least a portion of the dielectric layers contain a tunable dielectric material that exhibits a variable dielectric constant upon the application of an applied DC voltage across the first and second DC bias electrodes. A thickness of at least one of the plurality of dielectric layers is greater than about 15 micrometers.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: November 17, 2020
    Assignee: AVX Corporation
    Inventors: Craig W. Nies, Andrew P. Ritter, Richard C. VanAlstine
  • Patent number: 10818435
    Abstract: A capacitor component includes a body including an active layer and an upper cover and a lower cover disposed on an upper part and a lower part of the active layer, respectively; first internal electrodes and second internal electrodes disposed inside the active layer; a first active via and a second active via extending in a thickness direction of the active layer to be connected to the first and second internal electrodes, respectively; first and second cover vias extending in a thickness direction of the lower cover to be electrically connected to the first and second active vias and disposed at an interval narrower than an interval between the first and second active vias; and first and second lower electrodes disposed in a lower surface of the lower cover to be connected to the first and second cover vias, respectively.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Taek Jung Lee, Jin Kyung Joo, Seung Woo Song, Hyo Youn Lee, Sung Kwon An
  • Patent number: 10790094
    Abstract: A method of forming a leadless stack comprising multiple components is provided. The method comprises forming an MLCC comprising a first capacitor external termination and a second capacitor external termination and forming an electronic element is formed comprising a first element external termination and a second element external termination. The MLCC and electronic component are are arranged in a stack with a TLPS bond between the first capacitor external termination and the first element external termination.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: September 29, 2020
    Assignee: KEMET Electronics Corporation
    Inventors: John E. McConnell, Garry L. Renner, John Bultitude, R. Allen Hill, Galen W. Miller
  • Patent number: 10790091
    Abstract: An element body includes first and second end surfaces opposing each other in a first direction, first and second side surfaces opposing each other in a second direction, and first and second principal surfaces opposing each other in a third direction. The length of the element body in the second direction is shorter than that of the element body in the first direction, and the length of the element body in the third direction is shorter than that of the element body in the second direction. A pair of first external electrodes is disposed at both ends of the element body in the first direction. A second external electrode is disposed on the element body and positioned between the pair of first external electrodes. The second external electrode includes a first conductor part disposed on the first side surface. A depression is formed in the first conductor part.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: September 29, 2020
    Assignee: TDK CORPORATION
    Inventors: Fumiaki Satoh, Takehisa Tamura, Yuma Hattori, Toru Onoue, Daisuke Himeta, Ken Morita, Takuto Okamoto
  • Patent number: 10755860
    Abstract: A multilayer ceramic electronic component includes: a ceramic body having a dielectric layer, and a plurality of first and second internal electrodes facing each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed on an outer surface of the ceramic body, respectively. The ceramic body includes an active portion including a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween to form capacitance, and cover portions formed on upper and lower portions of the active portion. A buffer region is disposed between at least one pair of first and second internal electrodes among the plurality of first and second internal electrodes disposed inside the active portion, and satisfies the relation 0<tb<150 ?m+td, where td is a thickness of the dielectric layer, and tb is a thickness of the buffer region.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: August 25, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyeong Jun Kim, Jang Hyun Lee, Hae Suk Chung, Do Lee, Byung Sung Kang, Ho In Jun
  • Patent number: 10748709
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first and second internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrode, respectively, wherein the dielectric layer includes dielectric grains having a core-shell structure including a core and a shell, and a domain wall is disposed in the shell.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: August 18, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Kum Jin Park
  • Patent number: 10707021
    Abstract: A multilayer ceramic electronic component includes a body with a plurality of first and second internal electrodes alternately arranged with dielectric layers interposed therebetween. There may be M each of third and fourth external electrodes on opposing sides of the body, where M is greater than or equal to 3 and all external electrodes have different polarities than the adjacent external electrodes. There may be N via electrodes penetrating through the body, where N is greater than or equal to 3 and the via electrodes are connected to either of the first or second internal electrodes. The multilayer ceramic electronic component may achieve low equivalent series inductance (ESL) characteristics and may reduce the mounting area on the circuit board.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: July 7, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Soo Park, Young Ghyu Ahn, Hwi Dae Kim
  • Patent number: 10699847
    Abstract: A multilayer capacitor includes a capacitor body including a first surface and a second surface opposing each other, a third surface and a fourth surface connected to the first surface and the second surface and opposing each other, and a fifth surface and a sixth surface, a first internal electrode of the first internal electrodes being exposed through the third surface and the fourth surface, a second internal electrode of the second internal electrodes being exposed through the fifth surface and the sixth surface, a first external electrode and a second external electrode disposed in the third surface and the fourth surface of the capacitor body, respectively, the first external electrode and the second external electrode connected to an exposed portion of the first internal electrode, a third external electrode and a fourth external electrode disposed in the fifth surface and the sixth surface of the capacitor body, respectively.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: June 30, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Heung Kil Park, Jong Hwan Park
  • Patent number: 10667400
    Abstract: An electrical component for embedding into a carrier comprises a ceramic main body, an electrically insulating passivation layer which is applied to the main body, and at least one inner electrode. In addition, the electrical component comprises an outer electrode which is connected to the inner electrode, wherein the outer electrode comprises a first electrode layer comprising a metal and a second electrode layer which is arranged on the latter and comprises copper.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: May 26, 2020
    Assignee: EPCOS AG
    Inventor: Thomas Feichtinger
  • Patent number: 10658111
    Abstract: A capacitor having a conductive porous substrate with at least two electrostatic capacitance forming sections, each of the at least two electrostatic capacitance forming sections including a porous portion of the conductive porous substrate, a dielectric layer on the porous portion, and an upper electrode on the dielectric layer. The at least two electrostatic capacitance forming sections are electrically connected in series by the conductive porous substrate.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: May 19, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Noriyuki Inoue, Hiromasa Saeki, Kensuke Aoki, Ken Ito
  • Patent number: 10650972
    Abstract: An element body of a rectangular parallelepiped shape has a length in a width direction larger than a length in a height direction and has a length in a longitudinal direction larger than the length in the width direction. A terminal electrode is disposed at an end of the element body in the width direction and extends in the longitudinal direction. The element body includes a pair of principle surfaces opposing each other in the height direction, a pair of end surfaces opposing each other in the longitudinal direction, and a pair of side surfaces opposing each other in the width direction. The terminal electrode includes a conductor disposed on the side surface. The conductor includes a depression having a length in the longitudinal direction larger than a length in the height direction.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: May 12, 2020
    Assignee: TDK CORPORATION
    Inventors: Toru Onoue, Fumiaki Satoh, Takuto Okamoto
  • Patent number: 10650974
    Abstract: A multilayer ceramic capacitor includes a laminate with a rectangular or substantially rectangular parallelepiped shape and including dielectric layers, first internal electrode layers, and second internal electrode layers that are laminated; a first external electrode connected with the first internal electrode layers; and a second external electrode connected with the second internal electrode layers. Each of the first internal electrode layers or the second internal electrode layers has a coverage in a central portion in a W direction that is lower than a coverage within about 30.000 ?m from an end portion in the W direction, and has a shifting amount in the W direction of about 0.000 ?m or more and about 10.000 ?m or less.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 12, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kohei Shimada, Akio Masunari, Yuta Saito, Shunsuke Abe, Tomoo Yuguchi
  • Patent number: 10636572
    Abstract: Provided is a multilayer ceramic electronic device which is capable of preventing decrease of the specific permittivity and of showing less drop of capacitance, even when the dielectric grains constituting the dielectric layers become smaller for thinning of the dielectric layers, wherein Dg/Di?1 is satisfied, in case that “Di” is an average grain size of the first dielectric grains constituting the dielectric layer in the capacitance region and “Dg” is an average grain size of the second dielectric grains in an exterior area.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: April 28, 2020
    Assignee: TDK CORPORATION
    Inventors: Toshihiko Kaneko, Shogo Murosawa
  • Patent number: 10636568
    Abstract: A multilayer ceramic electronic device comprising: a ceramic element body, in which it plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked, and at least a pair of external electrodes which are connected to the internal electrode layers on surfaces of the ceramic element body; a thickness of the dielectric layers is 0.4 ?m or less, a width (W0) of the ceramic element body along a width-direction is 0.59 mm or less, a gap (Wgap) between an outer face of the ceramic element body and an end of the internal electrode layers along width-direction of the ceramic element body is 0.010 to 0.025 mm, and a ratio (Wgap/W0) of the gap with respect to the width is 0.025 or more.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: April 28, 2020
    Assignee: TDK CORPORATION
    Inventors: Shogo Murosawa, Toshihiko Kaneko
  • Patent number: 10622153
    Abstract: A multilayer capacitor includes a body including an active region including a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween and upper and lower cover regions, and having first and second surfaces opposing each other and third and fourth surfaces opposing each other, the first and second internal electrodes being exposed to the third and fourth surfaces, respectively, first and second external electrodes disposed on the third and fourth surfaces, respectively, and connected to the first and second internal electrodes, respectively, and a plurality of dummy electrodes disposed in the lower cover region. A total thickness of the dummy electrodes disposed in the lower cover region is less than 20% of a sum of a thickness of the lower cover region and a thickness of one of the first and second external electrodes disposed on a mounting surface of the body.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: April 14, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hwi Dae Kim, Sang Soo Park, Young Ghyu Ahn
  • Patent number: 10622152
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and has a porosity of 1% or less.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: April 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Toshimitsu Kogure, Joji Kobayashi, Yasunari Kato, Yosuke Sato, Tetsuhiko Fukuoka, Ryo Ono
  • Patent number: 10614954
    Abstract: A ceramic electronic component includes an electronic component body and portions of first and second metal terminals covered with an outer resin material. The first metal terminal includes, connected in order, a first terminal joint portion, a first extension portion extending in a direction toward a mounting surface, and a first mount portion extending toward a side opposite to the electronic component body. The second metal terminal includes, connected in order, a second terminal joint portion, a second extension portion extending in the direction toward the mounting surface, and a second mount portion extending toward a side opposite to the electronic component body. The first and second mount portions respectively include first and second protrusions protruding toward the mounting surface. The outer resin material includes a protruding portion protruding toward the mounting surface.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: April 7, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Teppei Akiyoshi
  • Patent number: 10593478
    Abstract: A multilayer ceramic capacitor includes a multilayer structure wherein [t12×L1]/N?10, when a distance between a first edge that is an outermost edge of internal electrodes that is not connected to a first or second external electrode and a second edge that is an innermost edge of the internal electrodes that is not connected to the first or second external electrode is L1, each thickness of dielectric layers is t1, and a stack number of dielectric layers is N, wherein [t12×W1]/N?10, when a distance between a first edge that is positioned at outermost of the internal electrodes and a second edge that is positioned at innermost of the internal electrodes is W1, and wherein R is larger than W1, when a curvature radius of a corner of an edge of the internal electrodes is R.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: March 17, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yasuyuki Inomata, Masaki Mochigi
  • Patent number: 10580580
    Abstract: A method of manufacturing a ceramic electronic component including a main body including a first principal surface and a second principal surface opposite to each other, and a first external electrode and a second external electrode provided on a portion of a surface of the main body, includes providing a plurality of recesses in a first principal surface of a laminated block including a ceramic material and an organic substance by relatively moving the laminated block and a protrusion surface including a protrusion, in a direction along the first principal surface of the laminated block with the protrusion surface being in contact with a first principal surface of the laminated block, obtaining a chip by cutting the laminated block including the recesses, and obtaining the main body by firing the chip.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: March 3, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Junya Tanaka, Shinsuke Uchida
  • Patent number: 10573466
    Abstract: A method of manufacturing a multilayer ceramic capacitor includes preparing a laminate by providing ceramic layers and internal electrode layers arranged in a stacking direction, and providing two or more exposure regions at which the internal electrode layers and the ceramic layer interposed between the internal electrode layers are both exposed, and transferring a first conductive paste to the laminate. In the preparing, forming the laminate to have a rectangular parallelepiped configuration or shape and to includes two longitudinal end surfaces, and four surfaces orthogonal or substantially orthogonal to the end surfaces and, on at least one of the four surfaces, a protrusion in which the exposure region protrudes outward. In the transferring, the first conductive paste is applied to a transfer jig including a groove, and the first conductive paste in the groove is transferred to a surface of the protrusion.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: February 25, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kotaro Kishi, Takashi Sawada
  • Patent number: 10559427
    Abstract: A ceramic electronic component includes an electronic component body and portions of first and second metal terminals defined by lead wires covered with an outer resin material. The first metal terminal includes, connected in order, a first terminal joint portion, a first extension portion extending in a direction toward a mounting surface, and a first mount portion extending toward a side opposite to the electronic component body. The second metal terminal includes, connected in order, a second terminal joint portion, a second extension portion extending in the direction toward the mounting surface, and a second mount portion extending toward a side opposite to the electronic component body. The first and second mount portions respectively include first and second protruding bending portions protruding toward the mounting surface. The outer resin material includes a protruding portion protruding toward the mounting surface.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: February 11, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Teppei Akiyoshi
  • Patent number: 10546692
    Abstract: A multilayer ceramic electronic component includes a first external electrode and a second external electrode. The first external electrode includes a first extension portion that extends to a third side surface. The second external electrode includes a second extension portion that extends to the third side surface. When the third side surface is viewed from a direction in which the third side surface and a fourth side surface are opposed, the first extension portion and the second extension portion each include a base portion extending along an edge of the third side surface in a first direction, and protrusion portions extending from both ends of the base portion in the first direction along edges of the third side surface in the direction in which a first side surface and a second side surface are opposed.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: January 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Sawada, Yoshihiro Fukuda
  • Patent number: 10535470
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit and a cover. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers and mainly containing nickel. The cover covers the capacitance forming unit from the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The internal electrodes each include an oxidized area adjacent to the side margin and intensively including a metal element that forms an oxide together with nickel. The capacitance forming unit includes a first portion adjacent to the cover and a second portion adjacent to the first portion in the first direction and including the oxidized area having a smaller dimension in the second direction than that of the oxidized area of the first portion.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: January 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kotaro Mizuno
  • Patent number: 10515760
    Abstract: A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first and second internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrode, respectively, wherein the dielectric layer includes dielectric grains having a core-shell structure including a core and a shell, and a domain wall is disposed in the shell.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Kum Jin Park
  • Patent number: 10497512
    Abstract: A dielectric composition, a dielectric element, an electronic component and a laminated electronic component are disclosed. In an embodiment the dielectric composition has a perovskite crystal structure containing at least Bi, Na, Sr and Ti, wherein the dielectric composition includes at least one selected from among La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Yb, Ba, Ca, Mg and Zn, wherein the dielectric composition includes specific particles having a core-shell structure that has at least one core portion including SrTiO3, and wherein ?<0.20, where ? is the ratio of the number of specific particles with respect to the total number of particles contained in the dielectric composition.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: December 3, 2019
    Assignee: TDK ELECTRONICS AG
    Inventors: Goushi Tauchi, Masakazu Hirose, Tomoya Imura, Tomohiro Terada
  • Patent number: 10475582
    Abstract: A multilayer ceramic capacitor includes: a body including dielectric layers and first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween; and first and second external electrodes disposed on the body and connected to the first and second internal electrodes, respectively, wherein the body includes first dummy patterns formed adjacent to the first internal electrodes in a width direction to be spaced apart from the first internal electrodes, and the first dummy patterns are stacked to partially overlap the second internal electrodes.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: November 12, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyuk Jin Hong, Doo Young Kim, Byung Soo Kim, Tae Young Sung, Youn Sik Jin
  • Patent number: 10475577
    Abstract: A dielectric composition, a dielectric element, an electronic component and a multi-layer electronic component are disclosed. In an embodiment the dielectric composition includes a perovskite crystal structure containing at least Bi, Na, Sr and Ti, wherein the dielectric composition includes at least one selected from among La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Yb, Ba, Ca, Mg and Zn, wherein the dielectric composition includes specific particles having a core-shell structure that has at least one core portion including SrTiO3 and wherein ? is set to 0.20???0.70, where ? is the ratio of the number of specific particles with respect to the total number of particles contained in the dielectric composition.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: November 12, 2019
    Assignee: TDK ELECTRONICS AG
    Inventors: Masakazu Hirose, Goushi Tauchi, Tomoya Imura, Tomohiro Terada
  • Patent number: 10468188
    Abstract: A ceramic electronic component includes a ceramic body and an external electrode. The external electrode is formed along a surface of the ceramic body and includes a tin layer as an outermost layer. The tin layer includes dispersed pores.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: November 5, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yuji Tomizawa, Wakae Akaishi
  • Patent number: 10403436
    Abstract: A multilayer electronic component includes a body having a stacked structure in which a plurality of internal electrodes and dielectric layers are alternately stacked; and external electrodes disposed on an outer surface of the body and connected to the internal electrodes. The dielectric layer includes a plurality of grains and a plurality of graphene particles, and the plurality of graphene particles are disposed at boundaries of the plurality of grains.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: September 3, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yu Ra Shin, Myeong Gi Kim, Eung Soo Kim, Hak Kwan Kim, Jang Yeol Lee, Seong Min Chin
  • Patent number: 10395828
    Abstract: The dielectric layers are formed from a dielectric porcelain formed from crystal particles containing barium titanate as a main component and containing a rare earth element, and the crystal particles have, in a particle boundary vicinity, a low concentration region in which the concentration of the rare earth element is lower than the concentration of the rare earth element in an inside. The crystal particles further contain vanadium, and the low concentration region contains a larger amount of the vanadium than the amount of the vanadium in the inside. The crystal particles further contain magnesium and manganese, and the magnesium and the manganese have a concentration gradient that is at a maximum at the particle boundary vicinity and that lowers toward the inside.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: August 27, 2019
    Assignee: KYOCERA Corporation
    Inventors: Masahiro Nishigaki, Hideyuki Osuzu, Jun Ueno, Masaaki Nagoya, Shota Mukoyama
  • Patent number: 10392535
    Abstract: A binder resin for an inorganic particle-dispersed paste that excels in both printability and adhesiveness and such an inorganic particle-dispersed paste are provided. The resin includes a mixture in which a polyvinyl acetal and a cellulose derivative are mixed so as to satisfy 0.2?X/(X+Y)?0.8, where X and Y stand for parts by mass of the polyvinyl acetal and the cellulose derivative, respectively. When a paste is formulated by mixing and kneading the resin with spherical nickel particles with an average particle diameter of 0.3 ?m, barium titanate particles with an average particle diameter of 0.05 ?m, a nonionic surfactant, dihydroterpineol, and mineral spirit at the prescribed mixing ratio, the paste has prescribed rheological characteristics.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: August 27, 2019
    Assignee: SHOEI CHEMICAL INC.
    Inventors: Takamasa Imai, Seiyu Teruya, Kousuke Nishimura
  • Patent number: 10381162
    Abstract: An electronic component is described wherein the electronic component comprises a stack of electronic elements comprising a transient liquid phase sintering adhesive between and in electrical contact with each said first external termination of adjacent electronic elements.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: August 13, 2019
    Assignee: KEMET Electronics Corporation
    Inventors: John E. McConnell, Garry L. Renner, John Bultitude, R. Allen Hill, Galen W. Miller
  • Patent number: 10373760
    Abstract: A capacitor component includes a plurality of unit laminates, each comprising a body with a stacked structure including a plurality of internal electrodes and connection electrodes that extend in a stacking direction of the body and electrically connect to the plurality of internal electrodes, and pad portions between adjacent unit laminates to electrically connect the respective connection electrodes of the unit laminates above and below the pad portions to each other.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Taek Jung Lee, Jin Kyung Joo, Hyo Youn Lee, Won Young Lee, Sung Kwon An, Jae Yeol Choi, Jin Man Jung
  • Patent number: 10340086
    Abstract: A multilayer ceramic capacitor may include: three external electrodes disposed on a mounting surface of a ceramic body to be spaced apart from one another. When a thickness of an active layer including a plurality of first and second internal electrodes disposed therein is defined as AT, and a gap between a first or second lead part of the first internal electrode and a third lead part of the second internal electrode is defined as LG, the following Equation may be satisfied: 0.00044?LG*log [1/AT]?0.00150.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: July 2, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Hwa Lee, Kyo Kwang Lee, Min Cheol Park, Young Ghyu Ahn, Sang Soo Park
  • Patent number: 10283269
    Abstract: A multilayer ceramic capacitor satisfies L?about 1.4 mm, about 1.1?L/W?about 1.6, e?about 0.10 mm, i/L>about 0.40 and i/g>about 2. L and W are maximum outer dimensions in length and width directions, e is a length direction distance along which a first or second end surface outer electrode located on a first side surface extends or along which the first or second end surface outer electrode located on a second side surface extends, g is a smallest distance among length direction distances between the first end surface outer electrode and a first or second side surface outer electrode and between the second end surface outer electrode and the first or second side surface outer electrode, and i is a distance on the side where g is among distances in the length direction along which the first and second side surface outer electrodes extend.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: May 7, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuo Fujii, Yohei Mukobata, Kotaro Kishi
  • Patent number: RE47950
    Abstract: A laminated inductor includes a component body that provides a mounting surface on one of its faces, and at least a pair of external electrodes are formed on the mounting surface, wherein the component body has a laminate constituted by multiple insulator layers, a spiral coil conductor formed in the laminate, and leader parts that electrically connect the coil conductor and external electrodes; the coil conductor comprises conductor patterns formed in the insulator layers and via hole conductors that penetrate through the insulator layers and electrically connect the multiple conductor patterns, and also has a coil axis running roughly in parallel with the mounting surface and a turn unit having one or more sides running roughly in parallel with the mounting surface; and the via hole conductors are formed only on the side farthest away from the mounting surface among the one or more sides.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: April 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Koji Ishii, Akihisa Matsuda, Yo Fujitsuna, Kazuhiko Oyama, Yasuyuki Taki