Abstract: When an electrode component is inserted into a through hole from one side and then rotated, parts of a conductive film are cut by a cutting blade. Another electrode component including a chip component whose one terminal is connected to an electrode of this electrode component is inserted into the through hole from the other side. When compression bonding is applied to the both electrode components so as to be joined together, an electrode of the former electrode component and the electrode of the latter electrode component are spread within the through hole with the pressure. The spread electrode of the former electrode component contacts a portion of the conductive film that is electrically connected to a front surface wiring, and the spread electrode of the latter electrode component contacts another portion of the conductive film that is electrically connected to a back surface wiring.

Abstract: A technique for increasing electronic component density on circuitry boards is disclosed. In one embodiment, the technique is realized as a method for increasing electronic component density on an electronic circuit board. The electronic circuit board has an electrically conductive signal layer formed on a dielectric layer, wherein the electrically conductive signal layer has a plurality of electrically conductive pads formed therein. The method comprises forming a cavity in the electronic circuit board extending through the electrically conductive signal layer and the dielectric layer.

Abstract: A multilayer module includes a first active layer with a first edge and second active layer with a second edge. Each active layer includes a flexible, polymer substrate, at least one electronic element, and a plurality of electrically-conductive traces which provide electrical connection from the respective edge to the electronic element of the active layer. The second active layer is adhered to the first active layer so that the first edge and second edge are aligned with each other thereby forming a side of the multilayer module. The multilayer module further includes a plurality of electrically-conductive lines along the side of the multilayer module, the lines providing electrical connection to the traces.

Abstract: The present invention relates to compact solid state silicon-based condenser microphone systems suitable for batch production. The combination of the different elements forming the microphone system is easier and more economical to manufacture compared to any other system disclosed in prior art. In addition the invention is compatible with electronic equipment manufacturing processes, such as SMD pick and place techniques. The invention uses a transducer chip comprising a chamber, a diaphragm that is positioned at the first lower surface and covering the second opening of the transducer chip. The transducer chip is flip-chip mounted onto a post-processed chip also comprising a chamber. The microphone system can be electrically connected to an external substrate by conventional techniques such as wire bonding.

Abstract: A circuit board assembly comprising a circuit board with a recessed end portion, and an optical transceiver module mounted on a daughter board. The daughter board is mounted on the circuit board so that a portion of the daughter board extends over the recess of the circuit board. The optical transceiver module mounted on the daughter board is then positioned in the recess of the circuit board.

Abstract: A method for forming a medium is provided. A base layer is provided. A material layer is provided with the material layer having a void. A transponder having a memory is positioned in the void. A medium is also provided. The medium has a base layer and a material layer joined to the base layer. The material layer has a void. A transponder having a memory is positioned in the void.

Abstract: A flexible printed circuit board, supports electronics components, wiring, mechanical and components of an electromechanical transducer also acts as a main structural member for the entire microsystem.

Abstract: In the surface mount typed electronic circuit of the invention, an insulating substrate has an inductance element formed in a conductive pattern whose end portions are connected to the second lands. A bare chip is superimposed on the insulating substrate, so as to respectively connect the first electrodes and the second electrodes to the first lands and the second lands. Therefore, since the inductance element is positioned below the bare chip, the length of the connecting conductor between the inductance element and the semiconductor circuit can be extremely shortened, and a high-Q electronic circuit, especially in high-frequency, can be provided.

Abstract: A chip-packaging substrate and test method therefor. The chip-packaging substrate includes at least one package area and a connection area enclosed by and connected to the package areas. A test circuit is arranged within the connection area, passing through at least two wire layers and the insulation layer therebetween. The test circuit electrically connects the first electrodes. Failure of the chip-packaging substrate is detected when the test circuit is open between any two electrodes.

Abstract: Electrical nets are prepared by bonding an electrically conductive element in a deleted plated via. The electrically conductive element has a headed portion that contacts the bottom of the laminate and the other end of the electrically conductive element electrically connects to a BGA pad or surface trace line.

Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

Abstract: A high-frequency composite component can achieve reduction in size and weight, while providing high performance. A portable wireless device incorporates the high-frequency composite component, including a multi-layer substrate, with a low noise amplifier LNA and a band pass filter BPF constituting parts of a high-frequency circuit, with an input terminal, an output terminal, and control terminals on the substrate. The low noise amplifier LNA is constituted of transistors, an inductor, capacitors, and resistors. The band pass filter BPF is constituted of strip lines, an inductor, and capacitors. The low noise amplifier LNA and the band pass filter BPF are connected with each other within the substrate via a matching capacitor. The amplifier ground and filter ground are separated within the substrate and connected respectively to separate ground terminals on the substrate.

Abstract: In a circuit board comprising multiple layers and having an integrated circuit mounted on the outer layer thereof, a main power supply plane and a sub-power supply plane, which is disposed in an island fashion with a clearance that terminates electric connection with the main power supply plane, are formed on the same layer. The main power supply plane and the sub-power supply plane are connected by first power supply patterns that are formed on a layer different from the layer on which the power supply planes are formed and to which bypass condensers are connected. Power supply to some power supply terminals is achieved via second power supply patterns that are connected to the sub-power supply plane. The leakage of noise from the power supply terminals connected to the second power supply patterns is controlled by the first power supply patterns. Through this construction, the EMI noise radiated from the circuit board can be reduced while minimizing the number of bypass condensers.

Abstract: An electronic package, such as an integrated circuit package, includes a cavity (310, 410 FIGS. 3, 4) on the back side of the package, which is the same side on which connectors (304, 408, FIGS. 3, 4) to a next level of interconnect are located. Within the cavity are contacts (312, 412, FIGS. 3, 4), which enable one or more discrete capacitors (302, 402, FIGS. 3, 4) to be electrically connected to the package. The package provides a very low vertical inductance path between the capacitors and an integrated circuit (314, FIG. 3) mounted on the front side of the package.

Abstract: A multilayer ceramic substrate with a cavity includes a multilayer composite member including a plurality of ceramic layers disposed one on another. A cavity is formed in the multilayer composite member such that an opening of the cavity is located in one principal surface of the multilayer composite member. A bottom-surface conductive film is disposed on the bottom surface of the cavity. A capacitor conductive film is disposed in the multilayer composite member such that the capacitor conductive film faces the bottom-surface conductive film via one of the ceramic layers, thereby forming a capacitor.

Abstract: A signal transmitting lead 105 is provided on an electrically insulating layer 103. Auxiliary leads 104A and 104B are provided while the auxiliary leads 104A and 104B are not in electrical contact with the signal transmitting lead 105. At least a part of the auxiliary leads 104A and 104B is covered with an electromagnetic shielding layer 106. Consequently, radiant noise from the inside or the outside of a printed wiring board can be suppressed without degrading characteristics of a signal which is transmitted through the signal transmitting lead 105.

Abstract: The specification describes a multi-chip IC package in which IC chips are flip-chip bonded to both sides of a flexible substrate. The upper (or lower) surface of the flexible substrate is bonded to a rigid support substrate with openings in the support substrate to accommodate the IC chips bonded to the upper (or lower) surface of the flexible substrate. In a preferred embodiment a plurality of IC memory chips are mounted on one side of the flexible substrate and one or more logic chips to the other. A very thin flexible substrate is used to optimize the length of through hole interconnections between the memory and logic devices. If logic chips are flip-chip mounted in the cavity formed by the openings, a heat sink plate can be used to both cap the cavity and make effective thermal contact the backside of the logic chips.

Abstract: An output of a voltage regulator is a core voltage line that runs adjacent to a die attach area on a packaging substrate. An input of the voltage regulator is typically coupled to a power supply which, in one embodiment, is also an I/O voltage line that runs adjacent to the die attach area. In one embodiment, the core voltage line is shaped as a ring encircling the die attach area on the packaging substrate. In another embodiment, the I/O voltage line is also shaped as a ring encircling the die attach area on the packaging substrate. Further, a semiconductor die having at least one I/O Vdd bond pad and at least one core Vdd bond pad can be mounted in the die attach area. The I/O Vdd bond pad and the core Vdd bond pad can be connected, respectively, to the I/O voltage ring and the core voltage ring.

Abstract: A module board has embedded chips and components. A substrate has at least one large cavity and at least one small cavity, in which the large cavity passes through the substrate and a passive component is set in the small cavity. A heat-dissipation sheet is set at the bottom of the substrate. A first adhesion layer bonds the bottom of the substrate to the heat-dissipation sheet. At least one IC chip is fixed in the large cavity of the substrate by a second adhesion layer. A dielectric filling layer covers the entire surface of the module board and fills all gaps, in which the dielectric filling layer has a plurality of micro vias to expose partial areas of the IC chip, the passive component and the substrate. At least one wiring pattern layer is formed on the dielectric filling layer and provide electrical connection among the IC chip, the passive component, and the substrate.

Abstract: A method and apparatus for trimming a discrete surface-mounted component or a component integrated in a substrate including providing a trimmable structure mounted on the surface of a substrate for each component to be trimmed. In an exemplary embodiment, the component to be trimmed is a capacitor. In another exemplary embodiment, the trimmable structure is one electrode of a trimmable capacitor whose other electrode is integrated in the substrate, and the trimmable capacitor is connected in parallel with a surface mounted capacitor to be trimmed.

Abstract: A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material and joined together to form a frame around an area substantially the same as the area of the components board. A plurality of metal pins are located in the frame, each having one end extending from said frame such that these ends can be soldered to the components board concurrently with the solder attachment of the components to the board. The other ends of the pins can be formed so that they are adjusted for either through-hole attachment to circuit boards, or for surface mounting.

Abstract: A stacked radio-frequency module is formed by stacking packages each storing MMICs and mounting another package upside down which stores a control circuit for controlling MMICs. The MMICs and control circuits are each sealed by a metal sealing lid within the cavity of each of the packages which are spatially completely separated from each other. Each of the pads for wiring paths for radio-frequency signals and for power supply/control signals and ground pads are provided within each package and at opposing surfaces of packages to be stacked with corresponding pads joined by a gold bump.

Abstract: A circuit board (1) is provided upon which a predetermined number of semiconductor elements (5a, 5b, 6), including at least a field-effect transistor for charge and discharge, are mounted. A predetermined number of passive elements (7, 8a˜8c, 9a˜9g) are also mounted onto the circuit board. The semiconductor elements (5a, 5b, 6) are mounted facedown as bare chips on the circuit board (1).

Abstract: An IC card includes a first support; a second support; an IC module including an IC chip, a reinforcing structural member neighboring to the IC chip and an antenna; the IC module providing between the first and second supports; a first adhesive layer provided between the first support and the IC chip; and a second adhesive layer provided between the first support and the IC chip. The IC card has a rebound coefficient (h/h0) of 0.52 to 0.70, where h0 is a dropping height from which a steel ball is dropped onto the IC card and h is a rebound height to which the steel ball rebounds from the IC card.

Abstract: A ceramic electronic component includes a ceramic sintered compact containing about 35 to 80 volume percent pores and an electrode provided inside the ceramic sintered compact. The pores are filled with resin or glass. This ceramic electronic component is formed by forming a green compact which includes an electrode therein with a ceramic compound comprising a ceramic raw material, a binder and a spherical or granular combustible material having adhesiveness to the binder. The green compact is fired to form the ceramic sintered compact including the electrode and containing about 35 to 80 volume percent pores. The pores of the ceramic sintered compact are filled with resin or glass.

Abstract: A multi-layer printed circuit board (PCB) has a plated through hole for receiving a pin of a component. The plated through hole passes through all layers of the PCB and includes a first conductive portion on a first surface of the PCB and a second conductive portion on a second surface of the PCB. At least one layer of the PCB includes a planar conductive material disposed over a planar insulating material. The conductive material surrounds the plated through hole and is separated therefrom by a gap.

Abstract: A module (1) for contactless communication includes a plurality of electrical components (4, 5, 6, 7, 8) which each have at least two contact faces (9, 10, 11, 12, 13, 14, 15, 16) for the electrical connection. The electrical components (4, 5, 6, 7, 8) of the module are mounted both on a component side (MB) and an on adhesive side (MK) of a lead frame (M) formed by metal strips (MS). During the manufacture of the module (1) the metal strips (MS) of the lead frame (M) are held in one plane (E) and in position by means of an adhesive tape (K). The adhesive tape (K) has openings (A1, A2, A3, A4, A5, A6) at given positions of the lead frame (M) so as to enable electrical components to be mounted on the adhesive side (MK) of the lead frame (M).

Abstract: A memory module structure of the invention is used for being assembled on a locking device. The memory module includes a substrate and a plurality of memories. The substrate has certain long sides and short sides. Notches are formed on the short sides for being secured by the locking device. Each of the plurality of memories has a suitable length and width. Some memories of the plurality of memories are transversely mounted on the substrate with respect to the substrate. The other memories of the plurality of memories are longitudinally mounted on the substrate with respect to the substrate. According to this structure, it is possible to suitably arrange a plurality of memories on the substrate so as to increase the memory capacity of the memory module.

Abstract: A hermetic package for an electronic device, such as a surface acoustic wave (SAW) device and a method of manufacturing the same. In one embodiment, the package includes: (1) a device substrate having: (a) an active region containing an electrically conductive pattern that constitutes at least a portion of the device, (b) a contact region surrounding the active region and containing bond pads that are electrically coupled to the pattern and (c) a bonding region surrounding the active region, (2) a non-porous mounting substrate having a bonding region thereon and a footprint smaller than a footprint of the device substrate and (3) a bonding agent, located between the bonding region of the device substrate and the bonding region of the mounting substrate, that bonds the device substrate to the mounting substrate to enclose the active region proximate a void between the device substrate and the mounting substrate, the contact region remaining exposed.

Abstract: A required interlayer circuit board 1 is constituted so as to provide a punched portion in which only a collapsible cable portion 2 for connecting a plurality of component mounting portions to each other is exposed. An external layer board 6 is superimposed on at least one side of the internal layer circuit board 1 through an adhesive member 4 to which an opening portion 5 is formed at a position corresponding to the cable portion 2, the external layer substrate 6 having an opening portion 7 at a similar position. Thereafter, a wiring pattern for the component mounting portions is formed on the external layer board 6, and a blank and pierce process of the respective component mounting portions except the cable portion is carried out, thereby integrally connecting a plurality of the component mounting portions to each other through the collapsible cable portion.

Abstract: An RF amplifier module includes PC boards laminated atop a bottom conductor plate. The boards include an RF semi-conductor amplifier chip mounted in a well extending to the bottom plate disposed in electrical connection with the chip.

Abstract: An electrical apparatus comprises a circuit board, providing an electrolytic condenser and electrical components, and a housing. The housing accommodates the circuit board. The electrical components include resin containing one or more halogen compounds of about 1% by weight or less in terms of bromine (Br).

Abstract: A method including routing a signal from a memory device on an integrated circuit in a package to a memory module, and returning the signal to a reference line in the package between the memory module and the integrated circuit. Also, a method including providing a memory module including at least one memory package configured for electrically coupling to a bus on a system board, the at least one memory package comprising an integrated circuit including a plurality of memory devices, and a package substrate including a surface having a plurality of externally accessible contact points coupled to the memory devices and an externally accessible reference signal line and a surface of the package, and tuning the electrical characteristics of the memory package using an electrical potential between the contact points and the reference signal line.

Abstract: A circuit component built-in module of the present invention includes an insulating substrate formed of a mixture comprising 70 wt % to 95 wt % of an inorganic filler and a thermosetting resin, a plurality of wiring patterns formed on at least a principal plane of the insulating substrate, a circuit component arranged in an internal portion of the insulating substrate and electrically connected to the wiring patterns, and an inner via formed in the insulating substrate for electrically connecting the plurality of wiring patterns. Thus, a highly reliable circuit component built-in module having high-density circuit components can be obtained.

Abstract: A multi-chip device which includes a plurality of integrated circuit die disposed one over another. Each integrated circuit die includes one or a plurality of bond pads. One or a plurality of conductors are disposed to electrically couple the bond pads of vertically adjacent integrated circuit die. Each conductor is designed, calculated, specified and/or predetermined to have a length so as to behave as a segment in a multi-drop transmission line. The multi-drop transmission line may be terminated at one end or utilized in a flow-through approach. In one embodiment, an integrated circuit die may be horizontally offset with respect to a vertically adjacent integrated circuit die to expose the periphery region. In another embodiment, each integrated circuit die may be stacked and aligned in a vertical column. In this embodiment, a spacer such as a thermally conductive spacer is disposed between each integrated circuit die in the stack.

Abstract: A printed circuit board and method for reducing the impedance within the reference path and/or saving space within the printed circuit board. In one embodiment of the present invention, a printed circuit board comprises a plurality of conductive layers. The printed circuit board further comprises two or more vias for interconnecting two or more conductive layers. The printed circuit board further comprises an electrical component embedded in a particular via between two conductive layers to reduce the impedance within the reference path and/or save space within the printed circuit board.

Abstract: An installation vertical groove (13) is formed in a circuit member-installing surface (12) of a resin-molded panel (11). Then, a flat circuit member (14) is inserted into the installation vertical groove, so that the flat circuit member is installed in such a manner that this flat circuit member stands in a direction perpendicular to the circuit member-installing surface. The installation vertical groove has opposed surfaces which are spaced from each other by a distance, corresponding to a thickness of the flat circuit member and are disposed perpendicularly to the circuit member-installing surface, and this installation vertical groove is formed to be disposed below the circuit member-installing surface.

Abstract: There is presented a high frequency module, in which a recess 2a for mounting power amplifier device is formed on a lower surface of a dielectric substrate 2, and a recess 2b for mounting surface acoustic wave filter is formed on an upper surface of the dielectric substrate 2, and a power amplifier device 4 and a surface acoustic wave filter 8 are mounted through conductive bumps 3a and 3b on the recesses 2a and 2b, respectively. In addition, a through-hole conductor 11 whose one end is exposed at the lower surface of the dielectric substrate 2 is provided between the recesses 2a and 2b. The exposed end of the through-hole conductor 11 is attached to a thermal dissipation conductor 15 on an upper surface of an external electric circuit board 7 through a brazing material 13.

Abstract: A sensor mount assembly including a housing, fastener and a lever mechanism. The housing contains a sensor having two electrical leads and includes an integral flange adapted to receive a fastener. The fastener includes a body and a head. The body is received in the flange to secure the housing to a mount. The lever mechanism is proximate the flange and includes a contact block and a conductor. The contact block is acted upon by the fastener head to move the lever mechanism and, hence the conductor, between a first position and a second position. The first position corresponds to an unmounted sensor and creates a short circuit condition between the two electrical leads. The second position corresponds to a properly mounted sensor and creates an open circuit between the two electrical leads such that the electrical circuit path of the overall system includes the sensor within the housing.

Abstract: A thermally enhanced IC chip package has a dielectric substrate member with conductive circuit patterns on top and bottom surfaces thereof and an opening therethrough. An IC chip having active and inactive sides is received in the opening. The active side of the chip and the top surface of the substrate face to a same direction and electrically connect each other. A thermally and electrically conductive adhesive layer is disposed on the inactive side of the chip and the bottom surface of the substrate in a completely enclosing shape around the opening. A thermally and electrically conductive planar member is attached to the thermally and electrically conductive adhesive layer. A molding material encapsulates the chip, the opening and the top surface of the substrate.

Abstract: An electronic component includes a laminate having a structure in which an element substrate and a sealing substrate are bonded to each other through an adhesive layer, a terminal electrode is arranged on the element substrate so as to be exposed at an end surface of the laminate, an outside electrode is disposed on the outer surface of the sealing substrate, the terminal electrode and the outside electrode are electrically connected to each other through an end surface electrode disposed on the end surface of the laminate, and the thickness of the end surface electrode is between about one half of the thickness of the adhesive layer and about five times of the thickness thereof.

Abstract: The idea of the invention is to form a cavity in a multilayer substrate at the point of the structure to be trimmed. This enables the embedding of tolerance critical components inside substrates, such as printed circuit boards, modules, and sub-systems. Trimming is done through the cavity using, for example, a laser. After trimming the cavity is easy to fill in with a suitable dielectric material, or to cover otherwise, e.g. by using a lid, or to leave the cavity uncovered.

Abstract: A system for reducing an apparent height of a board system is provided. The board system may include, for example, a carrier, a component, a printed circuit board and/or a solder material. The component is mounted on a first side of the carrier. The printed circuit board has a hole that is structured to accommodate the component. The solder material solders the carrier to the printed circuit board and provides a structural bond between the carrier and the printed circuit board. At least one portion of the solder material provides an electrical coupling between the carrier and the printed circuit board and at least one portion of the component is maintained in the hole after the carrier is soldered to the printed circuit board.

Abstract: A decorative device includes a decorative laminate for providing luminescence and a driving element for powering and controlling the decorative laminate to provide various ways of luminescence. The decorative laminate includes a first electrode layer, a second electrode layer, a light-emitting layer sandwiched between the electrode layers, a decorative layer covering the first electrode layer, and a protective layer attached to the second electrode layer. The decorative laminate includes a plug connected with a number of wires extended therefrom. The driving element includes a socket for engagement with the plug. The driving element includes a power control unit for providing various voltages to the decorative laminate, a logical control unit for transforming physical conditions into signals, and a central control unit. The central control unit receives the signals from the logical control unit in order to instruct the power control unit to provide various voltages to the decorative laminate.

Abstract: Methods and apparatuses for an electronic assembly. The electronic assembly has a first object created and separated from a host substrate. The first object has a first electrical circuitry therein. A carrier substrate is coupled to the first object wherein the first object is being recessed below a surface of the carrier substrate. The carrier substrate further includes a first carrier connection pad and a second carrier connection pad that interconnect with the first object using metal connectors. A receiving substrate, which is substantially planar, including a second electrical circuitry, a first receiving connection pad, and a second receiving connection pad that interconnect with the second electrical circuitry using the metal connectors. The carrier substrate is coupled to the receiving substrate using the connection pads mentioned.

Abstract: A method of packaging a device is disclosed. In one embodiment, a substrate including a common voltage plane and a mounting region is provided, with the device mounted to the mounting region. An electrically conductive dam structure is disposed on the surface of the substrate with the electrically conductive dam structure being electrically coupled to the common voltage plane and circumscribing a perimeter of the mounting region. An electrically insulating encapsulant at least partially fills a pocket defined by the substrate and the electrically conductive dam structure, the electrically insulating encapsulant contacting the electrically conductive dam structure. An electrically conductive encapsulant is provided that overlies the electrically insulating encapsulant, the electrically conductive encapsulant being coupled to the electrically conductive dam structure.

Abstract: A new physical design for electronic devices (100) comprises a multi-layer stacked assembly (104-110) of a plurality of pan-shaped conductive units that form the layers of the assembly. Each unit is preferably formed from a single sheet of metal into which electronic components, such as an antenna array (208) or a filter array (314) of a transceiver, have been stamped, cut, or etched, and which is then bent around its periphery to form a pan shape. The pans are oriented to face the same direction, are stacked one on top of another, and are fixedly attached to each other by weld, solder, or adhesive. The electrical components defined by the different units are electrically interconnected in a connectorless manner, preferably by flanges (122, 124) formed in the same sheets of metal as the units themselves and extending between the units. Adjacent units in the stack define electromagnetically isolated chambers, e.g., for the filter array. Some layers perform double duty, e.g.

Abstract: A multi-chip module (MCM) having a substrate including a first surface, a second surface and a multi-layer interconnection arrangement disposed between the two surfaces. A high-density thin-film circuit region is provided on the substrate first surface to interconnect a plurality of integrated circuit chips and the multi-layer interconnection arrangement. The integrated circuit chips are powered through the high-density thin-film circuit region, which receives power from the multi-layer interconnection arrangement. A plurality of discrete on-board voltage converter devices, mounted on at least one substrate surface, provide uniform power supply distribution to multi-layer interconnection arrangement power planes, converting an MCM input voltage and current to a relatively lower output voltage and a relatively higher output current.

Abstract: A multi-layer circuit board comprises: an insulating layer having upper and lower surfaces thereof, and wiring patterns arranged on the upper and lower surfaces of the insulating layer. A ferroelectric layer has a dieletric constant larger than that of the insulating layer and has upper and lower surfaces. The ferroelectric layer is arranged in the insulating layer in such a manner that the upper and lower surfaces of the ferroelectric layer coincide with the upper and lower surfaces of the insulating layer, respectively. A pair of electrode films are formed on the upper and lower surfaces of the ferroelectric layer, respectively, to define a capacitor incorporated in the multi-layer circuit board.

Abstract: A pad structure for semiconductor package. A printed circuit board with solder lands formed on predetermined locations are provided. First circular pad portions are formed protruding laterally on upper surfaces of the solder lands. Second circular pad portions are formed protruding laterally from other lateral sides of the pads. The leads are secured to the pads of the semiconductor package so that when the first and second circular pad portions are pushed laterally, the circular pad portions do not contact each other, preventing short circuits.