Abstract: A microelectronic substrate, a method of forming the same, and a system including the same. The microelectronic substrate comprises: a conductive layer; a spacer layer disposed onto the conductive dielectric layer; a dielectric build-up layer disposed onto the spacer layer, the spacer layer being made of a material that has a lower shrinkage than a material of the embedding dielectric-build-up layer during curing, and a higher viscosity than a material of the embedding dielectric build-up layer in its pre-cure form and during curing; and active or passive microelectronic components embedded within the dielectric build-up layer.

Abstract: An electronic control apparatus includes an exclusive power source line for a charge pump circuit which is discriminated from a common power source line. The exclusive power source line is connected to the common power source wiring via a via-hole va having an impedance larger than that of the exclusive source line. Similarly, the electronic control apparatus includes an exclusive ground line for the charge pump circuit which is discriminated from a common ground line. The exclusive ground line is connected to the common ground via an additional via-hole vb. Furthermore, a noise-suppressing capacitor C is connected between the exclusive power source and around lines.

Abstract: An electronic device with a reworkable electronic component, a method of manufacturing the electronic device, and a method of reworking the electronic component are disclosed. The electronic device includes a first cavity provided in a board body. A first metal pattern is provided on the board body and adjacent to the first cavity. A first electronic component is provided in the first cavity. A first connection pattern is provided adjacent to an upper edge portion of the first electronic component and extends to the first metal pattern so that the first metal pattern is electrically connected to the first electronic component.

Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. Conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: Disclosed is a PCB including an embedded passive component and a method of fabricating the same. The PCB includes at least two circuit layers in which circuit patterns are formed. At least one insulating layer is interposed between the circuit layers. A pair of terminals is vertically formed through the insulating layers, plated with a first conductive material, and separated from each other by a predetermined distance. The embedded passive component is interposed between the terminals and has electrodes formed on both sides thereof. The electrodes are separated from the terminals by a predetermined distance and electrically connected to the terminals through a second conductive material.

Abstract: Components having different heights are installed in a multilayer substrate using a metal core layer formed by bonding a plurality of metal layers. The metal core layer includes through-holes and a spot-faced portion. Passive components and an active component are disposed in the through-holes and the spot-faced portion, respectively. These components are connected to conductive patterns formed on wiring layers, with connecting vias therebetween. Contact faces of each component with the connecting vias are controlled so as to be disposed at the same level with the metal layers.

Abstract: In one embodiment, a computer system comprises at least one input/output device, and a motherboard designed in compliance with an ATX form factor standard and comprising eight slots to receive input/output cards.

Abstract: A versatile multi-layer electronic part built-in board compatible with different external circuits to be connected thereto is provided. Sensors are connected to a connector through connection lines that are connected to electronic parts. The electronic parts are directly connected to the connector and can be mounted on the top layer, the bottom layer or both the top and bottom layers of the multi-layer electronic part built-in board. When the sensor to be connected, for example, is changed to another having a different characteristic, an electronic part mounted on the top and bottom layers correspondingly to the sensor can be changed.

Abstract: Disclosed are a multi-layer PCB and a fabricating method thereof. The multi-layer PCB includes: a core; a plurality of insulation layers and a plurality of conductive pattern layers alternatively stacked on both sides of the core; and a plurality of via holes formed through the core and the insulation layers. The fabricating method may includes the steps of: forming a conductive pattern layer on each of both sides of a core, and forming via holes through the core; attaching a double-stick tape with weak adhesive strength to a portion of each of a upper surface and a lower surface of the core; and forming an insulation layer on each of a upper surface and a lower surface of the core to cover the double-stick tapes, and forming a conductive pattern layer on each of the insulation layers.

Abstract: A multilayer circuit board has a bottom and an upper multilayer circuit boards, a glue layer, multiple outer contact vias and two insulating lacquer layers. The bottom and the upper multilayer circuit boards respectively have multiple conductive wires, an insulating layer, a frame, multiple chips, a press laminate, a patterned conductive layer and at least one inner contact via. The glue layer sticks the bottom and the upper multilayer circuit boards together. The multiple contact vias are formed through the bottom and the upper multilayer circuit boards to electronically interconnect the conductive wires and the patterned conductive layers in the bottom and the upper multilayer circuit boards. The insulating lacquer layers are respectively coated under and on portions of the patterned conductive layers in the bottom and the upper multilayer circuit boards to protect the patterned conductive layers, wherein the un-coated patterned conductive layers become multiple contacts.

Abstract: A method of manufacturing a circuit board, which includes a bump pad on which a solder bump may be placed, may include forming a solder pad on a surface of a first carrier; forming a metal film, which covers the solder pad and which extends to a bump pad forming region; forming a circuit layer and a circuit pattern, which are electrically connected with the metal film, on a surface of the first carrier; pressing the first carrier and an insulator such that a surface of the first carrier and the insulator faces each other; and removing the first carrier. Utilizing this method, the amount of solder for the contacting of a flip chip can be adjusted, and solder can be filled inside the board, so that after installing a chip, the overall thickness of the package can be reduced.

Abstract: A circuit board assembly having a laminate construction of multiple layers, such as a LTCC ceramic substrate, with conductor lines between adjacent pairs of layers. A heat sink is bonded to a first surface of the substrate, and a cavity is defined by and between the heat sink and the substrate such that a base wall of the cavity is defined by one of the layers with conductor lines thereof being present on the base wall. A surface-mount circuit device is received within the cavity, mounted to the base wall, and electrically connected to the conductor lines on the base wall. The device is received within the cavity such that a surface of the device contacts a surface region of the heat sink. The surface of the device is bonded to the surface region of the heat sink to provide a substantially direct thermal path from the device to the heat sink.

Abstract: The present invention relates to a high frequency module board device having a high frequency transmitting and receiving circuit for modulating and demodulating a high frequency signal. The high frequency module board device comprises a base board (2) whose main surface is formed as a build-up surface (2a) and a high frequency circuit part (3) formed on the build-up surface of the base board (2) and having passive elements formed. The base board (2) has an area (29) in which wiring is not formed in a lower layer from a fourth wiring layer (8b). The high frequency circuit part (3) has an upper electrode part (36) and a lower electrode part (35) in positions corresponding to the area (29) in which the wiring is not formed. Thus, since a capacitance (18) is provided just above the area (29) in which the wiring is not formed, a parasitic capacity that the capacitance (18) receives from ground patterns (14) is reduced. Accordingly, the characteristics of the capacitance (18) can be improved.

Abstract: Power conversion apparatus includes a circuit board with power conversion circuitry and a package having an upper portion and a lower portion that respectively enclose circuitry on a top surface and a bottom surface of the circuit board. The lower portion encloses a smaller region than that enclosed by the upper portion. The regions are arranged to define an overhang region on the bottom surface of the circuit board. Interface contacts are provided on the bottom surface in the overhang region for making electrical connections to the circuit board. A thermal extender includes a surface for mounting a heat dissipating power converter and a surface for mating with an external circuit board. Interface conductors mate with contacts on the power converter and with conductive regions on the external circuit board. A heat sink is thermally coupled to remove heat generated by the power converter.

Abstract: A printed circuit board and a method for imbedding a battery in the printed circuit board are disclosed. The method includes connecting the battery to a first inner pad and a second inner pad on an inner core layer and forming a first battery contact between a first outer pad and the first inner pad. The method also includes electrically isolating the first battery contact and forming a second battery contact between a second outer pad and the second inner pad.

Abstract: An apparatus for improved grounding and heat transfer between flange mount field effect transistors and printed wiring boards is provided comprising a cut-out formed in the printed wiring board, extending between its top and bottom surfaces, defining an edge which is covered or plated with a conductive material at least in some areas. One or more vias also extend between the top and bottom surfaces of the cut-out and are exposed along the edge. A field effect transistor is placed in the cut-out and into contact with a heat sink element designed to enhance grounding of the field effect transistor and improve the transfer of heat to the chassis or other metal support structure for the printed wiring board.

Abstract: Disclosed is a method of fabricating a PCB including an embedded passive component and a method of fabricating the same and a method of fabricating the same. The PCB includes at least two circuit layers in which circuit patterns are formed. At least one insulating layer is interposed between the circuit layers. A pair of terminals is vertically formed through the insulating layers, plated with a first conductive material, and separated from each other by a predetermined distance. The embedded passive component is interposed between the terminals and has electrodes formed on both sides thereof. The electrodes are separated from the terminals by a predetermined distance and electrically connected to the terminals through a second conductive material.

Abstract: Provided is a microwave and millimeter wave transceiver package technology that can unify the transceiver composed of an amplifier, a filter and a mixer into a low temperature co-fired ceramic (LTCC) module package by using an LTCC method utilizing a multilayer dielectric substrate, thereby achieving miniaturization, a loss reduction and moderate price. The transceiver includes a plurality of cavities arrayed in a multilayer substrate, an amplifier and a mixer mounted in the cavities and a filter provided with a strip line between the amplifier and the mixer.

Abstract: Inner layer traces on a multilayer printed wiring board are exposed to enable direct interconnection with another device such as a printed wiring board. The traces may be exposed by removing at least some of the dielectric substrate material around the traces, or by extending the traces beyond the other layers of the printed wiring board. Corresponding conductors associated with the other device are placed in direct physical contact with the exposed inner layer traces, and may be aligned and secured with guide plates, alignment pins and spring members. Such direct connection mitigates the need for vias, and has more favorable electrical characteristics for high frequency signal transmission.

Abstract: A method and system for reducing the release of high frequency electromagnetic energy into the environment is disclosed, wherein local regions of distributed capacitance are embedded within a printed circuit board (PCB) and adjacent the PCB conductive traces act as low pass filters and thus increase the rise and/or fall times occurring on such traces. The present invention increases very short rise and/or fall times (e.g., 200 picoseconds or less) without degrading or detrimentally affecting other signal characteristics. The present invention does not substantially affect the voltage amplitude and does not affect the bit period when lengthening the rise and/or fall time. Also, the present invention does not induce any timing jitter that may cause synchronization problems within the system.

Abstract: To provide a component built-in wiring board and a manufacturing method thereof capable of further improving component mounting density without deteriorating reliability.

Abstract: A motor driving system includes an AC power supply 1, an AC reactor 2, a power converter 3 and a motor 4. A microsurge suppressor 5 is inserted on a power supply line from the power converter 3 to the motor 4 and the similar microsurge suppressor 6 is inserted on a power supply line from the AC reactor 2 to the power converter 3. The microsurge suppressor 5 includes a multi-layer printed wiring board having two terminals connected to the power converter 3 and the motor 4 and a capacitor for bypassing a surge, and the terminal 4 on the side of the motor of the multi-layer printed wiring board is directly connected to a terminal of the motor 4. The capacitor for bypassing a surge is connected between the terminal of the motor 4 and the end on the side of a second terminal of second wiring.

Abstract: A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said conductor layers on at least one of said first and second main surfaces; via conductors as defined herein; a signal through-hole as defined herein; a signal through-hole conductor as defined herein; a first path end pad as defined herein; a second path end pad as defined herein; a shield through-hole as defined herein; and a shield through-hole conductor as defined herein; wherein: a signal transmission path is formed as defined herein; at least one of said conductor layers is disposed on each of said first and second main surface sides; said surface conductor on said first main surface side and said conductor line form a strip line, a microstrip line, or a coplanar waveguide with constant characteristic impedance Z0; an inner surface of said shield through-hole is covered with said shield through-hole conductor; and an in

Abstract: A circuit board assembly having at least a passive component and a stack structure of the circuit board are disclosed, including: a carrier board formed with a through opening for receiving a semiconductor component having an active surface on which electrode pads are formed; a dielectric layer formed on the carrier board and the semiconductor component and formed with openings to expose the electrode pads; a circuit layer formed on the dielectric layer and having conductive structures formed in the openings of the dielectric layer for electrically connecting the electrode pads, and a plurality of lands for mounting at least one passive component electrically connected to the circuit layer; and a circuit build-up structure formed on the dielectric layer, the circuit layer and the passive component, with conductive structures formed for electrically connecting the circuit layer.

Abstract: A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers.

Abstract: There is provided a multilayer printed wiring board including semiconductor element therewithin, which can realize high density wiring. A multilayer printed wiring board 1 includes a first printed wiring board 10 having a semiconductor element 2 mounted on a wiring pattern 12, a second printed wiring board 21 laminated on the wiring pattern 12 through a first insulating layer 20, a third printed wiring board 31 laminated on the second printed wiring board 21 through a second insulating layer 30, and a space region penetrating through the first insulating layer 20 and the second printed wiring board 21 in the thickness direction and adapted so that the semiconductor element 2 can be accommodated therewithin.

Abstract: A multilayer ceramic capacitor (10) having reduced inductance which is separated into a first layer body (11) and a second layer body (12). The first layer body (11) and the second layer body (12) are formed by alternately layering inner electrodes (inner electrode 13a, inner electrode 13b) so as to face each other and sandwich ceramic layers (14). The ceramic layers (14) of the second layer body (12) are thicker than the ceramic layers (14) of the first layer body (11), so as to compensate for electrode height difference. Moreover, in the second layer body (12), the inner electrodes (13b) are electrically connected by via electrode (15b) so that the part of the via electrode (15b) extending without connection to an inner electrode (13b) is shortened.

Abstract: A high density memory card assembly having application for USB drive storage, flash and ROM memory cards, and similar memory card formats. A cavity is formed through a rigid laminate substrate. First and second digital memory devices (e.g., TSOP packages or bare semiconductor dies) are located within the cavity so as to be recessed relative to the top and bottom of the substrate. The recessed first and second memory devices are arranged in spaced, face-to-face alignment with one another within the cavity. The first and second memory devices are covered and protected by respective first and second memory packages that are located on the top and bottom of the substrate. By virtue of the foregoing, the memory package density of the assembly can be increased without increasing the height or area consumed by the assembly for receipt within an existing external housing.

Abstract: More compact, thinner, shorter and lighter surface-mounted electronic component modules and their manufacturing methods at low costs, thus making them industrially highly valuable are available. Such the component includes a wiring substrate having wiring patterns formed on one side and external connection terminals formed on the other side, the wiring patterns and the external connection terminals being connected with each other by via holes or through holes; a plurality of electronic component devices mounted on the one side of the wiring substrate; and an exterior resin layer formed on the wiring substrate which covers the plurality of electronic component devices, wherein at least one of the plurality of electronic component devices is fastened face up to the one side of the wiring substrate, the connection terminal of the electronic component device fastened face up and the wiring pattern or the connection terminal of another electronic component device being connected with each other by wire.

Abstract: The invention relates to an electrical circuit arrangement (3) having electrical and/or electronic components (4). The components (4) are arranged on a mount substrate (5). The conductor tracks (6) for electrical connection of the components (4) are also located on the mount substrate (5). The mount substrate (5) comprises a metal part (7). An electrically insulating coating (9) is applied to one surface (8) of the metal part (7), to be precise in particular to that surface (8) which faces the components (4) and the conductor tracks (6). At least one component (4) and/or at least one conductor track (6) are/is located on the coating (9).

Abstract: An apparatus for buffering power transients in a supply power for expansion cards inserted into expansion slots on a computer motherboard. The apparatus comprises a printed circuit board, a connector on the printed circuit board, and at least one capacitor on the printed circuit board. The connector is configured to fit into one of the expansion slots on the motherboard, and comprises at least one power pin and at least one ground pin. The at least one capacitor is connected to the power and ground pins of the connector and has sufficient capacitance to buffer power transients within the supply power to the expansion slots.

Abstract: The present invention provides a thin-film embedded capacitance having a substantial electrostatic capacity per unit area, and a method for manufacturing thereof. A thin film embedded capacitance comprising: a metallic thin-film for wiring made of a metallic material in a non-yield state; the first electrode formed on the film for wiring; a dielectric material layer formed on the first electrode and the film for wiring, at a temperature not lower than ordinary room temperature to lower than a yield temperature of the film for wiring, having a coefficient of thermal expansion lower than that the film for wiring; and the second electrode formed on the dielectric material layer, and a method for manufacturing thereof.

Abstract: A circuit board assembly includes an electrical component mounted on or in the assembly; a conductive layer, which is electrically connected to the electrical component; a high-temperature dissipation resin, which is of insulating material and is arranged so as to dissipate heat generated in the assembly; and a molding resin surrounding the electrical component. Heat, generated at electrical components in a circuit board assembly, is transferred and dispersed through the high-temperature dissipation material all over the assembly. Further, since the high-temperature dissipation resin is of an insulating material, it is unnecessary to consider a short-circuit problem in the assembly.

Abstract: A printed circuit board has separate first, second and third sections arranged in a predetermined direction. A connector is mounted at the first section. A noise cut filter is mounted at the second section and connected to the connector. An electronic circuit component is mounted at the third section and connected to the noise cut filter. An electrically conductive power source layer is formed within the printed circuit board at a position outside a peripheral section adjacent the second section. The noise cut filter is allowed to operate without receiving any influence of noise from the power source layer. Noise is sufficiently removed at the noise cut filter. Noise is suppressed to the utmost in electric signals in the connector. Radiation of noise is reliably reduced at the connector. Electromagnetic interference can be suppressed.

Abstract: A multi-layer printed circuit board includes: a resin substrate including a plurality of laminated thermoplastic resin films; a thin film resistor embedded in the resin substrate; and an electrode disposed on the thin film resistor. The thermoplastic resin film includes a conductive pattern made of metallic film. The electrode is covered with the conductive pattern disposed over or under the electrode.

Abstract: The present invention provides a multilayered power supply line suitable for use in a semiconductor integrated circuit and a layout method thereof. In the multilayered power supply line (10) for the semiconductor integrated circuit, a top metal (12) and a second metal (14) are electrically connected to each other by through holes (18). Further, a capacitor metal (16) is electrically connected to the top metal (12) by through holes (20) to thereby make the top metal (12), the second metal (14) and the capacitor metal (16) identical in potential to one another, whereby the multilayered power supply line functions as a power supply line based on normal wiring metals without functioning as a capacitor. It is thus possible to supply power with reduced impedance.

Abstract: A multilayer substrate assembly (80) includes at least one embedded component (52) within a plurality of stacked pre-processed substrates. Each pre-processed substrate can have a core dielectric (14), patterned conductive surfaces (12 and 16) on opposing sides of the core dielectric, and at least one hole (18) in each of at least two adjacently stacked pre-processed substrates such that at least two holes are substantially aligned on top of each other forming a single hole (19). The assembly further includes a processed adhesive layer (48) between top and bottom surfaces of respective pre-processed substrates. The embedded component is placed in the single hole and forms a gap (67 & 66) between the embedded component and a peripheral wall of the single hole. When the assembly is biased, the processed adhesive layer fills the gap to form the assembly having the embedded component cross-secting the plurality of pre-processed substrates.

Abstract: Circuit element having a first layer composed of an electrically insulating substrate material, a first electrically conductive material which is in the form of at least one discrete area, such that it is embedded in or applied to the substrate material, a second layer having a second electrically conductive material, and a monomolecular layer, which is composed of electrically active molecules which transports charge carriers, arranged between the first layer and the second layer. The monomolecular layer is immobilized and makes electrical contact with the second layer. Each of the electrically active molecules has a first unit, which is used as an electron donor, a second unit, which is used as an electron acceptor, wherein the electron donor and the electron acceptor form a diode, and at least one redox-active unit, by means of which a variable resistance is formed, arranged between the first unit and the second unit.

Abstract: A smart card contains a carrier body for receiving at least one system component, which has (in each case) a plurality of electrical components, and which unites the electrical functions for the operation of the smart card. The system component terminates approximately evenly with the top side of the card body of the smart card. At least one of the electrical components is accessible from the top side of the smart card.

Abstract: A suppressor device for an electronic device comprising a plug-in device, comprising at least one plug element, which is arranged on a electrically conducting housing of the electronic device. A printed circuit board is arranged in the housing and bears an electronic circuit leading to the plug element. A capacitor is connected to the plug element and to the potential of the housing. The capacitor is arranged on the printed circuit board which protrudes from the inner part of the housing through an opening with a part thereof and which is also extends from the inner part of the housing to the outer side of the housing. The plug element is conductively connected to the capacitor and the circuit on the part of the printed circuit board located on the outer part of the housing.

Abstract: Manufacturing of miniaturized three-dimensional electric components are presented, as well as components manufactured by the methods. The manufacturing methods comprise micro-replication of at least one master structure, e.g. via a mould structure, in at least one polymer layer onto which layer at least one conductive path is provided.

Abstract: A shock resistant device. A printed circuit board comprising electronics and a frequency reference is rigidly mounted to a central support member. The electronics can be mounted to both surfaces of the printed circuit board. The central support member is mounted to an enclosure via wire rope isolators. The central support member is designed to maximize rigidity at minimum mass. The central support member can comprise a thin wall metal mesh or honeycomb. At least a portion of the central support member directly contacts the printed circuit board beneath the frequency reference.

Abstract: A bumpless assembly package mainly comprises a substrate, and a chip. The substrate has an upper surface and an opposite lower surface, a plurality of first contacts and a plurality of second contacts formed on the upper surface of the substrate, wherein one of the first contacts is electrically connected to one of the second contacts. The chip has an active surface and a boding pad formed on the active surface and is disposed in the opening, Moreover, an electrically conductive layer is disposed above the upper surface of the substrate and the active surface of the chip, and extended from the upper surface of the substrate to the active surface of the chip so as to electrically connect the chip and the substrate. In addition, a protective layer is provided to dispose above the electrically conductive layer and expose the second contacts so that the second contacts can electrically connect to external electronic devices.

Abstract: A circuit board has a first component interface configured to connect to a first circuit board component, a second component interface configured to connect to a second circuit board component, a differential signal pair electrically connecting the first component interface to the second component interface, and a signal return path configured to operate as a signal return pathway for the differential signal pair. The signal return path includes first conductive material which is in electrical communication with the first component interface, second conductive material which is in electrical communication with the second component interface, and a dielectric which provides direct current separation between the first and second conductive material. Such a circuit board may alleviate the need for DC blocking capacitors along the differential pair, and along other differential pairs when the circuit board has multiple differential pairs connecting the first and second component interfaces.

Abstract: The present invention provides for a BGA solder ball interconnection to an outer conductive layer of a laminated circuit assembly having an underlying circuit layer. The invention includes a raised BGA solder ball pad substantially co-planar with the outer conductive layer, the raised pad having a raised face and a plurality of vertical conductive walls and a BGA solder ball having an average diameter of greater than the width of the raised face, the BGA solder ball being adhered to the raised face and to a substantial portion of the vertical conductive walls.

Abstract: A semiconductor apparatus includes a printed circuit board, a peripheral type first semiconductor package which has a first group of ball electrodes arranged in a peripheral type first arrangement area and a first group of additional ball electrodes arranged inside the first arrangement area and which is arranged on a first surface of the printed circuit board, and a peripheral type second semiconductor package which has a second group of ball electrodes arranged in a second arrangement area and a second group of additional ball electrodes arranged inside the second arrangement area and which is arranged on a second surface of the printed circuit board. A ball electrode located at at least one corner of the first group of ball electrodes is arranged at a position to oppose a corner of the second arrangement area, and at least one ball electrode of the second group of ball electrodes is arranged at a position to oppose the second group of additional ball electrodes through the printed circuit board.

Abstract: The present invention concerns a lining support comprising a plurality of conductive pads (12) associated with a shared addressing contact (18) and means of selecting at least one pad to be lined by electrochemical means among the plurality of pads. In accordance with the invention, the selection means comprise means (20) of shifting a polarisation voltage, connected between the shared addressing contact and at least one pad to be addressed. Application to the lining of conductive pads.

Abstract: To provide a component built-in wiring board and a manufacturing method thereof capable of further improving component mounting density without deteriorating reliability.

Abstract: A method for forming a medium is provided. In accordance with the method a base layer is provided. A material layer is formed on the base layer. The material layer has void. A transponder having a memory is positioned in the void. A medium is also provided. The medium has a base layer and a material layer having a void. A transponder having a memory is positioned in the void.

Abstract: A chip package is provided. The chip package includes at least one chip, an interconnection structure, a plurality of second pads and at least one panel-shaped component, wherein the chip includes a plurality of first pads on a surface thereof. The interconnection structure is disposed on the chip, and the first pads of the chip are electrically coupled to the interconnection structure. The second pads are disposed on the interconnection structure, and the panel-shaped component is embedded in the interconnection structure. The panel-shaped component also includes a plurality of electrodes on its two opposite surfaces, and the second pads are electrically coupled to the first pads of the chip through the interconnection structure and the panel-shaped component.