Abstract: A multilayered wiring board has electrodes disposed on a first surface and a second surface, alternately layered insulation layers and wiring layers, and vias that are disposed in the insulation layer and electrically connect the wiring layers. The second electrode disposed on the second surface is embedded in the insulation layer exposed on said second surface, and the second wiring layer covered by the insulation layer exposed on said second surface does not have a layer for improving adhesion to the insulation layer.

Abstract: Substrate structure embodiments generally have first and second sides and are configured to form at least one opening that communicates between the first and second sides. A circuit path is carried on the first side and extended over the opening wherein the circuit path has a near side facing the substrate and has a far side facing away from the substrate. A circuit element has at least one bonding pad and is inserted into the opening after which the conductive bump is arranged to join the pad to the path. In another embodiment, the bump joins the pad to the near side of the path. In another embodiment, the path defines a hole and the bump fills the hole. In yet another system embodiment, the opening comprises a recess and associated vias. These embodiments may also have a second conductive circuit path carried on the first side and having a near side facing the substrate and a far side facing away from the substrate.

Abstract: A complementary mirror image embedded planar resistor architecture is provided. In the architecture, a complementary hollow structure is formed on a ground plane or an electrode plane to minimize the parasitic resistance, so as to efficiently enhance the application frequency. In addition, in some cases, some signal transmission lines pass through the position below the embedded planar resistor, and if there is no shield at all, serious interference or cross talk phenomenon occurs. Therefore, the complementary hollow structure of the ground plane, the electrode plane, or a power layer adjacent to the embedded planar resistor is designed to be a mesh structure, so as to reduce the interference or cross talk phenomenon. In this manner, the whole resistor structure has preferable high frequency electrical characteristic in the circuit.

Abstract: A multilayer printed wiring board includes one or more resin layers having via-holes and a core layer having via-holes. The via-holes formed in the one or more resin layers are open in the direction opposite to the direction in which the via-holes formed in the core layer are open. A method for manufacturing a multilayer printed wiring board includes a step of preparing a single- or double-sided copper-clad laminate; a step of forming lands by processing the copper-clad laminate; a step of forming a resin layer on the upper surface of the copper-clad laminate, forming openings for via-holes in the resin layer, and then forming the via-holes; and a step of forming openings for via-holes in the lower surface of the copper-clad laminate and then forming the via-holes.

Abstract: An electronic device which includes a feedthrough capacitor mounted on a front surface of a substrate. A feedthrough electrode penetrates a laminate (body of the capacitor). External electrodes are electrically connected to opposite ends of the feedthrough electrode. A capacitor electrode is disposed to form capacity in cooperation with the feedthrough electrode. A wiring conductor is formed on a rear surface of the substrate or inside the substrate, and via-hole conductors are connected to the wiring conductor. The feedthrough electrode and the external electrodes constitute a first current path. The wiring conductor and the via-hole conductors constitute a second current path electrically connected in parallel to the first current path.

Abstract: A power converter apparatus includes a substrate 22 on which switching elements Q, Q1 to Q6 are mounted, positive and negative terminal interconnection members 27, 28 mounted on the substrate, and a capacitor 17 having a positive terminal 17a connected to the main body of the positive terminal interconnection member 27 and a negative terminal 17b connected to the main body of the negative terminal interconnection member 28. The interconnection members each have a plate-like main body 27a, 28a that is located above and parallel to the substrate 22. The main bodies of the interconnection members are stacked to be close to each other while being electrically insulated from each other. Each of the positive terminal interconnection member and the negative terminal interconnection member further includes a plate-like extension 27b, 28b that extends from the corresponding main body toward the substrate, and a terminal portion 27c, 28c that extends from the extension and is joined to the substrate.

Abstract: Printed circuit boards including voltage switchable dielectric materials (VSDM) are disclosed. The VSDMs are used to protect electronic components, arranged on or embedded in printed circuit boards, against electric discharges, such as electrostatic discharges or electric overstresses. During an overvoltage event, a VSDM layer shunts excess currents to ground, thereby preventing electronic components from destruction or damage.

Abstract: A reconfigurable processing system is provided that comprises a plurality of programmable processing modules arranged on a circuit board. Each of the programmable processing modules is capable of being populated by a programmable integrated circuit of a variety of processing capabilities. Conductive traces on the circuit board connect to the programmable processing modules and the conductive traces are arranged on the circuit board so as to accommodate use of the programmable integrated circuits of varying processing capabilities in the programmable processing modules without the need to alter conductive trace footprints on the circuit board for the programmable processing modules. At least one interface circuit arranged on the circuit board to interface signals to and from the circuit board.

Abstract: The invention relates to a printed board which comprises an inlay and on whose one face electrical components are provided and on whose other face at least one single cooling element for cooling the components is mounted. A component to be cooled, the inlay and the cooling element are aligned with each other. The components are SMD components of, e.g., a high-power output stage circuit with heat emissions of up to 10 to 15 watt. In order to cool the structure, the heat produced in a heating zone between the pins of a component to be cooled is guided to the inlay which is dimensioned in such a manner that it extends farther than below the pins of the component to be cooled.

Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract: An apparatus includes a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits. Such capacitor may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.

Abstract: An electronics module for automotive vehicles includes a housing; an electrical connector having a commercial standard electrical connector footprint mounted on the housing; and an electronics assembly including commercial standard communication bus electronics contained in the housing, the electronics assembly being electrically connected to the electrical connector. The electronics module is adapted to be plugged into a power distribution unit of an automotive vehicle in order to control power distribution components of the unit.

Abstract: A printed circuit board having an embedded cavity capacitor is disclosed. According to an embodiment of the present invention, the printed circuit board having the embedded cavity capacitor, the printed circuit board can include two conductive layers to be used as a power layer and a ground layer, respectively; and a first dielectric layer, placed between the two conductive layers, wherein at least one cavity capacitor is arranged in a noise-transferable path between a noise source and a noise prevented destination which are placed on the printed circuit board, the cavity capacitor being formed to allow a second dielectric layer to have a lower stepped region than the first dielectric layer, the second dielectric layer using the two conductive layers as a first electrode and a second electrode, respectively, and placed between the first electrode and the second electrode.

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract: A passive component incorporating interposer includes a double-sided circuit board (1) having a wiring layer (8) on both sides, a passive component (2) mounted on the wiring layer (8) on one surface of the double-sided circuit board (1), a second insulating layer (3) made of woven fabric or non-woven fabric or inorganic filler and thermosetting resin laminated on the surface of the double-sided circuit board (1) mounted with the passive component (2), a first insulating layer (4) made of woven fabric or non-woven fabric or inorganic filler and thermosetting resin laminated on the other surface of the double-sided circuit board (1) not mounted with the passive component (2), first and second wiring layers (5, 6) formed on the first and second insulating layers (3, 4), and a through hole (7) for electrically connecting the wiring layers (8) disposed on both surfaces of the double-sided circuit board (1) and the first and second wiring layers (5, 6), where the first wiring layer (5) is formed to enable mounting

Abstract: The present invention provides a circuit board having electronic components integrated therein, including a carrier board having an metallic oxide layer formed on each two surfaces of a metal layer, and having at least one through cavity; at least a semiconductor chip hold in the opening; at least a capacitor disposed on one surface of the carrier board, wherein the surface with the capacitor disposed thereon is at the same side with the active surface of the semiconductor chip. The capacitor is constituted of a first electrode plate disposed on partial surface of one side of the carrier board, a high dielectric material layer disposed on the surface of the first electrode plate, and a second electrode plate, paralleling and corresponding to the first electrode plate, disposed on the surface of the high dielectric material. The metal layer and the oxidation layer of the carrier board can enhance rigidity as well as tenacity and also integrate semiconductor chips and capacitors in the circuit board structure.

Abstract: A stable power, low electromagnetic interference (EMI) apparatus and method for connecting electronic devices and circuit boards is disclosed. The apparatus involves a capacitor which includes a body member, a set of power terminals and a set of ground terminals connected to the top of the body member. The set of power terminals and the set of ground terminals alternate one with another. As a result of this configuration, a high inductance on the PCB side is achieved. The capacitor further includes a set of terminals connected to the bottom of the body member and includes metal planes within the body member. The metal planes are positioned to electrically connect either the set of power terminals or the set of ground terminals to the set of terminals.

Abstract: A multilayer printed circuit board, wherein, on a resin-insulating layer that houses a semiconductor element, another resin-insulating layer and a conductor circuit are formed with conductor circuits electrically connected through a via hole, wherein a electromagnetic shielding layer is formed on a resin-insulating layer surrounding a concave portion for housing a semiconductor element or on the inner wall surface of the concave portion, and the semiconductor element is embedded in the concave portion.

Abstract: A method is for making a structural printed wiring board panel that includes a multilayer printed wiring board having opposing, outer faces and interlayer interconnects that route RF, power and control signals. Connection areas are formed in or on at least on one face for connecting the interlayer interconnects and any electrical components. A metallic face sheet is secured onto at least one outer face, adding structural rigidity to the multilayer printed wiring board. A metallic face sheet can have apertures positioned to allow access to connection areas. RF components can be carried by a face sheet and operatively connected to connection areas. Antenna elements can be positioned on the same or an opposing face sheet and operatively connected to RF components to form a phased array printed wiring board (PWB) panel.

Abstract: A method for manufacturing a wiring board with built-in component. The method provides a secure connection between a component and interlayer insulating layers so that the wiring board with built-in component has excellent reliability. The wiring board is manufactured through a core board preparation step, a component preparation step, an accommodation step and a height alignment step. In the core board preparation step, a core board having an accommodation hole therein is prepared. In the component preparation step, a ceramic capacitor having therein a plurality of protruding conductors which protrudes from a capacitor rear surface is prepared. In the accommodation step, the ceramic capacitor is accommodated in the accommodation hole with the core rear surface facing the same side as the capacitor rear surface. In the height alignment step, a surface of a top portion of the protruding conductor and a surface of a conductor layer formed on the core rear surface are aligned to the same height.

Abstract: A capacitor built-in substrate of the present invention includes; a base resin layer; a plurality of capacitors arranged side by side in a lateral direction in a state that the capacitors are passed through the base resin layer, each of the capacitors constructed by a first electrode provided to pass through the base resin layer and having projection portions projected from both surface sides of the base resin layer respectively such that the projection portion on one surface side of the base resin layer serves as a connection portion, a dielectric layer for covering the projection portion of the first electrode on other surface side of the base resin layer, and a second electrode for covering the dielectric layer; a through electrode provided to pass through the base resin layer and having projection portions projected from both surface sides of the base resin layer respectively; and a built-up wiring formed on the other surface side of the base resin layer and connected to the second electrodes of the capac

Abstract: A capacitor comprising: a capacitor body including a plurality of laminated dielectric layers, a plurality of inner electrode layers which are respectively disposed between mutually adjacent ones of the dielectric layers, a first main surface located in a laminated direction of the dielectric layers, and a second main surface opposite to the first main surface; a first outer electrode formed on the first main surface of the capacitor body and electrically connected to the inner electrode layers; a second outer electrode formed on the second main surface of the capacitor body and electrically connected to the inner electrode layers; a first dummy electrode formed on the first main surface of the capacitor body; and a second dummy electrode formed on the second main surface of the capacitor body.

Abstract: In a method of manufacturing a multilayer printed circuit board, a first insulating resin base material is formed. A resin surface of a second insulating resin base material formed by attaching copper foil on a surface of a resin-insulating layer is unified with the first insulating resin base material. A conductor circuit is formed on the second insulating resin base material and a via hole electrically connecting to the conductor circuit. A concave portion is formed from a resin-insulating layer surface in a conductor circuit non-formation area of the first insulating resin base material. A semiconductor element is housed within the concave portion and adhered with an adhesive. A resin-insulating layer is formed by coating the semiconductor element and a via hole.

Abstract: A composite electronic component includes a multilayer wiring block having a plurality of insulating layers and a wiring pattern, and a chip-type electronic component built-in multilayer block having a plurality of insulating payers and a wiring pattern and including a first chip-type electronic component. The multilayer wiring block and the chip-type electronic component built-in multilayer block are electrically interconnected and arranged on substantially the same plane.

Abstract: A universal solder pad is used with a plurality of SMD components having different sizes. Each SMD component includes a first conductive part and a second conductive part. The universal solder pad includes a first pad unit and a second pad unit. The first and second pad units are electrically connected to the first and second conductive parts of the SMD component, respectively. Each of the first and second pad units includes a main portion and a first extension portion. The first extension portion is extended from a first sidewall of the main portion and includes a first border, a second border and a third border. The second border and the third border of the first extension portion are parallel with each other for facilitating alignment of the first and second conductive parts of the SMD component with respect to the first pad unit and the second pad unit.

Abstract: According to an aspect of the present invention, there is provided a printed circuit board including: a semiconductor package including a parallelepiped body, and solder balls provided on a face of the parallelepiped body; a printed wiring board including a mounting face, the mounting face configured to mount the plurality of solder balls; a first bonding member including a first glass transition temperature, the first bonding member disposed around the parallelepiped body and configured to bond the semiconductor package and the printed wiring board; an electronic component mounted on the mounting face on an opposite side to the semiconductor package with respect to the first bonding member; and a second bonding member including a second glass transition temperature that is higher than the first glass transition temperature, the second bonding member disposed onto the mounting face to cover the electronic component.

Abstract: A printed circuit board includes a high-speed differential signal control chip, first to fourth coupling capacitor pads, first and second connector pads, first and second inductor pads, a number of transmission lines, a power pin, two sharing pads, and two selection pads. Two coupling capacitors can selectively connect the first and second coupling capacitor pads and the two sharing pads or between the third and fourth coupling capacitor pads and the two sharing pads, respectively. Two inductors can connect the first and second inductor pads and the two selection pads respectively, and the first and second inductor pads and the two selection pads can be void.

Abstract: An interposer including: a substrate including a first layer and second layer, wherein the first layer and second layer are positioned parallel to each other; electrodes each having a concave-convex structure formed on each facing surface of the first layer and second layer of the substrate; a dielectric layer sandwiched between the electrodes which are formed on each facing surface of the first layer and second layer of the substrate; a first conductive part which vertically passes through the first layer of the substrate from a first outer surface of the substrate and is electrically connected to an electrode formed on a surface of the second layer of the substrate that faces the first layer of the substrate; and a second conductive part which vertically passes through the second layer of the substrate from a second outer surface of the substrate and is electrically connected to an electrode formed on a surface of the first layer of the substrate that faces the second layer of the substrate.

Abstract: Carrier including: a substrate having a first interface with first contact holes, and a second interface, which lies opposite the first interface, with second contact holes. The substrate includes a substrate body and electrically conductive contact channels formed therein, wherein each of the contact channels electrically conductively connects a first contact hole to a second contact hole. The carrier also includes a front-side wiring layer arranged on the first interface and; has a first front-side metallization layer formed therein such that it includes a first capacitor electrode for electrically connecting microelectronic devices and/or circuits to a first pole of a signal or supply voltage.

Abstract: A laminate includes base material layers and interlayer constraining layers disposed therebetween. The base material layers are formed of a sintered body of a first powder including a glass material and a first ceramic material, and the interlayer constraining layer includes a second powder including a second ceramic material that will not be sintered at a temperature for melting the glass material, and is in such a state that the second powder adheres together by diffusion or flow of a portion of the first powder including the glass material included in the base material layer at the time of baking. The incorporated element is in such a state that an entire periphery thereof is covered with the interlayer constraining layer.

Abstract: A printed circuit board (PCB) is disclose such that the PCB has enhanced structural integrity. The PCB has opposing, outer faces and interlayer interconnects that route RF, power and control signals. Connection areas are formed in or on at least on one face for connecting the interlayer interconnects and any electrical components. A metallic face sheet is secured onto at least one outer face, adding structural rigidity to the multilayer printed wiring board. A metallic face sheet can have apertures positioned to allow access to connection areas. RF components can be carried by a face sheet and operatively connected to connection areas. Antenna elements can be positioned on the same or an opposing face sheet and operatively connected to RF components to form a phased array printed wiring board (PWB) panel.

Abstract: Variably oriented capacitive elements for printed circuit boards (PCBs) and method of manufacturing the same. In one form the disclosure, a PCB can include a first multiple-layered capacitor including a first orientation and placed along a surface operable to mount electronic components. The PCB can also include a second multiple-layered capacitor including a second orientation different from the first. The second multiple-layered capacitor can be placed along the surface near the first multiple-layered capacitor.

Abstract: A multilayer capacitor includes a laminate of ceramic layers, and a capacitor unit provided in the laminate. In the multilayer capacitor, the relationships P?Ra and P?W are established, wherein P represents the average projection height of first and second via conductors from the upper surface, Ra represents the surface roughness of the upper surface, and W represents an amount of curvature of the laminate. Further, the projecting portions of the first and second via conductors projecting from the upper surface are buried in first and second external electrodes, respectively.

Abstract: A multi-layer printed wiring board including a first substrate having an opening and having external terminals positioned to be connected to a package substrate, a second substrate laminated to the first substrate and having external terminals positioned to be connected to a mother board, the second substrate having a metallic layer portion in the opening of the first substrate and non-through holes filled with conductive material and connected to the metallic layer portion, and an IC component having terminals and loaded in the opening of the first substrate such that the terminals of the IC component face an opposite side of the metallic layer portion of the second substrate. The IC chip is accommodated in the opening such that the metallic layer portion and non-through holes of the second substrate irradiate heat generated by the IC chip.

Abstract: An embedded capacitor core including a first set of capacitors, a second set of capacitors, and an inter-layer dielectric film between the first set of capacitors and the second set of capacitors. The first set of capacitors includes: a first conductive pattern comprising at least two conductive electrodes; a second conductive pattern comprising at least two conductive electrodes corresponding to the two conductive electrodes of the first conductive pattern; and a first dielectric film between the first conductive pattern and the second conductive pattern. The second set of capacitors includes: a third conductive pattern comprising at least two conductive electrodes; a fourth conductive pattern comprising at least two conductive electrodes corresponding to the two conductive electrodes of the third conductive pattern; and a second dielectric film between the third conductive pattern and the fourth conductive pattern.

Abstract: The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element.

Abstract: A semiconductor device including a package substrate having, at the periphery of the main surface thereof, bonding leads disposed in a row, a semiconductor chip mounted inside of the row of the bonding leads on the main surface of the package substrate, wires for connecting pads of the semiconductor chip and the bonding leads of the substrate, a sealing body for resin sealing the semiconductor chip and the wires, and solder bumps disposed on the back surface of the package substrate. The top of loop of each of the wires is disposed outside the wire connecting portion so that the wire connection between the bonding leads and the pads of the semiconductor chip has a stable loop shape to prevent wire connection failure.

Abstract: A component-embedded board device has a wiring board in which an electronic component is embedded, a connection member which is conductive and arranged at a surface of the wiring board, and an inner wiring unit which is arranged in the wiring board and connects an electrode of the electronic component with the connection member. The component-embedded board device is further provided with an inspection connection member for an inspection of a faulty wiring of the inner wiring unit, and an inspection wiring unit which is arranged in the wiring board and connects the inspection connection member with one of the electrode and a predetermined portion of the inner wiring unit. The inspection connection member is conductive and arranged at a surface of the wiring board.

Abstract: A circuit board (10, 10?, 10??) comprising: a board core (11) having a main core surface (12) and a rear core surface (13); a ceramic capacitor (101, 101?, 101?, 101??, 101??, 101???, 101???) having a main capacitor surface (102) and a rear capacitor surface (103), having a structure in which a first inner electrode layer (141) and a second inner electrode layer (142) are alternately stacked with a ceramic dielectric layer (105) interposed therebetween, and having a plurality of capacitor function units (107, 108) being electrically independent from each other, the ceramic capacitor (101, 101?, 101?, 101??, 101??, 101???, 101???) being buried in the board core (11) in a state where the main core surface (12) and the main capacitor surface (102) are directed in a same direction; and a buildup layer (31) having a structure in which an interlayer insulating layer (33, 35) and a conductor layer (42) are alternately stacked on the main core surface (12) and the main capacitor surface (102) and having a semiconduct

Abstract: A technique for observing signaling on the traces between ICs on a PC board without introducing significant signal degradation is provided. A route-through connector footprint allows the use of a standard connector without the use of stub traces. The route-through connector footprint allows a standard connector to be introduced directly into the line traces routed between ICs. Because stub traces are not used, this technique for mechanical interconnection into the line traces on a PC board allows for a single board layout to be used for both test and production. Additionally, because stub traces are not used, signal quality is minimally impacted and testing can be performed at operational speeds improving the reliability of the test function. The use of a route-through connector footprint additionally saves PC board space and cost.

Abstract: A component incorporating module includes an insulation resin layer, a plurality of lands arranged to mount components and wiring patterns connected to the plurality of lands, which are arranged along a first main surface of the resin layer, and circuit components connected to the lands to mount components. The circuit components are embedded in the resin layer. The plurality of lands have thicknesses that are greater than those of the wiring patterns adjacent to the corresponding lands.

Abstract: The formation of electronic assemblies is described. One embodiment includes providing a body and forming a first metal pad layer on a first surface thereof. A second metal pad layer is formed in contact with the first metal pad layer, the second metal pad layer having a denser pitch than the first metal pad layer. A dielectric layer is formed between the metal pads in the first and second metal pad layers. Vias extending through the body from a second surface thereof are formed, the vias exposing the first metal pad layer. An insulating layer is formed on via sidewalls and on the second surface, and an electrically conductive layer formed on the insulating layer and on the exposed surface of the first metal layer. Elements are coupled to the second metal pad layer and the electrically conductive layer coupled to a substrate. Other embodiments are described and claimed.

Abstract: A circuit board having a power source is provided, including: a carrier board having a first dielectric layer disposed on at least a surface thereof and a first circuit layer disposed on the first dielectric layer, wherein the first circuit layer has at least an electrode pad; a first electrode plate disposed on the electrode pad; an insulating frame member disposed on the first electrode plate, with a portion of the first electrode plate being exposed from the insulating frame member, wherein electrolyte is received in the insulating frame member and in contact with the first electrode plate; and a porous second electrode plate disposed on the insulating frame member and the electrolyte, the second electrode plate being in contact with the electrolyte, so as to provide the power source for the circuit board.

Abstract: A chip capacitor is provided in a core substrate of a printed circuit board. This makes it possible to shorten a distance between an IC chip and the chip capacitor and to reduce loop inductance. Since the core substrate is constituted by provided a first resin substrate, a second resin substrate and a third resin substrate in a multilayer manner, the core substrate can obtain sufficient strength.

Abstract: A Z-directed filter component for insertion into a printed circuit board while allowing electrical connection to internal conductive planes contained with the PCB. In one embodiment the Z-directed filter component is mounted within the thickness of the PCB allowing other components to be mounted over it. The filter may be T-filter or a Pi-filter within the body of the Z-directed component. The body may also contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body. Methods for mounting Z-directed components are also provided.

Abstract: A Z-directed signal pass-through component for insertion into a printed circuit board while allowing electrical connection from external surface conductors to internal conductive planes or between internal conductive planes. The Z-directed pass-through component is mounted within the thickness of the PCB allowing other components to be mounted over it. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body.

Abstract: An embedded capacitor device within a circuit board having an integrated circuitry thereon is provided. The circuit board has a common coupling area under the integrated circuitry. The embedded capacitor device includes a first capacitor section providing at least one capacitor to a first terminal set of the integrated circuitry and a second capacitor section providing at least one capacitor to a second terminal set of the integrated circuitry. A portion of the first capacitor section is in the common coupling area and has its coupling to the first terminal set located in the common coupling area. Similarly, a portion of the second capacitor section is in the common coupling area and has its coupling to the second terminal set located in the common coupling area.

Abstract: An embedded electronic component structure and a method for forming the same are provided, wherein the embedded electronic component structure comprises a lower laminating layer, a first clamping layer, a dielectric layer, a second clamping layer, an electronic component, an upper laminating later and a via interconnection. The first clamping layer is disposed on the lower laminating layer. The dielectric layer is disposed on the first clamping layer. The second clamping layer is located on the dielectric layer. The electronic component is embedded in the dielectric layer, wherein the lower surface of the electronic component contacts the first clamping layer and the upper surface thereof contacts the second clamping layer. The upper laminating layer covers the second clamping layer. The via interconnection is adjacent to the electronic component and penetrate the dielectric layer to respectively connect the first clamping layer and the second clamping layer.

Abstract: An apparatus for constructing, repairing and operating modular electronic systems utilizes peripheral half-capacitors (i.e., conductive plates on the outside of the modules) to communicate non-conductively between abutting modules. Such systems provide lower cost, improved testability/reparability and greater density than conventional modular packaging techniques, such as printed circuit boards and multi-chip modules. The non-conductive interconnection technique of the invention can be applied to all levels in the packaging hierarchy, from bare semiconductor dies to complete functional sub-units. Numerous exemplary systems and applications are described.

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.