Abstract: A display device includes a driving substrate, a front panel laminate, a circuit board, a front protective layer, and a glue. The front panel laminate is disposed on the driving substrate and includes a display medium layer. The circuit board is disposed on an end of the driving substrate. The front protective layer is disposed on the front panel laminate. The front protective layer has a notch. An end of the circuit board is in the notch. The end of the circuit board and the front protective layer have a first gap therebetween. The glue is filled in the first gap. A normal projection of the glue on the driving substrate overlaps a normal projection of the circuit board on the driving substrate and overlaps a normal projection of the front protective layer on the driving substrate.

Abstract: Provided is a multiple-input multiple-output (MIMO) antenna having a lightweight stacked structure. According to one aspect of the present invention, there is provided a MIMO antenna assembly having a lightweight stacked structure, in which a calibration network, which was provided between antenna elements and filters in the related art, is provided on one printed circuit board (PCB), together with a power amplifier and a digital circuit, and filters are closely coupled to the bottom of the PCB on which the feeding network is provided. The present invention employs a strategy in which an antenna assembly is reduced to a compact size while managing phase deviation caused due to filters at an acceptable level.

Abstract: A method of manufacturing an extreme ultraviolet mask, including forming a multilayer Mo/Si stack including alternating Mo and Si layers over a first major surface of a mask substrate, and forming a capping layer over the multilayer Mo/Si stack. An absorber layer is formed on the capping layer, and a hard mask layer is formed over the absorber layer. The hard mask layer is patterned to form a hard mask layer pattern. The hard mask layer pattern is extended into the absorber layer to expose the capping layer and form a mask pattern. A border pattern is formed around the mask pattern. The border pattern is extended through the multilayer Mo/Si stack to expose the mask substrate and form a trench surrounding the mask pattern. A passivation layer is formed along sidewalls of the trench.

Abstract: According to one embodiment, a semiconductor device includes a re-interconnection layer, bumps, chips, and a resin member. The bumps are provided on a first surface of the re-interconnection layer. The chips are stacked on a second surface of the re-interconnection layer. The resin member is provided on the second surface, and covers the chips. The re-interconnection layer includes an insulating layer, an interconnection, a first via, an electrode layer, and a second via. The interconnection is provided in the insulating layer. The first via is provided in the insulating layer and connected to the interconnection. The electrode layer is provided in the insulating layer, formed of a metal material different from a material of the first via, exposed on the first surface, and connected to the first via and the bumps. The second via is provided in the insulating layer, and connected to the interconnection and the chips.

Abstract: A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal molded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal molded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal molded body.

Abstract: The wiring board in the present invention includes: an insulating board; external connection pads for a differential signal and external connection pads for grounding or a power supply formed on a lower surface of the insulating board; and a through-conductor formed in the insulating board. Each of the external connection pads is formed in a two-dimensional arrangement, a diameter and an arrangement pitch of the external connection pad for a differential signal are smaller than a diameter and an arrangement pitch of the external connection pad for grounding or a power supply, and an arrangement pitch of the through-conductor connected to the external connection pad for a differential signal is less than or equal to an arrangement pitch of the external connection pad for a differential signal.

Abstract: A strain measurement apparatus includes: a stereo camera device that produces a first stereo image and a second stereo image of a measurement object; an actual strain calculation portion configured to find a three-dimensional configuration of the measurement object from the first stereo image and the second stereo image to find actual strain of the measurement object; a temperature distribution detector that detects a temperature distribution of the measurement object; a free thermal strain calculation portion configured to find free thermal strain of the measurement object from the temperature distribution detected by the temperature distribution detector; and a constraint strain calculation portion configured to find as constraint strain of the measurement object a difference obtained by subtracting the free thermal strain found by the free thermal strain calculation portion from the actual strain found by the actual strain calculation portion.

Abstract: Charge-encoded chiplets are produced using a sacrificial metal mask and associated fabrication techniques and materials that are compatible with typical semiconductor fabrication processes to provide each chiplet with two different (i.e., positive and negative) charge polarity regions generated by associated patterned charge-inducing material structures. A first charge-inducing material having a positive charge polarity is formed on a silicon wafer over previously-fabricated integrated circuits, then a sacrificial metal mask is patterned only over a portion of the charge-inducing material structure, and a second charge-inducing material structure (e.g., a self-assembling octadecyltrichlorosilane monolayer) is deposited having a negative charge polarity. The sacrificial metal mask is then removed to expose the masked portion of the first charge-inducing material structure, thereby providing the chiplet with both a positive charge polarity region and a negative charge polarity region.

Abstract: It is an object to form a conductive intermediate layer having a function of maximally preventing a solder leaching phenomenon with a low environment load and with good productivity. There are provided an insulative base material 2, a wiring circuit pattern 3 formed on at least one surface of the insulative base material 2, an electronic part mounting land 31 which is formed as part of the wiring circuit pattern 3 and on which an electronic part 7 is to be mounted, and a conductive intermediate layer 5 made of a sintered conductive ink film on the electronic part mounting land 31.

Abstract: An in-vehicle camera device includes: a conductive silicone member including a silicone body made from insulating silicone material and a conductive portion which is embedded in the silicone body so as to expose both ends of the conductive portion to opposing surfaces of the silicone body; a circuit substrate having an image pickup device and a substrate terminal which is arranged so as to make contact with the end of the conductive portion on one surface of the silicone body; a terminal holder having a contact face configured to make contact with the other surface of the silicone body; and harness terminals held by the terminal holder. Each harness terminal includes a front end retained on the contact face of the terminal holder. The front end of each harness terminal is positioned in a same plane with the contact face of the terminal holder.

Abstract: A microelectronic assembly for packaging/encapsulating IC devices, which includes a crystalline substrate handler having opposing first and second surfaces and a cavity formed into the first surface, a first IC device disposed in the cavity and a second IC device mounted to the second surface, and a plurality of interconnects formed through the crystalline substrate handler. Each of the interconnects includes a hole formed through the crystalline substrate handler from the first surface to the second surface, a compliant dielectric material disposed along the hole's sidewall, and a conductive material disposed along the compliant dielectric material and extending between the first and second surfaces. The compliant dielectric material insulates the conductive material from the sidewall. The second IC device, which can be an image sensor, is electrically coupled to the conductive materials of the plurality of interconnects. The first IC can be a processor for processing the signals from the image sensor.

Abstract: An electronic device including a solder structure and methods of forming an electrical interconnection are shown. Solder structures are shown including a solder ball formed from a first solder having a first melting temperature, and a connecting structure coupling the solder ball to one or more electrical connection pads, the connecting structure formed from a second solder having a second melting temperature lower than the first melting temperature. Electronic devices are shown including a polymer mold material formed over the solder structures.

Abstract: A display device and a manufacturing method thereof are provided. The display of the present invention includes a flexible substrate, a display layer, a protecting layer, an electronic unit, and a filling glue. The flexible substrate has a carrying surface. The display layer is disposed on the carrying surface and has a side edge. The protecting layer is disposed on the opposite side of the display layer corresponding to the carrying surface. The electronic unit is disposed on the carrying surface with a space formed between the electronic unit and the side edge of the display layer. The filling glue is filled in the space and connected with the side edge of the display layer, the electronic unit, and the carrying surface.

Abstract: Disclosed herein is a printed circuit board, including a base substrate; and a circuit pattern formed on the base substrate and including a first metal layer having an inclined surface on both upper sides thereof and a second metal layer formed on the inclined part.

Abstract: According to one embodiment, a joined structural body for mounting an electronic component on the body which is provided with a first member, a second member and a joining portion. The joining portion is provided between the first member and the second member so as to connect the first member and the second member with each other mechanically. The joining portion contains at least one metal of a tin, an indium or a zinc, and a copper. The content of the metal in the joining portion decreases toward a side of at least one of the first member and the second member, and the content of the copper in the joining portion increases in the same direction as the decreasing direction of the content of the metal.

Abstract: An integrated circuit package includes a packaging substrate with an electrical connection pad formed thereon and an integrated circuit die coupled to the electrical connection pad. The electrical connection pad includes an electroplated surface finish layer, but does not include an electrical trace configured as a plating tail. Because the electrical connection pad is free of a plating tail, signal degradation caused by the presence of plating tails in the integrated circuit package is avoided.

Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.

Abstract: Provided is a printed circuit board for a memory card and a method of manufacturing the same, the printed circuit board for the memory card, including: an insulating layer; a mounting unit formed on a first surface of the insulating layer and electrically connected to a memory device; a terminal unit formed on a second surface of the insulating layer and electrically connected to electronic apparatuses of an outside; and metal layers formed at the mounting unit and the terminal unit and made of the same material.

Abstract: An electronic device has a printed substrate having land electrodes and a chip-type electronic component having external electrodes formed on a surface of a component element body. The land electrodes and the external electrodes are bonded via a solder to form electrode bonding parts. A thermosetting resin is filed between the electrode bonding parts. The bonding material contains solder particles having a melting point T1, a thermosetting resin having a curing temperature T2 that is higher than the melting point T1, and an activating agent having an activation temperature T3 that is lower than the curing temperature T2. The viscosity of the contained components except the solder particles at the melting point T1 is 0.57 Pa·s or less, and the melting point T1 and the activation temperature T3 satisfy T1?T3<50° C.

Abstract: In ultrasonic bonding of a metal terminal to a substrate pad, a thin buffer metal layer which is formed of a soft metal or a highly slidable metal is interposed between a terminal edge and a pad so as to prevent direct contact between an end of the terminal and the pad upon bonding. This makes it possible to prevent abrasion and a crack in the pad at the end of the terminal caused by pressure and an ultrasonic wave upon the ultrasonic bonding. This makes it possible to realize a compact bonded structure with high reliability.

Abstract: The electronic device includes a terminal structure and a printed circuit board including the terminal structure. The terminal structure includes a solder-joint conductor region placed on a wiring conductor, an intermediate layer contacting with the conductor region, and a solder region contacting with the intermediate layer. The intermediate layer includes an intermetallic compound including tin and at least one of copper and nickel as principal components. When the indentation elastic modulus of the conductor region is E1 and the indentation elastic modulus of the intermediate layer is E2, the ratio of E1 to E2 is equal to or more than 0.8 and equal to or less than 1.5.

Abstract: A wiring structure for improving a crown-like defect and a fabrication method thereof are provided. The method includes the following steps. A substrate, on which a seed layer and a patterned photoresist layer with an opening are formed, is provided. A copper layer, having a bottom covering the seed layer, is formed in the opening. A barrier layer covering at least one top portion of the copper layer is formed on the copper layer. An oxidation potential of the barrier layer is greater than that of the copper layer. The patterned photoresist layer is removed to perform an etching process, wherein the copper layer and a portion of the seed layer exposed are etched to form a wiring layer. An immersion process is performed to form an anti-oxidation layer comprehensively on exposed surfaces of the barrier layer and the wiring layer.

Abstract: A laminate circuit board with a multi-layer circuit structure which includes a substrate, a first circuit metal layer, a second circuit metal layer, a first nanometer plating layer, a second nanometer plating layer and a cover layer is disclosed. The first circuit metal layer is embedded in the substrate or formed on at least one surface of the substrate which is smooth. The first nanometer plating layer with a smooth surface covers the first circuit metal layer. The second nanometer plating layer is formed on the other surface of the substrate and fills up the opening in the cover layer to electrically connect the first circuit metal layer. The junction adhesion is improved by the chemical bonding between the nanometer plating layer and the cover layer/the substrate. Therefore, the circuit metal layer does not need to be roughened and the density of the circuit increases.

Abstract: An apparatus includes a substrate having a surface and a plurality of solder balls arranged on the surface to form a ball grid array. A portion of the plurality of solder balls is arranged to have a pitch between adjacent solder balls. The adjacent solder balls having the pitch have a shape of a truncated sphere. At least one solder ball of the plurality of solder balls is included in a solder island on the surface having a shape that is different than the shape of the truncated sphere.

Abstract: This invention provides a multilayer printed wiring board in which electric connectivity and functionality are obtained by improving reliability and particularly, reliability to the drop test can be improved. No corrosion resistant layer is formed on a solder pad 60B on which a component is to be mounted so as to obtain flexibility. Thus, if an impact is received from outside when a related product is dropped, the impact can be buffered so as to protect any mounted component from being removed. On the other hand, land 60A in which the corrosion resistant layer is formed is unlikely to occur contact failure even if a carbon pillar constituting an operation key makes repeated contacts.

Abstract: A joining method using a metal foam, a method of manufacturing a semiconductor device by using the joining method, and a semiconductor device produced by the manufacturing method are disclosed. A metal foam body is sandwiched between members to be joined, which are then brought into contact with each other and subjected to heat treatment. In this heat treatment, films of low-melting-point metal, such as Sn films covering the members to be joined, are melted. An alloy layer—an intermetallic compound—is formed by bringing about solid-liquid diffusion of Cu of a skeleton of open cells of the metal foam body in the molten Sn. At this stage, a Cu skeleton is left in the metal foam body. Highly thermally resistant and highly reliable joining can be realized by joining the members to be joined together by using this alloy layer.

Abstract: Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.

Abstract: A method of fabricating packaging for a product comprises forming a plurality of conductive tracks on a sheet of material and forming a physical barrier, such as a hole, for impeding fluid flow between adjacent conductive tracks. The method may further comprise depositing first and second regions conductive fluid onto adjacent first and second conductive tracks either side of the physical barrier and mounting an electronic device having first and second terminals such that the electronic device forms a bridge over the physical barrier and the first ands second terminals contact the first and second conductive adjacent tracks.

Abstract: A packaging substrate includes a supporting sheet, a copper foil, a number of connecting pads, a number of solder balls, a resin layer, a wiring layer and a solder mask layer. The copper foil is attached on a surface of the supporting sheet through an adhesive sheet. The connecting pads are formed on the copper foil. The solder balls are formed on the connecting pads. The resin layer infills the gaps between the solder balls. The wiring layer is formed on the resin layer and the solder balls. Terminal portions of the solder balls facing away from the connecting pads are electrically connected to the wiring layer. The solder mask layer is formed on the wiring layer. The solder mask layer defines a number of openings exposing portions of the wiring layer. The portions of the wiring layer exposed through the openings serve as contact pads.

Abstract: An electronic component for high-temperature applications includes a ceramic carrier and a semiconductor element. The ceramic carrier comprises a ceramic substrate having a content of alkali metal compounds of ?0.5%, more particularly ?0.05%, and the ceramic substrate is selected from the group consisting of: a ceramic substrate comprising aluminium oxide, anorthite, a filler having a coefficient of thermal expansion of ?4.0*10?6K?1 and glass; a ceramic substrate comprising aluminium oxide, celsian, a filler having a coefficient of thermal expansion of ?4.0*10?6K?1 and glass; and a ceramic substrate comprising an alkaline earth metal silicate glass having a silicon dioxide content of >50 mol %, boron oxide, and a filler having a coefficient of thermal expansion of <4.0*10?6K?1. The component prevents temperature damage at high temperatures and has constant properties, such as electrical insulation properties, up to 500° C.

Abstract: A first step of the method for assembling a wire element with an electronic chip comprises arranging the wire element in a groove of the chip delineated by a first element and a second element, joined by a link element comprising a plastically deformable material, and a second step then comprises clamping the first and second elements to deform the link element until the wire element is secured in the groove.

Abstract: In a method for manufacturing a multilayer ceramic electronic device, a multilayer ceramic element assembly including laminated unsintered ceramic base material layers, a first conductor pattern, a seat portion disposed in a surface of the multilayer ceramic element assembly and arranged to mount a surface mount electronic device thereon, a second conductor pattern connected to the surface mount electronic device, and a resin introduction portion located outside a vertically projected region of the surface mount electronic device and arranged to introduce a resin to the seat portion is prepared. The multilayer ceramic element assembly is fired and the surface mount electronic device is mounted on the seat portion of the fired multilayer ceramic element assembly with the second conductor pattern therebetween. The resin is filled from the resin introduction portion into the seat portion and between the seat portion and the surface mount electronic device and is cured.

Abstract: Disclosed herein are a power module using sintering die attach and a manufacturing method of the same. The power module includes: a substrate having an insulating layer formed on a surface of a metal plate; a circuit layer formed on the substrate and including a wiring pattern and an electrode pattern; a device mounted on the wiring pattern; a sintering die attach layer applying a metal paste between the wiring pattern and the device and sintering the metal paste to bond the wiring pattern to the device; and a lead frame electrically connecting the device to the electrode pattern, whereby making it possible to simplify and facilitate the process, increase electrical efficiency and improve radiation characteristics, and manufacture firm and reliable power module.

Abstract: A semiconductor device includes a lower structure, an insulation layer, metal contacts, a bridge and a metal pad. The lower structure has a metal wiring. An insulation layer is formed on the lower structure. The metal contacts penetrate the insulation layer to be connected to the metal wiring. The bridge is provided in the insulation layer, the bridge connecting the metal contacts to one another. The metal pad is provided on the insulation layer, the metal pad making contact with the metal contacts.

Abstract: An electronic apparatus includes: a circuit board that is disposed inside a case that is formed by coupling first and second case halves, the circuit board being interposed between first and second boss portions; first and second conductive members that are disposed between a gap formed between the first boss portion and the circuit board; a third conductive member that is disposed between the first boss portion and the first conductive member and between the first boss portion and the second conductive member to electrically connect the first conductive member to the second conductive member; and a measurement circuit that is electrically connected to a first wiring and a second wiring, which are respectively connected to the first conductive member and the second conductive member, and measures an electrical characteristic value of at least one of the first conductive member and the second conductive member.

Abstract: A circuit device having superior voltage resistance is provided. A structure is achieved that omits the resin layer that is normally provided to the top surface of a circuit board. Specifically, a ceramic substrate (22) is disposed on the top surface of a circuit board (12) comprising a metal, and a transistor (34) such as an IGBT is mounted to the top surface of the ceramic substrate (22). As a result, the transistor (34) and the circuit board (12) are insulated from each other by the ceramic substrate (22). The ceramic substrate (22), which comprises an inorganic material, has an extremely high voltage resistance compared to the conventionally used insulating layer comprising resin, and so even if a high voltage on the order of 1000V is applied to the transistor (34), short circuiting between the transistor (34) and the circuit board (12) is prevented.

Abstract: A high quality component-incorporated substrate achieves a sufficient connection between an in-plane electrode and an interlayer connection conductor at low cost. A method of forming a hole for an interlayer connection conductor of a resin substrate includes a step of forming an in-plane electrode in a core substrate, a step of forming a light reflective conductor for reflecting a laser beam applied on the in-plane electrode in a later step, a step of forming a resin layer so as to cover the core substrate, the in-plane electrode and the light reflective conductor, and a step of forming a hole for the interlayer connection conductor by removing the resin layer on the light reflective conductor through the use of a laser beam.

Abstract: An electronic component includes: an electronic component body; and a lead secured to the electric component and including a projection portion defined by first and second inclined portions facing each other. The solder wettability of the first inclined portion is smaller than the solder wettability of the second inclined portion.

Abstract: There is provided a flexible harness adapted to be detachably connected to electrode pads of an electric/electronic component. The flexible harness according to the present invention comprises: a flexible insulator film; a conductor pattern formed on the flexible insulator film; a terminal plane which is an end region of the conductor pattern; and ball-like contact bumps formed on the terminal plane. Each contact bump includes a core made of an elastically deformable resin and an electrical conductor layer surrounding the core.

Abstract: In one embodiment of the present invention, inert nano-sized particles having dimensions from 1 nm to 1,000 nm are added into a solder ball. The inert nano-sized particles may comprise metal oxides, metal nitrides, metal carbides, metal borides, etc. The inert nano-sized particles may be a single compound, or may be a metallic material having a coating of a different material. In another embodiment of the present invention, a small quantity of at least one elemental metal that forms stable high melting intermetallic compound with tin is added to a solder ball. The added at least one elemental metal forms precipitates of intermetallic compounds with tin, which are dispersed as fine particles in the solder.

Abstract: A printed circuit board to which a localised solder connection is to be made, the surface of said printed circuit board having a continuous or non-continuous coating of a composition comprising a halo-hydrocarbon polymer at a thickness of from 1 nm to 10 ?m.

Abstract: A board-level package includes a printed circuit board, a semiconductor die package mounted on the printed circuit board, a tuned mass structure, and a support structure mounted to the printed circuit board and supporting the tuned mass structure.

Abstract: The present invention relates to an under-fill dam with high detection probability that is composed of a dry film solder resist and provided in the form of a fence around a chip device in order to prevent leaks of an under-fill material filled in a gap between a substrate and the chip device.

Abstract: Methods of forming a microelectronic structure are described. Those methods include doping a lead free solder material with nickel, wherein the nickel comprises up to about 0.2 percent by weight of the solder material, and then applying the solder material to a substrate comprising a copper pad.

Abstract: An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.

Abstract: A printed wiring board having an insulating base material; a wiring formed on at least one surface of the insulating base material, the wiring forming a predetermined circuit pattern; a first connection terminal portion formed on the surface and electrically connected to the wiring, the first connection terminal portion having a first width; a second connection terminal portion formed on the surface and electrically connected to the wiring, the second connection terminal portion having a second width; and a cover layer configured to cover the wiring and expose the first and the second connection terminal portion.

Abstract: Disclosed herein is a printed circuit board, including: a substrate including an insulation layer in which a cavity is formed; an electronic component mounted in the cavity of the substrate and having connection terminals; an insulation material layer formed on one side of the substrate to bury the electronic component; a first circuit layer formed on the other side of the substrate and including a connection pattern connecting with the connection terminals of the electronic component; and a second circuit layer formed on the insulation material layer. The printed circuit board is advantageous in that it can prevent the warpage thereof and ensure the reliability of electrical connection between an electronic component and a circuit layer by adjusting the thickness, thermal expansion coefficient and elastic modulus of insulation layer or the insulating material.

Abstract: A method for mounting a second member on a first member, wherein a pad layer is provided on the first member, and wherein an annular aperture portion exposing the first member to the bottom and having at least one discontinuous portion is provided in a region of the pad layer for mounting the second member having a mount face, the annular aperture portion having the same outer shape as the mount face of the second member is disclosed. The method includes: filling the aperture portion with a solder paste layer; and disposing the mount face of the second member on the solder paste layer, and melting and cooling the solder paste layer to mount the second member on the first member.

Abstract: WLP semiconductor devices include bump assemblies that have a barrier layer for inhibiting electromigration within the bump assemblies. In an implementation, the bump assemblies include copper posts formed on the integrated circuit chips of the WLP devices. Barrier layers formed of a metal such as nickel (Ni) are provided on the outer surface of the copper posts to inhibit electromigration in the bump assembly. Oxidation prevention caps formed of a metal such as tin (Sn) are provided over the barrier layer. Solder bumps are formed over the oxidation prevention caps. The oxidation prevention caps inhibit oxidation of the barrier layer during fabrication of the bump assemblies.

Abstract: A manufacturing method for manufacturing an electronic device is disclosed. Conductive elastomers comprising of various configurations and resistivity are coupled to contact pads of an electronic device. The conductive elastomers are also coupled to substrate contacts on a substrate, allowing the conductive elastomers to function as electrical connection from device to substrate as well as to embed one or more passive components at the contact pads of the electronic device.