Abstract: A wiring substrate used for a resin-sealing type semiconductor device is provided with an insulating substrate in which a through hole used for connecting an external terminal is formed, a wiring pattern formed on a semiconductor-chip packaging surface side of the insulating substrate, a land section that is formed at an end of the wiring pattern in a manner so as to cover the through hole from the semiconductor-chip packaging surface side, and that is used for connecting the external connecting terminal to the wiring pattern from the surface side opposite to the above-mentioned semiconductor-chip packaging surface side of the insulating substrate, and a through-hole opening section that allows the through hole to be partially open on the semiconductor-chip packaging surface side.

Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface.

Abstract: Flip-chip electronic packages are provided with a compliant surface layer, normally positioned between an underfill layer and a substrate such as a chip carrier or a printed circuit board or card, which reduces stress and strain resulting from differences in coefficients of thermal expansion between the chip and substrate. The compliant layer, which should have a storage modulus of less than ½ the modulus of the substrate, preferably between about 50,000 psi and about 20,000 psi, may comprise rubbery materials such as silicone, virco-plastic polymers such as polytetrafluoroethylene or interpenetrating polymer networks (IPNs). Photosensitive IPNs used for solder marks are preferred.

Abstract: The multilayer printed circuit board includes a substrate, a first conductive circuit layer, a photosensitive dielectric layer and a second conductive circuit layer which is electrically connected to the first conductive circuit layer through photo-via holes formed in the photosensitive dielectric layer. The second conductive circuit layer includes a wiring area where a plurality of wires are arranged and a pad area to which an external wire is to be connected using thermocompression bonding. Significantly, to avoid depressing the photosensitive dielectric layer underneath the pad area during the thermocompression bonding, the thickness of the second conductive circuit layer at least in the pad area, is made greater than that in the wiring area by extending this thickness into the photosensitive dielectric layer.

Abstract: There is disclosed herein an electronic circuit assembly, such as a printed circuit board, having solder resist windows with one or more enlarged solder resist pullback zones, thereby facilitating solder paste overprinting.

Abstract: The method (400, 500) and device (200) for reworkable direct chip attachment include a thermal-mechanical and mechanical stable solder joint for arranging connection pads on a top surface of the circuit board to facilitate connection for electronic elements, and affixing a reinforcement having apertures to accommodate solder joints to the top surface of the circuit board to facilitate solder attachment of the connection pads to the electronic elements wherein the reinforcement constrains deformation of the circuit board to provide reliable solder joints and facilitates attachment and removal of electronic elements from the circuit board.

Abstract: A present invention is to provide a thin parts installation structure and their manufacturing method. There is provided a circuit on a wiring substrate, an adhesive is painted to a selected part installation position on the wiring substrate, a conductive adhesive is painted in a position where the terminal area of electronic parts contact the wiring pattern circuits. The electronic part is put in the selected position of wiring the substrate such that the terminals of the electronic parts contact the conductive adhesive prior to curing the adhesives, and followed by both the non-conductive adhesive and conductive adhesive are stiffened.

Abstract: A thin, stacked face-to-face integrated circuit packaging structure includes a chips attached to both major surfaces of a rigid interposer, and interconnected by printed wiring traces and vias to external solder ball contacts attached to the interposer.

Abstract: A surface mountable high frequency electronic package consisting of substrates stacked on top of each other, with arbitrarily-shaped solder structures such as balls and walls connecting them together; forming a fully-shielded, environmentally-sealed, sandwich in which smaller electronic components and devices are placed. In addition to providing electronic and mechanical interconnection to a mother substrate, the solder structures also provide electromagnetic isolation and shielding, controlled-impedance transmission line structures, and an environmental seal. The entire package is fabricated from conventional materials and components assembled together with automated processes.

Abstract: An electrical connection is formed between a plurality of substrate conductive runners (52) and a plurality of substrate conductive pads (54) arranged in an alternating pattern on a substrate (32) and a plurality of component conductive runners (48) and a plurality of component conductive pads (50) arranged in an alternating pattern on an electrical component (40) through a plurality of conductive pads (60) and conductive runners (58) arranged in an alternating pattern on a connector (34). A display assembly (26) advantageously employs the electrical connection.

Abstract: A design having a semiconductor microchip bonded to a circuit board is described. This design may include: a printed circuit board (58); a semiconductor microchip (56) bonded to the circuit board (58) by means of an adhesive layer placed between the bonding surface of the microchip (56) and the desired bonding site on the circuit board (58); the adhesive layer providing for thermal relief as well as electrical contact between the microchip (56) and circuit board (58), and consisting of two or more concentric regions that adjoin but do not overlap one another; one being a center core region (50) of thermally and electrically conductive material; the other being a perimeter region (54) of thermally conductive and electrically nonconductive material surrounding the center core region (50) such that the perimeter region's (54) inner boundary completely bounds the center core region (50); and such that the perimeter region's (54) outer boundary extends to a lead on the microchip (56).

Abstract: A semiconductor unit including a circuit board having terminal electrodes on a surface thereof and a semiconductor device having an electrode pad on a first surface, where the semiconductor device is mounted face down on the surface of the circuit board. The semiconductor device has a plurality of bumps formed on the electrode pad, for electrically connecting the electrode pad to the terminal electrodes of the circuit board. Each bump includes a first bump portion and a smaller second bump portion formed on the first bump portion, and each second bump portion has a plurality of irregularities having concave portions extending in various directions. The bonding layer is formed between the second bump portion and the terminal electrode, and includes conductive particles which along with a portion of the bonding layer enter the concave portions of the plurality of irregularities of the bumps.

Abstract: An apparatus and method for surface-mounting ball grid array integrated circuit (IC) devices to printed circuit boards. A thin single- or multi-layer sheet of nonconductive material having a plurality of apertures corresponding to the leads of the IC device to be mounted is interposed between the ball grid array and the circuit board prior to solder processing to facilitate solder application, device alignment, and solder retention. An assembly guide is located on the top surface of the aid to assist in the orientation and placement of the IC device during assembly. In a further aspect, the disclosed assembly aid helps compensate for non-planarity in the IC device array or circuit board, and maintains a minimum standoff distance between the IC package and the circuit board to preclude undue solder joint deformation. The assembly aid also allows for reworking of the surface mount by facilitating localized placement of the solder prior to reflow processing without masking or other additional processing steps.

Abstract: A method of fabricating a ball grid array and the array. The method comprises the steps of providing an electrically insulating substrate and forming an essentially gold-free solder ball attach region and wire bond region secured to the substrate. Formation of the solder ball attach and wire bond regions includes forming a layer of electrically conductive material on the substrate, forming a layer of nickel over the layer of electrically conductive material and forming a layer of palladium over the layer of nickel. After chip attach and gold wire bonding or flip chip bonding, solder balls are then applied to the layer of palladium and the solder balls and solder ball attach regions are heated to a temperature sufficiently high and for a sufficient time so that the solder balls extend through and incorporate therein at least a portion of the layer of said palladium and extend to and attach to the layer of nickel.

Abstract: An electronic device includes an integrated circuit chip, an interposer and a printed circuit board. A first ball connector is used to connect the interposer to printed circuit board. The interposer may be connected to the integrated circuit chip by a second ball connector or a wire bond. The first ball connector is disposed on a cantilever structure formed in the interposer. The cantilever is formed by creating a channel in the interposer. The cantilever absorbs stress caused by a difference between the thermal expansion of the integrated circuit chip as compared to the printed circuit board. The cantilever thus reduces stress in the ball connector by allowing the ball connector to move within a plane defined by the interposer.

Abstract: A microelectronic assembly and a method for manufacturing the assembly include an integrated circuit component attached to a substrate via polymeric bodies. The integrated circuit component has bond pads that are bonded to corresponding conductive members. The substrate contains terminals associated with conductive traces. The conductive members rest against the respective terminals to form slidable electrical contacts. The slidable electrical contacts permit the transfer of electrical energy between the integrated circuit component and the conductive traces of the substrate. The polymeric bodies preferably comprise elastomers that are spaced from the conductive members, rather than underfilling the integrated circuit component.

Abstract: A multi-chip module or other electronic semiconductor component (1) contains a multi-layer substrate (9) whose bottom surface, the bottom of the bottom layer (15) of that substrate, serves as the bonding surface for bonding the multi-chip module or component to a printed wiring board (8) using a thermally sensitive adhesive, such as a thermally sensitive adhesive or solder. The bottom layer (15) of that multi-layer substrate integrally includes a plurality of electrical heaters (16-28), arranged side by side. When energized with appropriate current, the heater generates sufficient heat to weaken the adhesive bond, allowing the MCM to be pulled away from the printed wiring board and removed, without weakening the bonding of the multiple layers of the laminate substrate or weakening the MCM component's bond to that substrate.

Abstract: An integrated circuit module is provided having a substrate, an integrated circuit on the substrate and defining an active surface remote from the substrate, and a die attached to the active surface of the integrated circuit. A layer of non-conductive material conformally coats the die and active surface of the integrated circuit, with the layer of non-conductive material having a substantially level top surface. A plurality of vias are formed in the layer of non-conductive material aligned with the die and integrated circuit, respectively. A pattern of metallization is disposed on the top surface of the layer of non-conductive material extending through the plurality of vias and selectively interconnecting the die to the integrated circuit.

Abstract: A gold (Au) thick film land constituting a wire bonding electrode is formed by printing and sintering a gold (Au) thick film paste previously added with copper (Cu) to overlap with a copper (Cu) thick film which is formed as a wiring layer on a ceramic substrate. A semiconductor part mounted on the substrate and the gold (Au) thick film land are directly connected by a gold (Au) wire thereby electrically connecting the semiconductor part and the copper (Cu) thick film. In forming the gold (Au) thick film land, the gold (Au) thick film paste previously added with copper (Cu) is used. Therefore, disconnection caused by the Kirkendoll phenomenon is restrained and stable bonding between the copper (Cu) wiring layer and the gold (Au) thick film land can be achieved.

Abstract: A constraining ring increases the modulus of an interconnect substrate to maintain flatness of the substrate. The constraining ring is made of materials selected to match the coefficient of thermal expansion of the substrate to that of the constraining ring. Circuit components including capacitors and resistors are formed on the constraining ring to provide enhanced electrical properties without adding to the size of the device.

Abstract: A method and encapsulation material for encapsulating the solder joints of an IC device mounted on the substrate of an electronic circuit assembly. The encapsulation material is formulated to be sufficiently opaque to x-radiation to enable the use of x-radiation imaging techniques to detect air pockets and voids in the encapsulation material that might degrade the fatigue life properties of the solder joints encapsulated by the encapsulation material. For the purpose of enhancing the fatigue life properties of the solder joints, the encapsulation material contains a filler material dispersed in a polymeric material, such as an epoxy, such that the encapsulation material is characterized by a coefficient of thermal expansion approximately equal to that of the solder joints. The filler material contains a sufficient amount of an element to render the encapsulation material opaque to x-radiation.

Abstract: First and second electrically insulating substrates are joined with each other at respective joining faces thereof. Each of the first and second insulating substrates has an annular groove at the joining face, and a plurality of through holes along outer and inner peripheries of the annular groove. An annular core is mounted in the annular groove. A cylindrical connection is formed in each through hole, and a radial connection is formed on an outer surface of each insulating substrate so as to connect opposite cylindrical connections. A toroidal coil is formed by serially connecting cylindrical connections and radial connections. An IC chip is mounted on the outer surface of the first insulating substrate, and connected to the toroidal coil and electronic part. The toroidal coil and the electronic part are coated with an electrically insulating material.

Abstract: A surface mount package for containing a board-mounted power supply, a method of manufacturing the same and a board-mounted power supply employing the package. In one embodiment, the package includes: (1) a plurality of leads having first ends and second, surface mount ends, (2) a dielectric lead frame that retains the plurality of leads in predetermined positions relative to one another such that at least some of the second, surface mount ends are co-planar, the first ends couplable to the board-mounted power supply, (3) a shell, coupled to the lead frame, that forms a portion of a periphery of the surface mount package and (4) potting material located between the lead frame and the shell.

Abstract: A mounted structure of printed circuit board in semiconductor package, the mounted structure comprising a solder resist formed with at least more than one tunnel connecting outsides with respective pads of printed circuit board mounted with substrate, whereby the solder resist is improved in construction thereof to allow the flux gas to be easily extracted for prevention of generation of void.

Abstract: There is disclosed herein a surface mount printed circuit board having a substrate, at least one surface mount device, at least two mounting pads per device, solder joints connecting the terminations of the device to their respective mounting pads, at least one rectangular lifter pad on the substrate amid the mounting pads, and a solder mass on each lifter pad in contact with the bottom surface of the device. The inner and outer extensions of the mounting pads, the size, number, and shape of the lifter pads, and the amounts of solder deposited on the mounting and lifter pads are designed such that the solder joint has preferably convex outer fillets, the device is maintained at a predetermined height above the mounting pads, the inner fillet angle is maintained above a predetermined minimum angle to increase solder joint crack initiation time, and the overall solder joint crack propagation length is increased.

Abstract: An improved circuit module construction for mounting and interconnecting electronic components to substrates, which is applicable to mounting a wide variety of electronic components and conductors, including inverted or `flip chip` mounted integrated circuits. The components are mounted to the substrate with a sandwiched non-conductive polymer layer which acts as the bonding agent and underfill. The substrate and underfill have apertures aligned with signal traces on the substrate and the contacts of the component and conductive polymer is injected through the apertures to fill the area between the substrate contacts and the component contacts, to secure good electrical connection. In one embodiment the non-conductive polymer is printed on the contact side of the substrate with gaps for the contacts. In another embodiment B-staged non-conductive polymer is coated on the non-contact side of the substrate, prior to forming contact apertures and mounting of components.

Abstract: A method for joining a component to a substrate applies a base solder portion to the substrate and provides a standoff solder portion in the base solder portion. The standoff solder portion has a higher melting temperature than the base solder portion and a height which substantially corresponds to a desired standoff height between the component and the substrate. The component is positioned on the standoff solder portion and the base solder portion is melted under reflow conditions to form a solder joint between the component and the substrate. This joint substantially encapsulates the standoff solder portion, wherein the reflow conditions create a dendritic structure between the base solder portion and the standoff solder portion.

Abstract: A communication device is designed to contain the lowest possible level of toxic or hazardous materials, so that when it is eventually disposed of, it will not harm the environment and can be safely recycled. Each component A.sub.1, A.sub.2, . . . , A.sub.n in the communication device has a calculated Component Toxicity Index value. A Product Toxicity Index for the entire communication device is calculated by summing the individual Component Toxicity Index values. The desired outcome is a communication device having a Product Toxicity Index less than or equal to 100. The resulting communication device is referred to as "environmentally friendly". The communication device may be a two-way radio (10), and some of the components are a radio transmitter (12), a radio receiver (14), an antenna (16), an amplifier (18), a battery (20) and a housing (22).

Abstract: A thick-film conductor paste and thick-film conductors formed therefrom. The conductor paste is composed of metallic particles coated with a barrier layer that reduces leaching and solder diffusion into the conductor, thereby improving the reliability of the conductor-solder bond. The barrier layer may be continuous or discontinuous, and may be applied to some or all of the metallic particles of the conductor paste.

Abstract: An apparatus and method for packaging a microelectronic device to be connectable to a distribution circuit. The apparatus is in the form of a microelectronic package including a microelectronic device having first and second oppositely facing surfaces and a plurality of Input/Output pads on the first surface capable of being electrically interconnected to a distribution circuit, a base adapted to support the microelectronic device in a predetermined operative relationship to a distribution circuit, and a first layer of elastomer gel sandwiched between the first surface and the base. The first surface of the microelectronic device overlays the base so as to allow an electrical interconnection through the base between the microelectronic device and a distribution circuit.

Abstract: A surface-mounting structure of a surface-mounting electronic device onto the surface of a circuit medium is provided. An external terminal of the device has a first mounting surface on which a first set of protrusions are formed. The first mounting surface includes a first uncovered space in the remaining area of the first set of protrusions. A mounting pad of the circuit medium has a second mounting surface on which a second set of protrusions are formed. The second mounting surface includes a second uncovered space in the remaining area of the second set of protrusions. The second mounting surface is opposite to the first mounting surface. The second set of protrusions are inserted into the first uncovered space. The first set of protrusions are inserted into the second uncovered space. A bonding material is placed between the first and second mounting surfaces.

Abstract: The semiconductor package contains the substrate with a stacked structure; the semiconductor device mounted on the top of the substrate and provided with the electrode pads; the input/output terminals on the bottom of the substrate, which connects the semiconductor package to the printed circuit board; and the conductive tubes going through the substrate, which connects the input/output terminals and the electrode pads. The surface-mounted semiconductor package has the protecting device on its sides. The protect device prevents water and the like from infiltrating the edges of the substrate, and additionally avoid a crack of the substrate due to expansion of the water. Furthermore, the protecting device has the pairs of lands on both sides of the substrate, which fasten the edges of the substrate.

Abstract: A structure for connecting an integrated circuit chip to a wiring substrate which implements high-density packaging, high-density connection, high-speed signal transmission, and low cost. An integrated circuit is connected to a wiring substrate by means of flip-chip die bonding using an adhesive film. A direct through-hole connection is formed directly below a connecting pad so as to pass through the adhesive film and the wiring substrate. This direct through-hole connection directly connects the connecting pad to the wire. As a result of reduced area and thickness of the chip, the chip is mounted in high density, and high-density inputs and outputs are implemented by means of minute two-dimensional connections. Short wire connections directly connected to the chip permit high speed signal transmission, and high reliability is ensured by the dispersion of stress. Low-cost packaging can be effected by simple processes and facilities.

Abstract: A connector for microelectronic includes a sheet-like body having a plurality of holes, desirably arranged in a regular grid pattern. Each hole is provided with a resilient laminar contact such as a ring of a sheet metal having a plurality of projections extending inwardly over the hole of a first major surface of the body. Terminals on a second surface of the connector body are electrically connected to the contacts. The connector can be attached to a substrate such a multi-layer circuit panel so that the terminals on the connector are electrically connected to the leads within the substrate. Microelectronic elements having bump leads thereon may be engaged with the connector and hence connected to the substrate, by advancing the bump leads into the holes of the connector to engage the bump leads with the contacts. The assembly can be tested, and if found acceptable, the bump leads can be permanently bonded to the contacts.

Abstract: A microelectronic assembly including elements such as a semiconductor chip and substrate has electrical connections between the elements incorporating fusible conductive metal masses. The fusible masses are surrounded and contained by a compliant material such as an elastomer or gel. The fusible material may melt during operation or processing of the device to relieve thermal cycling stress in the electrical connections.

Abstract: A self-supporting redistribution structure for directly mounting a semi-conductor chip to a multilayer electronic substrate is separately fabricated and then laminated to the multilayer substrate. The redistribution structure comprises a dielectric layer having plated vias communicating between its two major surfaces, redistribution lines and input/output pads on its upper major surface and joining patterns on its lower margin surface for electrical connection with the multilayer substrate. The metal plating in the plated vias of the redistribution device connects respective input/output pads on the upper surface of the redistribution structures with the joining patterns on its lower major surface. Input/output pads define an even (planar) topography with the redistribution lines to facilitate flip chip joining.

Abstract: A printed circuit board carries a microcircuit package electrically connected to bare copper connector pads on the printed circuit board microcircuit package by aluminum wires. The copper connection pads are encapsulated by a material such as low stress liquid encapsulant having a thermal expansion coefficient approximately equal to that of the printed circuit board substrate material. Preferably the printed circuit board laminate comprises cellulose epoxy mat such as CEM-1.

Abstract: A method of attaching a microchip onto a circuit board is described. The method may include: forming a core portion of thermally conductive and electrically conductive material 50; forming a perimeter portion of thermally conductive and electrically nonconductive material 54; placing the core portion of thermally conductive and electrically conductive material 50 at a site on a circuit board 58 where the microchip 56 will be bonded; placing the perimeter portion of thermally conductive and electrically non-conductive material 54 around the core portion 50 on the circuit board; and attaching microchip component 56 to the core portion 50 and the perimeter portion 54. The method may also include applying a catalyst on the circuit board before attaching the core and perimeter portions. The method may also include curing the core portion and the perimeter portion at 90 degrees C. for 10 minutes and then applying a catalyst on the core portion and the perimeter portion.

Abstract: A method and structure for controlling solder height of a surface mount device on a substrate uses electrical connection pads (105, 105') disposed onto a substrate (101). A height control pad (111) is also disposed onto the substrate (101) positioned apart from the electrical connection pads (105, 105'). Solder fillets (107, 107', 113) are disposed onto both the electrical connection pads (105, 105') and the height control pad (111). A component (103) having an electrical termination portion (109, 109') in contact with the solder fillets (107, 107') associated with the electrical connection pads (105, 105 ') and a body portion (115) in contact with the solder fillet (113) associated with the height control pad (111).

Abstract: A plurality of rigid, generally spherical contact elements are attached to the solder balls of a ball grid array (BGA) package to provide rigid contact points that are suitable for engagement with the contacts of a direct BGA socket assembly. The contact elements include a flattened circumferential surface and a circumferential groove formed in the flattened surface. The circumferential groove divides the contact element into opposing hemispheres. An alignment assembly for aligning the contact elements with the BGA solder ball footprint includes a carrier sheet of electrically insulative, flexible material having a plurality of holes arranged in a predetermined array corresponding to the footprint of solder balls. The contact elements are snap received within the holes of the carrier sheet such that one hemisphere of the contact element is disposed on each side of the carrier sheet.

Abstract: There is provided a highly reliable panel assembly structure capable of performing fine-pitch high-density assembling at a high yield and a low cost. A flexible wiring board has a film-like substrate with flexibility, and an IC chip is mounted in an area. In the area is provided a through hole that has plane dimensions smaller than plane dimensions of the chip and penetrates the substrate. Portions that belong respectively to an output side wiring line and an input side wiring line provided on a substrate surface and are connected respectively to an output side electrode and an input side electrode of the chip via second connection materials and are supported by the substrate surface. An output terminal of the flexible wiring board is connected to an electrode terminal formed at a peripheral portion of a panel via a first connection material, while an input terminal of the flexible wiring board is connected to an electrode terminal of a circuit board via a third connection material.

Abstract: The present method employs a first plating resist for forming circuit lines on a carrier substrate. While the plating resist is still in place a metal, such as nickel, is deposited on top of the circuit lines. A second plating resist is employed for plating solder on the circuit lines at solder sites. At this stage additional solder can be deposited at each solder site to provide or supplement the necessary low melt solder required for forming a solder joint. The first and second resists along with solder thereon are then stripped and copper foil on the carrier substrate is etched away around the circuit lines. A soldermask is then formed on the carrier substrate over the circuit lines except for circuit lines in the chip sites. The soldermask has a single large opening at each chip site which has lateral dimensions which are slightly larger than the lateral dimensions of the chip to be connected at the chip site.

Abstract: An adapter (1, FIG. 1) is provided for the connection of an optoelectronic component such as an LED (light emitting diode) (2) to a circuit board (8) that lies in a case (34), wherein the adaptor positions the LED close to a window (32) in the top wall (30) of the case. The adapter has a pair of passages (4, 5) for holding conductors (11, 12) that connect terminals of the LED to SMD (surface mount device) contacts (6) that connect to the circuit board. The adapter holds the LED high enough above the circuit board, for the upper face (36) of the LED to lie in or close to the level of the window, so light from the LED can be readily seen from outside the case.

Abstract: A high-frequency electronic component includes: a base substrate and a high-frequency electronic component element which is mounted on one face of the base substrate by soldering. The base substrate is made of bismaleimide-triazine resin.

Abstract: An opening is formed in a region of a circuit board opposite a vibration region E of a piezoelectric element. The piezoelectric element is mounted to the circuit board, and electrical connections extend between and support the piezoelectric element from the circuit board by a solder. The soldered connection portions are surrounded by a bonding agent. An opening in the circuit board prevents any excess bonding agent from invading the vibration region E of the piezoelectric element, and the bonding agent assists in dispersing stresses exerted on the circuit board thereby minimizing the stresses transferred to the piezoelectric element.

Abstract: There is provided a display panel assembly structure capable of achieving a highly reliable connection even when fine-pitch electrode terminals are employed. A second electrode terminal is embedded in a flexible printed circuit board, and protrudes slightly from the flexible printed circuit board within a range of 0 to 2.times.10.sup.-3 mm. By embedding the second electrode terminal in the flexible printed circuit board, an apparent thickness of the second electrode terminal is reduced while keeping the rigidity of the second electrode terminal to thereby improve etching accuracy of a top surface thereof. With the reduction of the protrusion amount of the second electrode terminal, a ratio of a thickness of an anisotropic conductive film to a diameter of a conductive particle can be made to be approximately "1".

Abstract: The ball grid array package (10) uses a flexible base (30) having a substantially flat center plate (34) disposed at a first level coupled to a substantially flat base plate (32) disposed at a second level. The center plate (34) is coupled to the base plate (32) by a plurality of flexible narrow straps (36-38) arranged substantially surrounding the center plate (34). The flexible base (30) accommodates the thermal expansion in the pedestal (18) caused by the powered up integrated circuit (16) so that the rest of the package does not expand and induce stress in the solder joint between the ball grid array (12) and the printed circuit board (14).

Abstract: Conductive thermoplastic interconnects (120) for electronic devices are disclosed. The interconnects may take the form of bumps or spheres, and may be used in applications where metal bumps are conventionally used. Bumps (310) may be attached by retaining them in a vacuum fixture (312) and momentarily contacting them with the substrate (316) requiring the bumps (310). The substrate (316) has been heated sufficiently to cause wetting of the conductive thermoplastic bump (310).

Abstract: A plastic encapsulated integrated circuit package is disclosed which comprises a multilayer ground plane assembly bonded to a lead frame with an integrated circuit die bonded to the composite assembly. The multilayer ground plane assembly is first formed by bonding together a metal sheet, such as a copper sheet, and a thermally conductive insulating layer, such as a thermally conductive polyimide material, to which is also bonded a layer of a b-stage adhesive material. The ground plane assembly may be bonded to the lead frame by placing the b-stage adhesive layer of the ground plane assembly against the lead frame and heating the ground plane assembly and lead frame to a temperature of from about 120.degree. C. to just under 200.degree. C. for a time period not exceeding about 10 seconds to bond the b-stage adhesive layer to the lead frame without oxidizing the lead frame.

Abstract: A solder pad for mechanically and electrically coupling solder terminals (420) of electronic devices (410) to a non-conductive ceramic substrate (130) includes a solder pad portion (110) of a conductive runner (120) and a solder wettable layer (210). The solder pad portion (110) of the conductive runner (120) is on the non-conductive ceramic substrate (130). The conductive runner (120) consists essentially of a conductive ceramic material. The solder wettable layer (210) is attached to the solder pad portion (110). The solder wettable layer (210) includes at least 50% indium by weight.