Abstract: A wiring board includes a substrate having an opening portion, electronic components positioned in the opening portion of the substrate and including first and second electronic components, and an insulation layer formed over the substrate and the first and second components. The first component has first and second electrodes having side portions on side surfaces of the first component, the second component has first and second electrodes having side portions on side surfaces of the second component, the first electrode of the first component and the first electrode of the second component are set to have substantially the same electric potential, and the first component and the second component are positioned in the opening portion of the substrate such that the side portion of the first electrode of the first component is beside the side portion of the first electrode of the second component.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of thermal via structures with surface features. In some embodiments the surface features may have dimensions greater than approximately one micron. The thermal via structures may be incorporated into a substrate of an integrated circuit device. Other embodiments may be described and/or claimed.

Abstract: A plastic panel forming part of a motor vehicle is disclosed having a number of embedded conductors for electrically connecting together an electrical connector and an electrical unit. Parts of the electrical connector and the electrical unit are formed as integral parts of the plastic panel. The electrical connector includes terminals connected to the electrical conductors for co-operation with terminals formed as part of a plug used to connect the conductors to other electrical circuits of the motor vehicle. In one embodiment the electrical unit is in the form of a fuse box having electrical terminals held in position by the plastic panel and in pairs for cooperation with a respective fuse.

Abstract: A surface mount component adapter, assembly and related method for attaching a surface mount component to a printed circuit board. The surface mount component adapter includes a substrate, a surface mount component holder on the substrate, and flexible leads each having a base end attached to the surface mount component holder and a free end configured to engage a plated through hole on a circuit board. The surface mount component holder is configured to engage electrical contacts of a surface mount component. The surface mount component assembly combines the surface mount adapter with the surface mount component. In the surface mount component method, the surface mount assembly is formed and the free ends of the flexible leads are attached to a corresponding number of the plated through holes on the circuit board.

Abstract: An isolated switching power converter includes a power isolation transformer having at least one primary winding, at least one secondary winding and a plurality of sides, a first power board mechanically coupled to a first side of the transformer, and a second power board mechanically coupled to a second side of the transformer. The first power board includes a primary side circuit electrically coupled to the at least one primary winding, and the second power board includes a secondary side circuit electrically coupled to the at least one secondary winding.

Abstract: Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods are disclosed. A system in accordance with one embodiment includes a support member having first package bond sites electrically coupled to leadframe bond sites. A microelectronic die can be carried by the support member and electrically coupled to the first packaged bond sites. A leadframe can be attached to the leadframe bond sites so as to extend adjacent to the microelectronic die, with the die positioned between the leadframe and the support member. The leadframe can include second package bond sites facing away from the first package bond sites. An encapsulant can at least partially surround the leadframe and the microelectronic die, with the first and second package bond sites accessible from outside the encapsulant.

Abstract: A package structure includes a base body having a first encapsulant and a wiring layer embedded in and exposed from the first encapsulant. The wiring layer has a plurality of conductive traces and a plurality of first electrical contact pads. The first encapsulant has openings for exposing the first electrical contact pads, a chip electrically connected to the wiring layer, and a second encapsulant formed on the base body for covering the chip and the wiring layer, thereby providing an even surface for preventing the encapsulant from cracking when the chip is mounted.

Abstract: A flat panel display apparatus includes a substrate; a display unit disposed on the substrate; a sealing substrate disposed to face the display unit; a sealing member disposed between the substrate and the sealing substrate to surround the display unit; a wiring unit disposed between the substrate and the sealing substrate, including a region that overlaps the sealing member, and including a plurality of wiring members that are spaced apart from each other in at least a portion of the region that overlaps the sealing member; and a lead-in unit connected to the wiring unit to apply a voltage to the wiring unit, and formed to be electrically connectable to an external power source.

Abstract: An electrode bonding structure sealed with a sealing resin, in which a flexible substrate is bonded to a first substrate via an adhesive, wherein: a region along a bottom face edge of an flexible substrate end part is bonded, via the adhesive, to an inner side region of a region along a top face edge of an first substrate end part; a gap is formed between an inner side region of the region along the bottom face edge of the flexible substrate end part and the region along the top face edge of the first substrate end part; the sealing resin is formed so as to enter, while covering a top face of the flexible substrate end part, at least a portion of the gap; and a height of the gap gets smaller towards the adhesive from the top face edge of the first substrate end part.

Abstract: A module includes a multilayer body including laminated ceramic green sheets that have been fired, multiple mounting terminals arranged to mount a component thereon, the mounting terminals each including an end surface that is exposed at a main surface of the multilayer body, and multiple via conductors disposed inside the multilayer body so as to correspond to the mounting terminals at positions overlapped by the corresponding mounting terminals when viewed in a plan view. The lengths of the via conductors are adjusted so that predetermined points on the mounting terminals are positioned on the same plane.

Abstract: A method for forming vias in a multilayered printed circuit board is disclosed, which includes providing a multilayered printed circuit board having at least two or more layers; placing a donut pad on an upper layer of at least one layer of the multilayered printed circuit board for forming a via through one or more of the layers of the multilayered printed circuit board, the donut pad having a clearance of less than approximately 80 to 90 percent of a diameter of the via; and forming at least one via through the donut pad and at least one or more layers of the multilayered printed circuit board.

Abstract: This disclosure relates generally to a chip package assembly arranged to be electrically coupled to a circuit board including a plurality of circuit board contacts. The chip package assembly may include a chip package including a first side and a second side, the second side including a first plurality of contacts arranged to be electrically coupled to the plurality of circuit board contacts and a second plurality of contacts arranged to be electrically coupled to a remote device via a connector assembly.

Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface.

Abstract: A printed circuit board includes a printed circuit board, a semiconductor device mounted on the printed circuit board, a capacitor element mounted on the printed circuit board 2, a ground conductor plane to which a ground terminal of the semiconductor device is connected, and first and second power source conductor planes which are arranged so as not to contact with each other. The second power source conductor plane and the ground conductor plane are arranged so as to oppose to each other to form a planar capacitor. The printed circuit board has a first connecting conductor which connects a power source terminal of the semiconductor device with the second power source conductor plane, and a second connecting conductor which connects the first power source conductor plane with the second power source conductor plane through a first terminal of the capacitor element. Thereby, an electromagnetic radiation noise is reduced.

Abstract: A main body of an electronic part has multiple electrodes, to which multiple terminals are connected. The terminals include a normal terminal and a fuse terminal, each of which extends from lands formed in a printed board so as to hold the main body at a position above and separated from a board surface of the printed board. The fuse terminal has a cut-off portion having a smaller width than other portions of the fuse terminal, so that the cut-off portion is melted down when excess current flows in the fuse terminal. The normal terminal holds the main body at the position above and separated from the board surface even in a case of melt-down of the cut-off portion.

Abstract: An interconnection technology may use molded solder to define solder balls. A mask layer may be patterned to form cavities and solder paste deposited in the cavities. Upon heating, solder balls are formed. The cavity is defined by spaced walls to keep the solder ball from bridging during a bonding process. In some embodiments, the solder bumps connected to the solder balls may have facing surfaces which are larger than the facing surfaces of the solder ball.

Abstract: A connection structure for an electronic component, which is set on two lead frames spaced apart from each other. The electronic component is connected to the two lead frames by a conductive joining member. The connection structure includes two electrodes arranged on at least portions of a lower surface of the electronic component. The two electrodes respectively face the two lead frames. A receiving surface is included in each of the two lead frames immediately below the corresponding electrode. The receiving surface extends from a supporting portion supporting the electronic component toward the other one of the lead frames and away from the electronic component. The conductive joining member is located between the receiving surface of each of the two lead frames and the corresponding one of the electrodes.

Abstract: A main body of an electronic part is formed in a rectangular pillared shape having a first and a second axial end surface. A first electrode is formed on the first axial end surface electrically and mechanically connected to a first wiring pattern formed on a board surface of a printed board. A second electrode is formed on the second axial end surface, to which one end of a fuse terminal is electrically connected. The other end of the fuse terminal is connected to a second wiring pattern of the printed board or a wiring member which is formed as an independent member from the printed board. A cut-off portion is formed in a connecting portion of the fuse terminal.

Abstract: A semiconductor device for mounting on a wiring board includes: a container for containing a semiconductor chip; and a plurality of leads, each of the plurality of leads includes a mount connection portion at one end for the semiconductor device to be connected to the wiring board, wherein the plurality of leads includes first leads and second leads, a signal transmission rate of the first leads is higher than that of the second leads, and the mount connection portion of each of the first leads is smaller than that of each of the second leads.

Abstract: A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.

Abstract: In ultrasonic bonding of a metal terminal to a substrate pad, a thin buffer metal layer which is formed of a soft metal or a highly slidable metal is interposed between a terminal edge and a pad so as to prevent direct contact between an end of the terminal and the pad upon bonding. This makes it possible to prevent abrasion and a crack in the pad at the end of the terminal caused by pressure and an ultrasonic wave upon the ultrasonic bonding. This makes it possible to realize a compact bonded structure with high reliability.

Abstract: An electrical connection structure of an electronic board includes: a board support member formed of synthetic resin; an electronic board fixed to the board support member; an electrical connection pad disposed on the electronic board; a bus bar disposed in the board support member; and a bonding wire that electrically connects the electrical connection pad and the bus bar. The bus bar includes: an exposed portion exposed in a face of the board support member; an embedded portion embedded in the board support member; and a connection portion extending from the exposed portion and being electrically connected to an electrical component. An end of the bonding wire is bonded to the exposed portion, and a first cut portion is formed in the embedded portion.

Abstract: Provided is technology that stably fixes a plurality of harnesses all at once, without using a wire holder. A line-shaping section 30 for routing harnesses 99 is created in a front cabinet forming section 20. The line-shaping section 30 comprises two ribs 40 separated by a prescribed distance and a hook 50 positioned in the center thereof and created so as to cover from the top, when viewed from the side surface. The harnesses 99 held by the ribs 40 and the hook are prevented from being displaced outside, by a hook locking section 54. In addition, routing work for the harnesses 99 is able to be performed smoothly since a sloping surface (a guide section 56) is created in a tip part of the hook locking section 54.

Abstract: A technology enabling reduction of the size of a semiconductor device including a micro and a power MOSFET is provided. The semiconductor device is obtained by single packaging a first semiconductor chip with a micro formed therein and second semiconductor chips with a power MOSFET formed therein. This makes it possible to reduce the size of the semiconductor device as compared with cases where a first semiconductor chip with a micro formed therein and second semiconductor chips with a power MOSFET formed therein are separately packaged.

Abstract: Provided is a compact semiconductor device having high joint reliability of multiple first ball electrodes arrayed on one surface of a first interposer. On a surface (233a) of a second interposer (233) facing a first interposer (213), second ball electrodes (235) are arranged at grid points at which multiple first straight lines extending in one direction are intersected with multiple second straight lines extending in a direction different from the multiple first straight lines. Corner grid points closest to the corners of the second interposer (233) are set as non-joint grid points at which the first and second interposers (213, 233) are not joined to each other.

Abstract: A wiring structure for improving a crown-like defect and a fabrication method thereof are provided. The method includes the following steps. A substrate, on which a seed layer and a patterned photoresist layer with an opening are formed, is provided. A copper layer, having a bottom covering the seed layer, is formed in the opening. A barrier layer covering at least one top portion of the copper layer is formed on the copper layer. An oxidation potential of the barrier layer is greater than that of the copper layer. The patterned photoresist layer is removed to perform an etching process, wherein the copper layer and a portion of the seed layer exposed are etched to form a wiring layer. An immersion process is performed to form an anti-oxidation layer comprehensively on exposed surfaces of the barrier layer and the wiring layer.

Abstract: An electronic device comprises a functional stack (10) and a cover (50) coupled thereto by an insulating adhesive layer (30). The functional stack (10) comprises a first transparent and electrically conductive layer (22), a second electrically conductive layer (24) and a functional structure (26), comprising at least one layer, sandwiched between said first and second conductive layer. The cover (50) includes a substrate (52) and at least a first conductive structure (66, 68) that is arranged in a first plane between the adhesive layer (28) and the substrate (52). First and second transverse electrical conductors (32, 34) transverse to the first plane (61) electrically interconnect the first and the second electrically conductive layer (22, 24) with the first and the second conductive structure (66, 68) in the first plane (61).

Abstract: An LTCC carrier composed of thermosetting polymer, woven glass fiber and ceramic has gold over nickel contact pads on top and bottom surfaces and conductive vias therethrough between aligned pairs of top and bottom pads. The vias prevent undesirable inductive paths from limiting high frequency operation of the circuitry. Solder deposits on the top pads attach the LTCC component, which is further secured to the carrier by epoxy, thus improving resistance to thermal stress and mechanical shock. A slot through the carrier body between top and bottom surfaces further reduces thermal stress and mechanical shock. Metallized castellations on opposite carrier sides provide additional surface area for reflow solder joints with the PCB, and a means for visually inspecting the solder joint quality. A gap in the metallization on the top layer of the carrier prevents solder spreading during multiple soldering cycles, which may result in poor solder joints.

Abstract: A motherboard assembly includes a motherboard and an expansion apparatus. The motherboard includes a first expansion slot. An edge connector is set on a bottom side of the expansion apparatus to be detachably engaged in the first expansion slot. A number of SATA interfaces and a number of second expansion slots are arranged on the expansion apparatus, and are connected to signal pins and power pins of the edge connector.

Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.

Abstract: First and second terminals project from a circuit board and lie adjacent to each other with an interspace formed between the first and second terminals. An electronic apparatus further includes a projecting member projecting along a neighboring terminal which is one of the first and second terminals at such a position that the neighboring terminal is located between the projecting member and the interspace. The projecting member is located at an adjacent position adjacent to the neighboring terminal, to attract molten solder from the interspace toward the projecting member during soldering to join the first and second terminals to the circuit board.

Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.

Abstract: Some invention embodiments relate to a method for forming a fuse which electrically connects two metal surfaces (2) that are arranged on a printed circuit board (4) next to each other and spaced apart from each other. It is provided according to the invention that the two metal surfaces (2) are each partially covered with a protective coating (5), wherein a partial region forming a contact region (2a) remains uncovered, liquid soft solder material (1) which bridges the gap between the two metal surfaces (2) is applied onto the two uncovered partial regions (2a), and the protective coating (5) in a surrounding area of the solder material (1) is removed after the soft solder material (1) has solidified, in order to form receiving regions (2b) which are wetted by the solder material (1) when the latter fuses, with the result that the solder material (1) flows off from a printed circuit board region (3) between the two metal surfaces (2) and the electrical contact formed by the solder material (1) is interrupted.

Abstract: A printed board includes a printed board body having a first side, a second side opposing the first side, and a through-hole; a printed conductor disposed on the first side of the printed board body; and a bus bar disposed on the second side of the printed board body, the bus bar including a terminal that extends through the through-hole. The terminal includes a plurality of branched terminal portions at a position corresponding to an interior of the through-hole, and at least one of the branched terminal portions is bent and attached to the printed conductor.

Abstract: In one embodiment, a load frame and an integrated circuit device are aligned, with a base frame carried on a substrate, along a first alignment axis defined by a first alignment post extending from the base frame to the load frame, in a direction transverse to the substrate, and a first biasing device carried on the base frame is actuated to engage and bias the load frame toward the base frame aligned with the load frame, and to bias the integrated circuit toward the substrate. A latch latches the load and base frames together, aligned with and biased towards each other with the integrated circuit device and the substrate aligned with, and biased toward each other. Other aspects and features are also described.

Abstract: A high-frequency module includes first and second switch IC elements and a substrate. The first and second switch IC elements are the same or substantially the same IC chips, and are mounted in the same or substantially the same orientation. The first switch IC element is mounted on the substrate. The second switch IC element is mounted above the first switch IC element. Due to wire bonding, the individual pad electrodes of the first and second switch IC elements are connected to the land electrodes of the substrate, which are to be connected to the individual pad electrodes. Between a pad electrode and a land electrode connected to each other, another land electrode is not provided.

Abstract: A method of manufacturing an LED package includes mounting a large panel frame/substrate (LPF/S) having a substantially square shape to a ring. The LPF/S includes a plurality of die pads and a corresponding plurality of leads arranged in a matrix pattern. Each of the die pads includes a planar chip attach surface. An LED chip is attached to the planar chip attach surface of each of the die pads. An encapsulant material is applied overlaying the LED chips and at least a part of the LPF/S. Each die pad and corresponding leads are separated from the LPF/S to form individual LED packages. The steps of attaching the LED chips and applying the encapsulant material are performed while the LPF/S is mounted to the ring.

Abstract: An electronic device includes a main body and a port connector. The main body includes a printed circuit board, a bottom plate and a side plate cooperatively defining a opening. The printed circuit board is fixed parallelly to the bottom plate. The port connector includes an outer angled plate having a first wall, a second wall, and first pins and second pins. The first wall is attached to the bottom plate and defines first ports. The second wall is attached to the side plate and defines second ports. Each of the first pins is retained within one of the first ports and contacting the printed circuit board. Each of the second pins is retained within one of the second ports and contacting the printed circuit board.

Abstract: Assembly of at least one microelectronic chip with a wire element, the chip comprising a groove for embedment of the wire element. The wire element is a strand with a longitudinal axis substantially parallel to the axis of the groove, comprising at least two electrically conducting wires covered with insulator. The chip comprises at least one electrically conducting bump in the groove, this bump being in electric contact with a stripped area of a single one of the electrically conducting wires of the strand.

Abstract: A rear surface opposite to one plane of a die pad is formed to be exposed from one plane of a sealing resin. In addition, a concave portion disposed to be parallel with at least a first side of an outermost edge of a central structure and a second side adjacent to the first side, respectively, is formed in the one plane of the sealing resin. Here, a depth of the concave portion is equal to or greater than a height of the outermost edge of the central structure.

Abstract: A submount with an electrode layer having excellent wettability in soldering and method of manufacturing the same are disclosed. A submount (1) for having a semiconductor device mounted thereon comprises a submount substrate (2), a substrate protective layer (3) formed on a surface of the submount substrate (2), an electrode layer (4) formed on the substrate protective layer (3) and a solder layer (5) formed on the electrode layer (3) wherein the electrode layer (4) is made having an average surface roughness of less than 1 ?m. The reduced average surface roughness of the electrode layer (4) improves wettability of the solder layer (5), allowing the solder layer (5) and a semiconductor device to be firmly bonded together without any flux therebetween. A submount (1) is thus obtained which with the semiconductor device mounted thereon is reduced in heat resistance, reducing its temperature rise and improving its performance and service life.

Abstract: A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. A lead (30) and lead (28) though which high current passes are disposed superimposed on the upper surface of a circuit board (12). Also, a plurality of ceramic substrates (22A-22F) are affixed to the circuit board (12), and transistors, diodes, or resistors are mounted to the upper surface of the ceramic substrates. Furthermore, the circuit elements such as the transistors or diodes are connected to the lead (28) or the other lead (30) via fine metal wires.

Abstract: A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. The hybrid integrated circuit device (10) is provided with: a circuit board (12); a plurality of ceramic substrates (22A-22G) disposed on the top surface of the circuit board (12); circuit elements such as transistors mounted on the top surface of the ceramic substrates (22A-22G); and a lead (29) or the like that is connected to the circuit elements and is exposed to the outside. Furthermore, in the present embodiment, leads (28, 30, 31A-31C) are disposed superimposed in the vicinity of the center of the circuit board (12), and a circuit element such as an IGBT is disposed and electrically connected approaching the region at which the leads are superimposed. The alternating current transformed by the IGBT is output externally via the leads (31A, etc.).

Abstract: A load center comprising a housing and, mounted within the housing as a single pre-fabricated unit of interconnected elements, two power buses, conductive paths branching off from each power bus, respective branch circuit breaker mounting sites each conductively linked to a corresponding one of the two power buses by a respective one of the conductive paths, and current sensors each association with a respective one of the conductive paths branching off from the power buses to provide an output responsive to current passing through said respective conductive path from the corresponding one of the two power buses to the respective branch circuit breaker mounting site. A processor in the housing receives current level signals indicative of the current passing through the conductive paths to produce, and preferably transmit, data for consideration in terms of power consumption by branch circuits fed through the load center.

Abstract: A circuit board system includes a first circuit board (201) furnished with SMD components (202) and conductive patterns (203). There are one or more surface-mounted support elements (206) on the first circuit board. Each of them includes an electrically conductive bottom surface (207) soldered to a respective conductive pattern (203) of the first circuit board (201). A second circuit board (208) is mechanically connected to the one or more support elements (206). At least one electronic component (209) is mounted to the second circuit board (208) and electrically coupled to at least one conductive pattern (203) of the first circuit board (201) through at least one of the support elements (206).

Abstract: An electronic component includes: an electronic component body; and a lead secured to the electric component and including a projection portion defined by first and second inclined portions facing each other. The solder wettability of the first inclined portion is smaller than the solder wettability of the second inclined portion.

Abstract: In accordance with the teaching of the present invention, a system and method for securing a ball grid array to a printed wire board is provided. In a particular embodiment, a ball grid array comprises one or more balls configured to attach to a spring comprising one or more turns. In addition, there is a spacer plate configured to align and separate the springs, a soldering aid configured to align solder on the printed wire board and a printed wire board configured with conductive pads to attach to the ball grid array via the springs.

Abstract: An electrical device that is electrically and mechanically connectable to another electrical device includes a face equipped with contact pads. An adhesive layer is on the face equipped with the contact pads. The adhesive layer is composed of a substance with adhesive properties. A plurality of openings through the adhesive are layer over each contact pad, and small metal sticks which have been grown electrolessly or electrochemically are in the areas where the openings have been created to form a plurality of conductive paths over each contact pad, the volume of which is defined by the openings.

Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.

Abstract: A package structure and an electronic apparatus of the package structure are disclosed. The package structure includes a substrate and a plurality of pins. The plurality of pins is disposed on the substrate. The plurality of pins is interlaced to each other, so that a line along a specific direction will only pass one of the plurality of pins at most.