Abstract: The present invention relates to a compliant leaded interposer for resiliently attaching and electrically connecting a ball grid array package to a circuit board. The interposer may include a substrate, a plurality of pads, and a plurality of pins. The plurality of pads may be positioned substantially on the top surface of the substrate and arranged in a predetermined pattern substantially corresponding to the solder ball pattern on the ball grid array package. The plurality of pins may be positioned substantially perpendicular to the substrate and may extend through the substrate and the plurality of pads. The interposer may be configured to attach the ball grid array package to the circuit board such that each of the solder balls on the ball grid array package contacts at least a portion the plurality of pins and at least a portion of the plurality of pads and such that the each of the plurality of pins also connects to a contact on the circuit board.

Abstract: A method is disclosed that can be used to interconnect an integrated circuit (IC) multiple die assembly to conductors on a substrate such that signals can be conveyed between the dies and the conductors on the substrate. The multiple die assembly can include a first IC die and at least one secondary IC die, which can be mounted on a surface of the first IC die. Signal paths can be provided between the first IC die and the secondary IC die. The method can include providing conductive contacts on the surface of the first IC die. Each such conductive contact can have a free end extending outward from the surface beyond the secondary IC die. The method can also include mounting the multiple die assembly on the substrate such that the free end of each contact is brought into contact with the conductors on the substrate. The secondary IC die can reside between the surface of the first IC die and the substrate, and the contacts can convey signals between the first IC die and the conductors on the substrate.

Abstract: Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate which can have an integrated circuit die attached thereto. The package includes a dedicated high-speed ground plane that is electrically isolated from the ground plane used to ground the low speed circuitry of the package.

Abstract: Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

Abstract: A method of micro-packaging a component wherein at least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of the substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. A micro-packaged electronic or micromechanic device, including a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing is also disclosed. An electronic or micromechanic component is attached to the electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.

Abstract: An LSI package includes an interface module having first and second surfaces and including a wiring board having a first through hole, a driver selectively provided on the second surface, a transmission line connected to the driver, and a first terminal formed on the second surface and connected to the driver, an interposer having a third surface facing the second surface and a fourth surface, and including a signal processor and a second terminal provided on the third surface, a third terminal provided on the fourth surface and a second through hole, the third surface facing the second surface except a region where the driver portion is provided. The interposer is arranged so that the first through hole matches with the second through hole, and a movable guide pin is inserted into the first and second through holes to position the interface module and the interposer.

Abstract: An electronic component unit including a metallic member and an electronic component, such as a semiconductor element, mounted on the metallic member is encapsulated with molding resin such as epoxy resin, thereby forming an electronic package. The electronic component unit is covered with primer made of a material such as resin to increase an adhesive force of the molding resin to the electronic component unit. A glass transition temperature of both of the molding resin and the primer is set to a temperature higher than 200° C. to keep the adhesive force unchanged at least up to the ambient temperature of 200° C. and to secure a reliability of the electronic package. A metallic lead wire connected to the electronic component may be encapsulated together with the electronic component unit. An entire surface of the electronic component unit may be covered with the primer to further improve the adhesive force.

Abstract: There is provided a printed circuit board in which a PCB and an FPC can be readily located, a solder connection structure and method between a printed circuit board and a flexible printed circuit board. The printed circuit board 1 includes a plurality of pads 2 for mounting a flexible printed circuit board, wherein a solder resist 3 is formed on the surface of the printed circuit board so as to expose the pads 2 and convex portions are formed by insulation print layers 4 around the pads 2.

Abstract: A semiconductor device includes wiring boards each having an insulating board, conductor circuits and through-holes, the insulating board having top and bottom surfaces, the conductor circuits formed on the top and bottom surfaces, the through holes penetrating the insulating board and electrically connecting the conductor circuits of the top and bottom surfaces; conductor posts each having flange, head and leg portions, the flange portion having first and second surfaces and having an external diameter larger than that of the through-hole, the head portion protruding from the first surface, the leg portion protruding from the second surface; and electronic components each having an electrode formed on one or more surfaces and connected to the leg portion. The head portion is inserted until the first surface of the flange portion comes into contact with the bottom surface of the wiring board and electrically connected at an inner wall of the through-hole.

Abstract: The present invention stacks integrated circuit packages into circuit modules. In a preferred embodiment, solder paste and primary adhesive respectively are applied to selected locations on the flex circuitry. Supplemental adhesive is applied to additional locations on the flex circuitry, CSP, or other component. The flex circuitry and the CSP are brought into proximity with each other. During solder reflow operation, a force is applied and the CSP collapses toward the flex circuitry, displacing the primary adhesive and the supplemental adhesive. The supplemental adhesive establishes a bond providing additional support to the flex circuitry. In another embodiment, CSPs or other integrated circuit packages are bonded to each other or to other components with a combination of adhesives. A rapid bond adhesive maintains alignment of the bonded packages and/or components during assembly, and a structural bond adhesive provides additional strength and/or structural integrity to the bond.

Abstract: A plurality of wiring patterns are formed so as to extend in parallel with each other. A plurality of test terminals are formed in a substantially rectangular shape such that respective widths thereof increase toward respective one sides from respective ends of the plurality of wiring patterns. The plurality of test terminals in each group are arranged so as to be aligned along a length direction of the wiring patterns. The wiring patterns are formed so as to be longer in the order, and the test terminals are further away from a mounting region in the order. An interval (width of a plating resist) between the test terminals in each group and the wiring patterns in the other group adjacent thereto is set to decrease in the order.

Abstract: A semiconductor package and associated methods, the semiconductor package including a substrate including a socket, and connection terminals including a solder ball and a supporting portion extending from the solder ball into the socket.

Abstract: A first semiconductor element and a second semiconductor element each have an electrode forming surface with an electrode pad thereon. The first semiconductor element and the second semiconductor element are stacked to expose each electrode pad and bonded while facing the electrode forming surfaces each other. The electrode pads of the first and second semiconductor elements are connected to the first and second connection terminals via bonding wires. A metal circuit board including the first and second connection terminals, and the first and second semiconductor elements are sealed by a sealing material such that parts of the respective connection terminals expose.

Abstract: A thermal conduit to extract heat from an electrical component on a circuit board is disclosed. An electronic assembly according to aspects of the present invention includes an integrated circuit mounted on a circuit board and a thermal conduit having a first and a second portion. The first portion of the thermal conduit is thermally coupled to one or more electrical terminals of the integrated circuit through an opening defined in the circuit board while the second portion of the thermal conduit is thermally coupled to a first material of the circuit board.

Abstract: A wiring board according to the present invention includes: an insulating base 22; a plurality of first conductor wirings 23a aligned in an inner region on the insulating base; bumps 24 formed on the respective first conductor wirings; and a protective film 25a that is formed on the insulating base so as to cover the first conductor wirings and has an opening region through which the bumps are exposed. The height of at least part of a surface of the protective film from a surface of the insulating base is greater than the height of the bumps from the surface of the insulating base. With this configuration, it is possible to decrease the thickness in the state where a protective tape is placed on the wiring board to protect bumps, thereby increasing the length of the wiring board that can be held by a reel for supplying the wiring board.

Abstract: While gradually increasing the widths of signal lines (104a, 104b, 105a, 105b) of first and second groups of differential signal lines (104, 105) to suppress attenuation in the lines, the opening widths of slits (104s, 105s) formed in a GND layer (102) below the differential signal lines are similarly changed. Thereby, impedance matching is realized. Further, by alternately disposing a large-width side and a small-width side of the two groups of differential signal lines (104, 105), the total wiring area widths are reduced.

Abstract: An electronic element module and an electronic device using the same are provided. The electronic element module includes a circuit board and a plurality of electronic elements. In one embodiment, the circuit board has a plurality of leg-holes. Each of the electronic elements includes a body and a plurality of legs that connected to the body. Wherein, the bodies of the electronic elements are glued each other, and the legs of the electronic elements are partially plugged in the leg-holes. In another one embodiment, the circuit board has a plurality of contacts. The electronic element is disposed on the circuit board with a gap therebetween. The electronic element has a plurality of terminals that electrically connect to the contacts of the circuit board correspondingly. Otherwise, the gap is filled with glue.

Abstract: An electrically-conductive pin is inserted into a through hole penetrating through a substrate between a first surface and a second surface defined at the reverse side of the first surface so that the electrically-conductive pin stands upright from the first surface of the substrate. An electronic component is then mounted on the tip end of the electrically-conductive pin standing upright from the first surface. The electrically-conductive pin is inserted into the through hole before an electronic component is mounted on the tip end of the electrically-conductive pin. It is thus extremely easy to insert the electrically-conductive pin into the through hole. As compared with the case where the electrically-conductive pins are first bonded to an electronic component, an operator is released from a troublesome operation of inserting the electrically-conductive pin. The electronic component can be mounted in an efficient manner.

Abstract: A lead frame for LED is disclosed to include a body defining an accommodation chamber, a first bracket frame that has a first bottom base mounted in the accommodation chamber and a first connection leg and a second connection respectively extended from the first bottom base to the outside of the body and bent into shape, and a second bracket frame that has a second bottom base mounted in the accommodation chamber and a third connection leg and a fourth connection leg respectively extended from the second bottom base to the outside of the body and bent into shape.

Abstract: A wiring board includes a first bonding wiring array that is formed by extending conductor wirings, and that extends from an external side of a semiconductor element region and is bonded individually to a first element electrode array of a semiconductor element, and a second bonding wiring array that extends from the external side of the semiconductor element region and is bonded individually to a second element electrode array of the semiconductor element.

Abstract: Photolithography patterned spring contacts are disclosed. The spring contacts may be fabricated using thin film processing techniques. A substrate, such as a silicon wafer or a carrier substrate is provided. At least one layer of a metal or alloy film may be deposited on the substrate or on at least one intervening release layer and patterned to form metal traces. A stressable material, exhibiting an at least partially tensile stress state, may be deposited on the metal traces in a localized region. A portion of the substrate or a portion of the intervening release layer underneath the metal traces may be removed by etching, causing the metal traces to curl upward resulting in the spring contacts. The spring contacts may be used as compliant electrical contacts for electrical devices, such as integrated circuits or carrier substrates. The compliant electrical contacts may also be used for probe cards to test other electrical devices.

Abstract: An electronic component that has a support structure with a plurality of electrical conductors, a series of wire bonds, each of the wire bonds extending from one of the electrical conductors respectively, each of the wire bonds having an end section contacting the electrical conductor and an intermediate section contiguous with the end section, a bead of dam encapsulant encapsulating the electrical conductors and the end section of each of the wire bonds, and a bead of fill encapsulant contacting the bead of dam encapsulant and encapsulating the intermediate portion of each of the wire bonds. The dam encapsulant has a higher modulus of elasticity than the fill encapsulant.

Abstract: A semiconductor integrated circuit device is provided which comprises a semiconductor chip having wire bonding pads and a package encapsulating the semiconductor chip and connected via bonding wires to the wire bonding pads, wherein wire bonding pads on the semiconductor chip are arranged in two rows in a staggered manner along a periphery of the semiconductor chip, and of the wire bonding pads, power supply pads are arranged in a rear row located close to a semiconductor integrated circuit unit as an active area on the semiconductor chip and in a front row, only signal pads are arranged. Because the power supply pads are provided in the rear row, the line width of a power supply line led out from each power supply pad can be made equal to the width of the pad, thus reducing the impedance of the connection circuit between the semiconductor chip and the package, and suppressing generation of radiation noise, ground bounce and so on.

Abstract: Provided is a simplified structure of a circuit device in which a power element generating a large amount of heat is incorporated. The circuit device according to the present invention includes: a circuit board whose surface is covered with an insulating layer; a conductive pattern formed on the surface of the insulating layer; a circuit element electrically connected to the conductive pattern; and a lead connected to a pad formed of the conductive pattern. Furthermore, a power element is fixed to the top surface of a land portion formed of a part of the lead. Accordingly, the land portion serves as a heat sink, thereby contributing to heat dissipation.

Abstract: The present invention provides a wiring board including a first board provided with a first wiring pattern and a second board provided with a second wiring pattern while the first wiring pattern and the second wiring pattern are electrically connected, wherein the first board includes: a board insertion opening in which the second board is inserted; and a first connection pattern provided inside the board insertion opening and electrically connected to the first wiring pattern, and the second board includes: an inserting portion to be inserted into the board insertion opening of the first board; and a second connection pattern provided at a position opposed to the first connection pattern and electrically connected to the second wiring pattern in the case where the inserting portion of the second board is inserted into the board insertion opening of the first board, and further comprising: solder or brazing filler metal applied at least to a surface of one of the first connection pattern and second connection

Abstract: In respect to an electrical connection between a control circuit board 20 and bus bars 14 interbonded together, it is an object to enhance stability in quality and reliability in connection. As a solution for achieving the object, the control circuit board 20 is provided with a conductor segment 26 to be electrically connected to a specific one of the bus bars 14 on the opposite side of a rear surface thereof bonded to the bus bars 14, and a through-hole 24 penetrating a main body thereof at a position adjacent to the conductor segment 26 so as to expose the specific bus bar 14 therethrough. Further, an electrically-connecting member 70 is disposed to bridge over the through-hole 24 and the conductor segment 26, and soldered onto the conductor segment 26 and the bus bar portion located in the through-hole 24.

Abstract: An electronic carrier board includes a plurality of round pads and a plurality of solder layers formed on the round pads respectively. The design of the round pads ensures the solder layers covering the pads completely, and neighboring sides of the two solder layers are lower than opposite sides, such that electronic element can be stably fixed on the two solder layers to prevent the tombstone of the electronic element.

Abstract: A method of forming a Ball Grid Array (BGA) package having an increased standoff height after solder reflow is described. A substrate containing a plurality of first solder bond pads and a component containing a plurality of second solder bond pads are arranged in parallel spaced relationship to form an arrangement, each first and second bond pad being in contact with a solder ball therebetween. Solder balls are formed of a core, which remains solid at solder reflow temperatures, encapsulated with a reflowable solder layer. First standoff height of the arrangement is largely determined by the diameter of the solder ball. Upon heating to solder reflow temperatures, the solder coalesces between the core and the bond pads. Upon cooling of the arrangement, the second standoff height of the BGA package is greater than the first standoff height of the arrangement.

Abstract: The present invention discloses an apparatus for operatively connecting a PCI-X or AGP device card (having a PCI-X or AGP bus) to a PCI-E bus connection on a mother board by mounting the PCI-X or AGP device card to a right edge connector mounted on a surface of an adapter card, the adapter card having a PCI-X (or AGP) to PCI-E bridge circuit for interconnecting a PCI-X (or AGP) bus to a PCI-E bus.

Abstract: A mounting substrate includes a land connected to an electrode of an electronic part by a melt-capable connection member; and a connection member flow-generation part configured to generate a flow at the molten melt-capable connection member.

Abstract: An LSI package includes an interface module having first and second surfaces and including a wiring board having a first through hole, a driver selectively provided on the second surface, a transmission line connected to the driver, and a first terminal formed on the second surface and connected to the driver, an interposer having a third surface facing the second surface and a fourth surface, and including a signal processor and a second terminal provided on the third surface, a third terminal provided on the fourth surface and a second through hole, the third surface facing the second surface except a region where the driver portion is provided. The interposer is arranged so that the first through hole matches with the second through hole, and a movable guide pin is inserted into the first and second through holes to position the interface module and the interposer.

Abstract: An exemplary ball grid array package for a semiconductor device includes an integrated circuit on a substrate, and a first bus on the substrate, the first bus including first portions that extend substantially parallel to the integrated circuit, interleaved with second portions that extend substantially toward the integrated circuit, each second portion having an end contiguous with a first portion and another end contiguous with a another first portion. A first set of wires connects the first bus with a first plurality of nodes on the integrated circuit. The package also includes a second bus and a second set of wires.

Abstract: A printed circuit board assembly (20) is provided. The printed circuit board assembly includes a main printed circuit board (22), an accessorial printed circuit board (26), and a frame (24). The main printed circuit board includes at least one electronic component (222). The frame is secured to the main printed circuit board. The accessorial printed circuit board is attached to the main printed circuit board. The accessorial printed circuit board includes a shielding area (262). The shielding area is configured for engaging with the frame, whereby the shielding area and the frame cooperatively shield the at least one electronic component therein.

Abstract: A surface mount electrical component comprising a first soldering interface having a fist soldering interface total solder path length of sufficient length such that a first melted solder fillet substantially disposed along the first soldering interface total solder path length produces an first upward moment greater than a first downward moment produced by the weight of the surface mount electrical component about the first soldering interface, and a second soldering interface comprising a second soldering interface total solder path length such that a surface tension produced by a second melted solder fillet substantially disposed along the second soldering interface total solder path length produces a second upward moment greater than a second downward moment produced by the weight of the surface mount electrical component about the second soldering interface is disclosed.

Abstract: A ground pattern includes a plurality of integrally formed first to third ground lines. A plurality of first ground lines are arranged parallel to one another at equal intervals. A plurality of second ground lines are arranged parallel to one another at equal intervals between adjacent ones of the first ground lines. A plurality of third ground lines are arranged parallel to one another at equal intervals between adjacent ones of the first ground lines at a predetermined angle with respect to the second ground lines. The third ground lines each connect one end of one adjacent second ground line with the other end of another adjacent second ground line. The ground lines form triangular openings.

Abstract: A method of forming contacts for an interconnection element, includes (a) joining a conductive element to an interconnection element having multiple wiring layers, (b) patterning the conductive element to form conductive pins, and (c) electrically interconnecting the conductive pins with conductive features of the interconnection element. A multiple wiring layer interconnection element having an exposed pin interface, includes an interconnection element having multiple wiring layers separated by at least one dielectric layer, the wiring layers including a plurality of conductive features exposed at a first face of the interconnection element, a plurality of conductive pins protruding in a direction away from the first face, and metal features electrically interconnecting the conductive features with the conductive pins.

Abstract: In one aspect, an electronic assembly includes an interconnection substrate, a component, and a discontinuity compensator. The interconnection substrate includes a signal conductor and a ground conductor. The component includes a device having a signal line and a ground conductor, a package, and a signal lead. The signal lead is electrically coupled to an internal signal path of the package and has an external portion extending from the package to the signal conductor of the interconnection substrate. The discontinuity compensator electrically couples a ground path of the package to the ground conductor of the interconnection substrate. The discontinuity compensator includes an electrically conducting planar surface that is oriented in a plane intersecting the interconnection substrate and forms with at least a substantial part of the external portion of the signal lead a transmission line structure having an impedance substantially matching the nominal impedance over the specified bandwidth.

Abstract: An electric power supply platform (1) made up of an upper conductive layer (2), a lower conductive layer (3), and a non-conductive insulating layer (4) sandwiched between the conductive layers (2), (3). Specially designed light emitting diodes (LEDs) (9) and a variety of other electronic components, each having one short lead (11) and one upper insulated long lead (10), may be removably attached to, displayed, and powered by the power platform (1) simply by inserting leads into the display surface (5) of the power platform (1). The leads of the LEDs (9) and other electronic components are different lengths so that the short lead (11) only comes into contact with the upper conductive layer (2) and the long lead (10) only comes into contact with the lower conductive layer (3) ensuring proper polarity. The leads (10), (11) of the LEDs (9) and/or other electronic components may be inserted into the display surface (5) at any location allowing the user to make any design he/she desires.

Abstract: A device provided with an electric motor (7) and a main printed circuit card (8) has contact points (12), wherein the electric motor has a housing and connecting contacts (6) which are conductively connected to the contact points (12), the housing has a first face and a second face opposite thereto, the connecting contacts (6) are mounted in the area of the housing face, the electric motor is arranged with respect to the main printed circuit card (8) in such a way that the second face is remote therefrom. A method for mounting the inventive device is also disclosed. Conventional devices of preceding techniques require important expenditures for mounting and functionality testing. The invention makes it possible to solve the problem in that the electroconductive connection (11) is embodied in flexion-resistant manner at least for torques which are oriented in a direction perpendicular to the longitudinal extension thereof.

Abstract: In a semiconductor package including at least one plate-like mount, a semiconductor chip has at least one electrode formed on a top surface thereof, and is mounted on the plate-like mount such that a bottom surface of the semiconductor chip is in contact with the plate-like mount. The semiconductor package also includes at least one lead element having an outer portion arranged to be flush with the plate-like mount, and an inner portion deformed and shaped to overhang the semiconductor chip such that an inner end of the lead element is spaced apart from the top surface of the semiconductor chip. The semiconductor package further includes a bonding-wire element bonded at ends thereof to the electrode of the semiconductor chip and the inner end of the lead element, an enveloper sealing and encapsulating the plate-like mount, the semiconductor chip, the inner portion of the lead element, and the bonding-wire element.

Abstract: Various embodiments are provided herein for a connector that can provide electrical and mechanical coupling between first and second objects. The connector generally comprises at least one connecting element that has at least one first and second contact portion, at least one guidance portion located towards the end of the at least one connecting element and adjacent to one of the at least one first and second contact portions; and a biasing portion that is adjacent to the at least one first and second contact portions. The biasing portion is configured to provide an electrical connection between the at least one first and second contact portions and to resiliently move the at least one connecting element from a first position to a second position to provide a mechanical coupling force to the first and second objects.

Abstract: An electronic component package includes: an insulating carrier substrate; a connection wiring that is provided on one side of the carrier substrate; an IC chip that is connected to the connection wiring; an external connection land that is disposed on the other side of the carrier substrate and is connected to the connection wiring via a wiring in the carrier substrate; and a solder ball that is disposed on the external connection land. A region of the external connection land that can be bonded to the solder ball has an outer shape that includes at least one arc portion and at least one straight portion. With this configuration, it is possible to provide an electronic component mounted apparatus in which bonding failure of the external connection land and the circuit board-side land with the solder ball can be reduced, and the bonding state can be easily inspected, and a method of inspecting a bonding portion therein.

Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrode

Abstract: The electronic device comprises a body (40) of electrically insulating material that is provided with a through-hole or cavity. In the cavity or through-hole an electric component (20) is present. This component is attached to the body through an attachment layer (13). The surface of this attachment layer is provided with a pattern of electrical conductors for electrically coupling the component to other components and/or contact means for external coupling. At least one of which electrical conductors extends to a surface of the body.

Abstract: Semiconductor assemblies include a first package, each having at least one die affixed to, and electrically interconnected with, a die attach side of the first package substrate, and a second substrate having a first side and a second (“land”) side, mounted over the molding of the first package with the first side of the second substrate facing the die attach side of the first package substrate. Z-interconnection of the package and the substrate is by wire bonds connecting the first and second substrates. The assembly is encapsulated with both the land side of the second substrate and a portion of the land side of the first package substrate exposed, so that second level interconnection and interconnection with additional components may be made.

Abstract: A printed circuit board (PCB) assembly having a plurality of circuit layers including outer layers and intervening layers with through-vias and micro-vias used to translate a portion of the signal connections of the grid, thereby creating a set of diagonal routing channels between the vias on internal layers of the board and a BGA package mounted on the printed circuit board.

Abstract: To cancel a magnetic field in an interconnection pattern of a printed wiring board. A first interconnection pattern 3a is formed on a surface 1a of an insulating substrate 1. A second interconnection pattern 5a is formed on a bottom surface 1b of the insulating substrate 1 so as to be superposed on a meandering part of the first interconnection pattern 3a when viewed from the upper surface side. An end part 5b of the second interconnection pattern 5a is electrically connected to an end part 3d of the first interconnection pattern 3a via through holes 7a. The first interconnection pattern 3a and the second interconnection pattern 5a form a single interconnection line via the through holes 7a. Accordingly, the first interconnection pattern 3a and the second interconnection pattern 5a are 180° different from each other in the direction in which current flows.

Abstract: A power transfer pad, having: a non-conductive board having a top and a bottom; a plurality of conductive substrate sections disposed across the top of the non-conductive board; at least one conducting element disposed on each of the conductive substrate sections; a plurality of electrical contacts on the bottom of the non-conductive board, wherein each of the electrical contacts on the bottom of the non-conductive board are in electrical communication with one of the conductive substrate sections on the top of the non-conductive board.

Abstract: A semiconductor device (100) comprising a semiconductor substrate (20) and a functional element (31), such as a microstrip, an inductor, a coupler or the like, is provided. Herein the functional element (31) is—at least partially—present in a conductive patterned layer that is mechanically embedded in isolating material (40) and that is connected to the substrate (20) through connection means. In this way, electrical losses through the substrate (20) are substantially reduced. The device (100) is provided in that a foil comprising the patterned layer and a carrier layer is applied to the substrate (20), after which the space between them is filled with the isolating material (40) and the carrier layer is removed.

Abstract: An object of the invention is to provide a semiconductor device and an adjusting method for a semiconductor device wherein power source noises and noises radiated as radio waves can be reduced and power source noises inside the semiconductor device can be cut. The open stub OS1 is formed in the upper wiring layer of the semiconductor device 1. The stub length L1 is set to a length of ¼ of the wavelength of the known frequency containing peak components of noises. The noise receiving part AT1 is disposed adjacent to the open stub OS1. The open stub OS1 is connected to the power source wiring 4 by an interlayer wiring 6. The noise receiving part AT1 is biased to a ground potential. The basic wave component and odd-number harmonic waves of noises that are generated from the PLL circuit 11 and propagate (the arrow Y1 of FIG. 2) in the power source wiring 4 are reflected (arrow Y2 of FIG. 2) by the open stub OS1 so as to return to the PLL circuit 11, and do not reach the filter circuit 12.