Abstract: An interconnect component comprises a compliant layer having a first surface and a plurality of electrically conductive leads having first ends and extending through the compliant layer. The first ends extend generally parallel to said first surface.

Abstract: A method of forming an electrical connector including providing a metallic sheet having a multitude of connector blanks formed therein, each of the connector blanks having a base portion, a contact portion and a singulation arm; forming each of the connector blanks into a connector having a predetermined shape wherein each of the connectors remain connected to the metallic sheet by their respective singulation arms and wherein the singulation arms are nonplanar with respect to the metallic sheet; joining the base of each of the connectors to a first substrate; and severing the singulation arms to separate each of the connectors from the metallic sheet wherein the base of each of the connectors is joined to the first substrate. In a preferred embodiment, the contact portion contacts a second substrate.

Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.

Abstract: Multilayer printed circuit board includes a core substrate, multilayer wiring layer formed on the core substrate by alternately laminating interlaminar insulating layer and conductor circuit, and a solder pad group having two-dimensionally arranged pads having solder bumps on a surface of the multilayer wiring layer. Solder pads of the solder pad group are arranged in only a peripheral portion other than a central portion to form a frame shape. Solder pads located at an outside part of the frame shape have flat pads having surfaces which are each connected to conductor pattern on a surface of one of the interlaminar insulating layer, and have solder bumps formed on surfaces of the flat pads. Solder pads located at an inside part of the frame shape have viaholes which are each connected to an innerlayer flat pad group located in an innerlayer, and have solder bumps in recess portions of the viaholes.

Abstract: An indicating instrument includes a transparent dial plate, a printed circuit board disposed behind the dial plate, a drive unit disposed behind the printed circuit board having a plurality of lead wires soldered to the printed circuit board, a light conductive luminous pointer and a light emitting diode disposed on the printed circuit board near a rotary shaft so that the pointer can receive light emitted from the light emitting diode. Each end of the plurality of lead wires is disposed on the printed circuit board at a distance from the light emitting diode sufficient to insulate the light emitting diode from heat of soldering the plurality of lead wires to the circuit board.

Abstract: A resin substrate is made of resin or a composite material containing resin. Pins each having the surface, on which Au plating is formed, are, with a soldering material made of Sn and Sb, soldered to a substrate body having a first main surface and formed into substantially a rectangular shape to project over the first main surface 2A of the substrate body. Wettability of the soldering material for securing the pins and the substrate body to one another is relatively low as compared with that of a Pb—Sn soldering material. Therefore, the height of upward movement of the soldering material along the pin can be reduced. Hence it follows that the pins can sufficiently deeply be inserted into the socket so that the gap between the first main surface of the substrate body and the upper surface of the socket is reduced.

Abstract: In a semiconductor package which contains an IC element therein and effects the inputting and outputting of a signal to the IC element through a plurality of pads, a group of signals is layout-patterned so as to be divided into a plurality of groups such as a group of signals weak against noise, a group of signals liable to discharge noise and a group of signals exchanging a heavy current and so that the groups may be isolated from one another.

Abstract: An integrated circuit chip package wherein the chip is encapsulated prior to mechanical bonding to a packaging substrate. The package provides a continuous adhesive interface between the encapsulated chip and surrounding encapsulant, and the substrate. This structure eliminates discontinuities in flatness and their associated stress states resulting in more reliable package contacts.

Abstract: High melting temperature Pb/Sn 95/5 solder balls are connected to copper pads on the bottom of a ceramic chip carrier substrate by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling.

Abstract: A semiconductor module includes a chip formed with an integrated circuit, a first external connecting terminal electrically connected to the integrated circuit, a printed wiring board having a second external connecting terminal, and a conductive material electrically connecting the first external connecting terminal with the second external connecting terminal, wherein the conductive material is formed so as to cover a sidewall of the second external connecting terminal. Accordingly, a semiconductor module is provided that can avoid an inferior connection caused by a crack between the lead and the pad.

Abstract: A method and system of utilizing inexpensively manufactured, electrically conductive and mechanically compliant disks to interconnect an area grid array (“AGA”) chip to a printed wiring board. The conductive disk shaped leads are stamped from a thin sheet of conductive material. To increase solderability and protect the disk surface, the disks can be plated with tin or an equivalent material. Each disk is positioned tangent to the surface of an AGA chip in a specific orientation. One edge of each disk is electrically connected and mechanically secured to a corresponding conductive pad located on the surface of the AGA chip. The opposite edge of each conductive disk is positioned to align with a corresponding conductive surface pad on a printed wiring board (“PWB”). Each opposite edge is electrically connected and mechanically secured to the surface of the PWB, thereby establishing a compliant electrical connection between the AGA chip and the PWB.

Abstract: According to the present invention, there is provided an electronic components mounting structure constituted by a plurality of electronic components having lead terminals respectively, and conductors having connection portions to be connected to the lead terminals of the electronic components, in which the lead terminals of the electronic components are aligned with the connection portions of the conductors and the lead terminals and the connection portions are welded with each other.

Abstract: A multi-chip module includes a housing having insulative side walls and an end plate, conductive leads extending from the side walls, integrated circuit (IC) dies mounted to the end plate, and one or more interconnect dies mounted to the end plate. The end plate is made from a heat sink material, such as copper. Each interconnect die is positioned between a pair of the IC dies. Electrically conductive material connects the IC dies to the interconnect die, connects the IC dies to the conductive leads, and connects the interconnect dies to the conductive leads. The interconnect dies function to interconnect the IC dies and to interconnect the IC dies to the conductive leads. The interconnect die may be embodied by wiring layers formed on a silicon substrate.

Abstract: A memory module (10) having a module bus line (15) that can be electrically connected to a main board bus line (22) by a contact terminal (12). Main board bus line (22) can be discontinuous at a module socket. Module bus line (15) can be configured on a front and back side of memory module (10) and electrically connected to the discontinued main board bus line (22) by contact terminals (12) configured on both sides of memory module (10). The front and back side module bus lines (15) can be electrically connected by a module bus through wiring (19′). Characteristic impedance matching between the main board and memory module (10) may be improved.

Abstract: In a wiring board having a mounting region on which an integrated circuit having a plurality of terminals is mounted, and having a plurality of substrate-side wiring lines to be connected to the integrated circuit formed thereon, a conductor pattern is formed to extend in a substantially radial form from a prescribed point in the mounting region to reach two or more of the substrate-side wiring lines to be grounded.

Abstract: A low profile circuit device for the LCD module comprises a printed circuit board and an electronic device. The printed circuit board has a through hole and a plurality of pads surrounding the through hole. The electronic device is disposed within the through hole and has a plurality of leads electrically connected to and mounted on the plurality of pads of the printed circuit board.

Abstract: A printed circuit board for a semiconductor package, a semiconductor package, and methods for manufacturing the same are disclosed. One printed circuit board includes a core layer with circuit patterns formed thereon. The circuit patterns do not extend to a periphery of the circuit board. Each circuit pattern includes a bond finger and/or an input/output land. A solder mask is provided over the circuit patterns, except for bond fingers and lands. A first metal layer is plated only on the horizontal outer surface of the bond finger and/or ball land of the respective circuit pattern, and not over the remainder of the circuit pattern. The localized plating of the first metal layer enhances adhesion of the solder mask to the circuit patterns, enhances adhesion of an encapsulant to the bond fingers, and avoids waste of the first metal layer material.

Abstract: A wiring board comprising a substrate having applied on the same side surface thereof one or more terminals for connecting a semiconductor element and one or more terminals for external connection, in which the terminals for connecting the semiconductor element and the terminals for external connection are electrically connected, by a wire, with each other in the interior of the wiring board, and a semiconductor device comprising the wiring board having packaged thereon semiconductor elements. Processes for the production of the wiring board and the semiconductor device are also disclosed.

Abstract: An integrated circuit package is provided with a ball landing area having a conductive structure for interlocking a conductive ball to the ball pad. The conductive structure improves the attachment strength between an integrated circuit package and an printed circuit board. In an exemplary embodiment, the locking structure is a conductive material added to the surface of the ball pad to provide a nonplanar interface, such as a dome or a step, which interlocks the conductive ball to the ball pad. The improved package construction increases the area of contact, moves the shear plane to a higher and larger portion on the conductive ball, and/or prevents a crack from propagating along a flat plane across the ball joint. This package construction maintains the small size of the ball land areas and the package, increases the life of the integrated circuit package, while offsetting the problem of package warpage.

Abstract: A surface-mount electronic component includes a terminal electrode film that is formed by various film-forming processes on the surface of a main unit of the surface-mount electronic component. A lead-in terminal extends from an internal electrode and is arranged in the surface-mount electronic component so as to extend up to the surface of the main unit for establishing electrical connection between the internal electrode and the terminal electrode film. In the surface-mount electronic component, the lead-in terminal of the internal electrode extends to at least one of the surfaces of the main unit, except a surface-mount surface of the main unit and the surface that is opposite to the surface-mount surface. An exposed portion of the lead-in terminal is coated by at least one of the terminal electrode film and a protective film.

Abstract: A flexible circuit incorporating electrostatic discharge (ESD) limiting features and being suitable for use in the fabrication of hard disk drives for computer applications. Conductive polymer strips are implemented to enhance the static dissipative characteristics of the flexible circuit and to protect magnetorestistive (MR) heads of a hard disk drive (HDD) from damage during the manufacture of the head gimbal assembly (HGA) of the HDD.

Abstract: This invention provides a method apparatus for electrically connecting a semiconductor die, such as a power MOSFET, to a substrate on which the die is mounted, e.g., a lead frame, with a conductive strap, such that the connection is resistant to the shear stresses incident upon it with changes in temperature of the device. The method includes providing a conductive strap, and in one embodiment thereof, forming a recess in the top surface of the substrate. The bottom surface of a flange portion of the strap is attached to the floor of the recess such that the recess captures the flange and prevents relative horizontal movement of the flange and substrate with variations in the temperature of the device. Other embodiments include attaching the strap to the die and substrate with joints of a resilient conductive elastomer, and forming apertures in the strap and substrate that cooperate with a conductive joint material to reinforce the connection against temperature-induced shear forces.

Abstract: A contact system is disclosed that includes a metal contact clip capable of being surface-mounted to a printed circuit board that facilitates the electrical coupling of the opposing conductive covers in a circuit card assembly having conductive enclosures with a reference potential, such as ground, on the printed circuit card which provide protection against electrostatic discharge (ESD) on the printed circuit card. The clip spans a cut-out region on the printed circuit card and includes opposing tabs the extend from the spanning portion for electrically contacting the conductive covers. The clip further includes geometries such as springs for exerting forces upon the conductive covers thereby providing a reliable contact interface with the conductive covers.

Abstract: In accordance with the invention, a low impedance surface-mount connector comprises a length of cylindrical rod having an I-shaped cross section. The device permits interconnection by pick-and-place techniques, and the interconnection has advantageous qualities of low resistance, low inductance, mechanical compliance and ease of manufacture. A first circuit device having one or more circuit components is interconnected with a second circuit device by surface mounting such connectors on the first circuit device, providing corresponding solder pads on the second circuit device, and mounting the connectors of the first circuit device onto the pads of the second.

Abstract: A power electronics module has a metal substrate, a printed circuit card carried on one of the faces of the substrate, and components, at least some of which are power components, mounted on the card. The card also carries electrical interconnection tracks between the components themselves and with external power supply. Conductive bridges of a shape enabling each of them to extend over a power component mutually interconnect short segments of interconnection tracks, that carry power current.

Abstract: To achieve an effective dissipation of the heat generated by the power components including a design that is as compact as possible as well as simple assembly in the case of an electronic control unit having a printed circuit board situated in a closed housing and provided with electrical and/or electronic components, and having, arranged at the housing, at least one connector part whose contact elements, which are partially embedded in the housing, are electrically connected to the printed circuit board, it is proposed that the housing includes a housing frame produced as an injection-molded part and having an open topside and bottom side, metallic conductor strips formed by at least one punched grid being partially embedded in the housing frame.

Abstract: A support assembly for mounting a semiconductor device vertically relative to a carrier substrate. The support assembly includes an interposer to which the semiconductor device is attached. The support assembly also includes traces carried on the interposer, which electronically connect the semiconductor device to contacts on the interposer. The contacts are disposed along a single edge of the interposer. The invention also includes an alignment device for releasably mounting the support assembly. The alignment device, which mounts to a carrier substrate, includes one or more receptacles. As a support assembly is inserted into a receptacle, the alignment device establishes an electrical connection between the contacts and corresponding terminals on the carrier substrate. The assembly may also include a cover that attaches to the top of the alignment device and biases the interposer against the carrier substrate.

Abstract: Improved methods and apparatus for forming an assembly by attaching an electronic package to a substrate are disclosed. The electronic package includes a microelectronic device, conductive leads to couple the device to the substrate, and an encapsulant surrounding the device and a portion of the conductive leads. A filler is added to the assembly to surround the otherwise exposed portion of the leads. The filler material is selected such that the dielectric constant of the filler is approximately the same as the dielectric constant of the encapsulant. Surrounding the lead with material having substantially similar dielectric constants reduces impedance variation along the length of the lead.

Abstract: An integrated circuit device, including a substrate and a signal source disposed on the substrate. The signal. source is adapted to supply a pair of signals to a first plulrality of customers positioned remote from the signal source on the substrate, each of which customers is adapted to receive the pair of signals. There are a second plurality of conductors, formed substantially within a single layer of conductive material deposited on the substrate, and arranged to distribute the pair of signals from the signal source to each of the customers.

Abstract: A method for forming terminations on the opposite ends of a chip component includes placing a chip component in a cavity with one end of the chip component exposed. Termination conductive material is then deposited on the exposed end of the chip component and the component is removed from the cavity and reversed. Termination material is then deposited on the other exposed end. One modification of the invention includes extending the chip components completely through holes in a plate so that the opposite ends of the chip component are exposed. The termination material is then placed on the opposite ends of the chip component.

Abstract: The present invention provides a multilayer circuit board for mounting thereon a semiconductor chip or other electronic elements having electrode terminals or other connection terminals which are arranged in a grid, staggered, or close-packed manner in an improved form to enable reduction in the number of the wiring layers for lead wiring lines, thereby facilitating the production of multilayer circuit boards and providing an improved product reliability.

Abstract: A head interconnect circuit for connecting transducer elements of a data head to drive circuitry including an alignment finger on a lead tip for aligning leads relative to connectors or solder pads for electrically connecting heads to drive circuitry. A method for connecting a head interconnect circuit to a printed circuit supported on an head actuator including aligning an alignment finger on the lead tip with a printed surface of a drive circuit for soldering leads on the lead tip to solder pads or connectors on the drive circuit.

Abstract: A plurality of integrated circuits are efficiently interconnected to improve the electrical performance of the overall system. This is accomplished by providing high speed, high density, system level interconnect, including interchip routing lines, on the integrated circuit devices, thereby reducing the routing complexity of the substrate or board. The devices are mounted directly on the board. An integrated circuit device comprises an integrated circuit region including integrated circuit elements. An interconnect layer includes an insulative material, a plurality of conductive traces, and a plurality of conductive bond pads arranged in first and second subsets. A first subgroup of the conductive traces are connected to the integrated circuit elements in the integrated circuit region and are connected to the first subset of conductive bond pads.

Abstract: A new type of high-Q variable capacitor includes a substrate, a first electrically conductive layer fixed to the substrate, a dielectric layer fixed to a portion of the electrically conductive layer, and a second electrically conductive layer having an anchor portion and a free portion. The anchor portion is fixed to the dielectric layer and the free portion is initially fixed to the dielectric layer, but is released from the dielectric layer to become separated from the dielectric layer, and wherein an inherent stress profile in the second electrically conductive layer biases the free portion away from the dielectric layer. When a bias voltage is applied between the first electrically conductive layer and the second electrically conductive layer, electrostatic forces in the free portion bend the free portion towards the first electrically conductive layer, thereby increasing the capacitance of the capacitor.

Abstract: An apparatus for mounting a heat sink to a chip package such as a BGA type chip package or the like is disclosed. In an exemplary embodiment, ground bumps are formed on the die substrate of the chip package and on the heat mating surface of the heat sink to be attached to the package. The ground bumps formed on the die protrude into the body of dimples formed in the body of the chip encapsulation package to make thermal/electrical ground contact with the ground bumps formed on the heat mating surface of the heat sink for electrically grounding the heat sink.

Abstract: The invention encompasses an electrical apparatus. Such apparatus comprises a first substrate having first circuitry thereon. The first circuitry has a terminal extending therefrom, and the terminal defines a first electrical node. The apparatus further comprises a first dielectric material covering a predominate portion of the first circuitry and not covering the first electrical node. Additionally, the apparatus comprises a second substrate having second circuitry thereon. The second circuitry has a terminal extending therefrom, and such terminal defines a second electrical node. A second dielectric material covers a predominate portion of the second circuitry, but does not cover the second electrical node. The second substrate comprises a different material than the first substrate. A portion of the second substrate is over a portion of the first substrate to define an overlap between the first and second substrates.

Abstract: A circuit module includes a connector terminal (4A) provided on a front surface of a printed wiring board (2) and connected to a data pin (DQt) of a memory IC (3) through an interconnect line (5a). A conductive connector terminal (4c) corresponds to the connector terminal (4a) and is provided on a back surface of the printed wiring board (2). A through hole (16) extends between part of the front surface of the printed wiring board (2) where the connector terminal (4a) is formed and part of the back surface thereof where the conductive connector terminal (4c) is formed. A conductor fills the through hole (16), thereby suppressing skews resulting from a difference in interconnect line length on the circuit module and decreasing a stub capacitance to achieve the reduction in power consumption.

Abstract: A system for delivering power to a processor enables a DC-to-DC converter substrate to be secured to the processor carrier in the Z-axis direction. The ability to assemble converter to the processor in this way facilitates assembly compared to systems in which the converter is plugged in to the processor carrier in the direction substantially parallel to the surface of the motherboard.

Abstract: Inter power supply surge voltage transmitting diode element is formed by a buried layer formed in a semiconductor substrate, a well region formed on the buried layer with its bottom portion being in contact with the buried layer, and impurity regions of mutually different conductivity types formed apart from each other at the surface of the well region. One of the impurity regions is electrically coupled to a first power supply line on which a surge voltage generates, and the other is electrically coupled to a second power supply line absorbing the surge voltage. The surge transmitting element includes a plurality of elements arranged parallel to each other between the first and second power supply lines. The second power supply line supplies the power supply voltage to an internal circuitry which consumes relatively small current.

Abstract: Telecommunication main distribution frame structure including a PC board, several pairs of insertion pins, four insertion seats, four buses, four corresponding insertion seats connected with one end of the buses and four connectors connected with the other end of the buses. The PC board is formed with several insertion holes and soldering holes electrically connected with each other. The insertion seats are soldered at the soldering holes of the PC board. The corresponding insertion seats are inserted in the insertion seats. The PC board has a left board, a middle board and a right boards integrally connected with each other. Each of two openings of the insertion hole is provided with a circle of shallow conductive face divided-by a locating split into a left and a right halves. Each of two openings of the soldering hole is provided with a shallow conductive face. The insertion pin is a rectangular column made of insulating material.

Abstract: A configuration is described for making electrical contact between a flexible printed circuit board disposed on a supporting element and a contact spring has a sliding element which is disposed between the flexible printed circuit board and the contact spring so as to be incapable of being displaced with respect to the supporting element. When the contact spring is pushed onto the supporting element, the contact spring on the sliding element slides into its end position.

Abstract: A printed circuit board having a plurality of spaced apart scrap border support tabs along the perimeter. The board surfaces including the edges are coated with a conductive shielding material, except that each tab presents an uncoated, unshielded surface at the point of severance created by detachment of a scrap border subsequent to the coating application. The printed circuit board includes a plurality of spaced apart elongated apertures adjacent the perimeter, with each aperture being inwardly coincident to a respective one of each support tabs, each aperture defining an inner surface adjacent to the corresponding support tab with a portion of the inner surface being substantially parallel to adjacent perimeter portions of the circuit board, the inner surface of each aperture also being coated with the conductive shielding material with the latter being attached to the conductive shielding material of the board surface.

Abstract: An integrated circuit device structure having probe pad extensions in electrical communication with the wire bond pads and a method for performing failure analysis thereon. The invention provides an improved probing system for wire bond packages such that neither the wire nor the wire bond from the pads on the chip surface need be removed during testing procedures. Included in the integrated circuit device is a plurality of conductive pads having a first area for receiving a wire bond and a second area for receiving a probe, wherein the second area abuts, and is an electrical communication with the first area.

Abstract: A method for manufacturing substrate elements includes providing a mother substrate, forming at least one elongated through-hole on the mother substrate such that an entire longitudinal end surface of the first substrate element and a portion of a lateral surface of the second substrate element are exposed, forming an electrode pattern on the inner surface of the at least one elongated through-hole, and cutting the mother substrate along lines extending in the vicinity of the longitudinal ends of the at least one elongated through-hole and in a direction that is substantially perpendicular to the longitudinal axis of the elongated through-hole.

Abstract: A multi-layer printed circuit board that includes a first layer and a second layer that have first and second signal traces, respectively. The multi-layer printed circuit board includes a via that couples a signal transmitting component to the second signal trace and a throttling member, which is coupled to the first signal trace. The throttling member reduces the speed at which a first signal routed over the first signal trace travels when compared to the speed at which that signal would have traveled had the throttling member been absent.

Abstract: A process is given for permitting the application to a substrate (2) of a microsystem or transducer (1) having a first partial surface (13), whose interaction with the environment is to be possible, and a second partial surface (14), which is to be protected against external influences. The substrate (2) is prepared, a passage point (20) being produced in said substrate (2). The microsystem (1) and substrate (2) are so mutually positioned that the first partial surface (13) faces the substrate (2) and that the passage point (20) in the substrate (2) and the first partial surface (13) come to rest opposite one another. Contacts (50, 51.1, 51.2) are produced by flip-chip technology. A sealing contact (51.1, 51.2) seals the second partial surface (14) against external influences. A gap (3) between the microsystem (1) and substrate (2) is filled with a filling material (30). A selective cover (24) over the passage point (20) keeps undesired external influences away from the first partial surface (13).

Abstract: An image pickup device has a plurality of photoelectric converter substrates carring respective input/output terminals connected to the photoelectric converters. The device comprises leads connected to the input/output terminals and extending to the side opposite to the light recieving surfaces of the photoelectric converter substrates thorough the gaps separating the substrates.

Abstract: A printed circuit board includes a first wiring line and a second wiring line spaced apart from the first wiring line. The first wiring line has a first portion having a surface which faces the second wiring line and is smaller in area than that of the second portion, so that a crosstalk noise between the first portion of the first wiring line and the second wiring line can be reduced.

Abstract: The semiconductor device comprises an insulating film in which penetrating holes are formed, a semiconductor chip having electrodes, a wiring pattern adhered by an adhesive over a region including penetrating holes on one side of the insulating film and electrically connected to the electrodes of the semiconductor chip, and external electrodes provided on the wiring pattern through the penetrating holes and projecting from the surface opposite to the surface of the substrate on which the wiring pattern is formed. Part of the adhesive is drawn in to be interposed between the penetrating holes and external electrodes.

Abstract: A housing (1) for holding a printed circuit board (10) has a cable receptacle (2) which is configured as a cutout open toward the side of the printed circuit board (10). A cable (7) is freed from its insulation at its free end, and then positioned over the cable receptacle (2) such that the end of the bared cable strand (9) initially rests on the housing (1). Thereafter, the cable (7) is pressed into the cable receptacle (2), the bared end of the cable strand (9) being bent over by 90°. Subsequently, the printed circuit board (10) is laid onto the housing (1) in such a way that the cable strand (9) penetrates a bore (11) in the printed circuit board (10) and can subsequently be soldered.