Abstract: A tape carrier package (TCP) with improved connecting terminals is disclosed. The TCP includes a base film of non-conductive material which carries a plurality of conductive leads on one surface thereof. A plurality of connecting terminals are deposited on the surface such as to be electrically interconnected to the ends of the conductive leads. Each of the connecting terminals has an acute-angled top portion and includes an inner member of a first material and an outer member of a second material plated on the inner member. The acute-angled top portion of the second material is easily deformable when the connecting terminal is pressed against a corresponding terminal provided on a board to be interconnected to the TCP. Thus, an adequate interconnection area is obtained between the TCP and the circuit provided on the board.

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.

Abstract: In manufacturing an encapsulated optocomponent, the optocomponent is embedded in a plastics material. The optocomponent has guide grooves on one of its surfaces in which guide pins are to extend so that the encapsulated optocomponent will obtain an optical interface of standard type. For the encapsulating operation guide pins are placed in a mold cavity in a mold half and the optocomponent is placed in the cavity in the mold, so that the guide pins are engaged in the guide grooves and ar accurately inserted therein. To achieve this effect, a resilient or elastic force such as from plunger is applied to the other side of the optocomponent, so that it is pressed with some force against the guide pins. The cavity in the mold is then closed by placing a second mold half on top after which the encapsulating material can be introduced in the closed cavity in the mold.

Abstract: An improved integrated circuit device that includes both bond pads and trim pads is disclosed. Electrically conductive, non-wettable and non-corrosive protective caps are formed over each of the trim pads. With this arrangement, the protective caps act as barriers between the trim pads and solder used to form solder bumps when the IC package is mounted onto a substrate. In one embodiment, the protective caps are formed from a material that is easily sputtered, such as titanium. In a method aspect of the invention, the protective caps are applied during wafer level processing before either the solder bumping or trimming operations.

Abstract: There is provided a technique of connecting easily the lead terminal to the board of the module. A plurality of clip lead terminals each has at one end thereof clip portions which are connected electrically to connecting terminals by sandwiching an end portion of a board of a module and the connecting terminals formed thereon between clip members of said clip portions and has a lead portion at the other end thereof. The clip lead terminals are arranged so as to be spaced from one another in parallel with one another with the leading edges of the respective clip portions aligned on a straight line. The clip lead terminals are connected to one another through a tie bar and a guide as a connecting portion, respectively, whereby the connecting clip lead terminal 18 is formed as one-body. The lead portions are bent on every other one, leading end portions of the bent lead portions and leading end portions of the non-bent lead portions are in parallel with each other viewing from a side of the board.

Abstract: In general, in one aspect, the invention features a connection between a through-hole in a circuit board and a contact region on a component. The contact region has a surface bearing a depression. A continuous solder column has one end of that forms a solder joint with an inner wall of the through-hole and the other end of that forms a solder joint with the contact region.

Abstract: A semiconductor chip mounting board which improves reliability of electrical connection between a semiconductor chip mounted thereupon and a wiring pattern on a printed circuit board on which the semiconductor chip mounting board is mounted at low cost and in an easy manner. The semiconductor chip mounting board mounts a semiconductor chip on one surface of the board and forms a connecting pad electrically connecting with a wiring pattern of a printed circuit board on the other surface of the board. The semiconductor chip mounting board further forms on the other surface of the board a connection reinforcing pad, which is thicker than the connecting pad electrically connecting with the wiring pattern on the printed circuit board.

Abstract: A power semiconductor module comprising a power semiconductor element included in a power circuit portion and mounted on a metal base, a first resin molded to the power semiconductor element, a control circuit element disposed on the first resin and included at least in a portion of the control circuit, and a control terminal connected to the power circuit portion and having an exposed portion thereof in the surface of the first resin, in which a portion of the control circuit is connected with the power circuit portion at the exposed portion of the control terminal. Accordingly, a resin mold type power semiconductor module capable of realizing a high performance of the control circuit portion at low cost can be realized.

Abstract: Patterns for a routable interface of the signal lines of a integrated circuit device include several groups of terminals distributed about the pattern center, each group clustered along a corresponding curvilinear reference segment extending outward from the pattern center to its perimeter. Routability zones are created between each successive pair of groups. For higher terminal density, in at least one of the terminal groups of the pattern, either the offset of the terminals from the reference line segment is not uniform, or the distance of the terminals from the pattern center does not increase uniformly. A portion, preferably at least about 50% of the terminals in a group of the pattern are not collinear with, but offset from, the reference segment. A portion, preferably at least about 90% of the terminals in a given terminal group are each closer to the reference line segment of that terminal group than they are to the reference segment of another terminal group.

Abstract: An arrangement includes a supporting plate, at least one substrate applied thereon for electrical and/or electronic components and a plug-in part. The plug-in part includes a plurality of connector pins which are embedded in insulating material, whose first ends are provided for the connection to external plug-in devices and whose second ends are electrically connected to the substrate via bonding wires. In order to reduce the dimensions of the raster of the connector pins and to achieve a small, compact design of the arrangement, the individual connector pins are manufactured as stamped-out parts whose second ends, in each case, have end faces manufactured in the stamping process and running roughly parallel to the substrate, and the bonding wires are welded directly to the stamped-out end faces of the connector pins. In addition, there is a method for manufacturing the arrangement.

Abstract: There are provided IC packages which eliminate the need for preparing a plurality of wiring boards even when different types of IC packages are used and a circuit device using the same. A 128-pin package is arranged, so as to output the same signal from two pins positioned on both ends of each edge thereof and wires of a wiring board corresponding to those pins are short-circuited.

Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.

Abstract: A BGA package includes a chip with an array pad design disposed on the upper surface of a substrate. The chip has a plurality of bonding pads located about the periphery thereof, and the bonding pads of the chip are positioned in three rows, an inner row, a middle row, and an outer row along the sides of the chip. Only power supply pads and ground pads are designed to be located in the outer row of bonding pads, and all of the I/O pads are designed to be located in the middle row of the bonding pads and the inner row of the bonding pads.

Abstract: A memory module (10) having a module bus line (15) that can be electrically connected to a main board bus line (22) by a contact terminal (12). Main board bus line (22) can be discontinuous at a module socket. Module bus line (15) can be configured on a front and back side of memory module (10) and electrically connected to the discontinued main board bus line (22) by contact terminals (12) configured on both sides of memory module (10). The front and back side module bus lines (15) can be electrically connected by a module bus through wiring (19′). Characteristic impedance matching between the main board and memory module (10) may be improved.

Abstract: A multi-layer printed circuit board includes power planes located on outer conductive layers. The outer conductive layers are patterned to accept circuitry, such as integrated circuits and surface mount devices. Mounting pads are provided on the outer conductive layers which include plated through vias for electrical interconnection with other conductive layers of the printed circuit board. To increase solderability, the plated through vias are located on the mounting pads such that they are covered by the circuit component mounted thereto. By locating the vias under the electrical components, such as surface mount capacitors, the quality of solder fillets is increased. To enhance heat dissipation, openings are provided in solder masks located on exterior surfaces of the outer conductive planes. These openings are located in the solder mask to expose the conductive plane. As such, the openings are located in areas where circuitry is not mounted to the printed circuit board.

Abstract: The inventive embedded processing subsystem module is adapted for backside circuit board assembly directly opposite of a specific microprocessor or Digital Signal Processor so that circuit groups such as memory banks and communications peripherals may utilize otherwise unused backside printed circuit board space underneath the processor device, and further so that high-speed signals interconnecting the processor and subsystem circuit devices traverse a minimized printed circuit track length.

Abstract: A device for electrical and mechanical connection of an electric high-power component which transmits high-frequency electrical signals to conductors on a circuit board. The component includes horizontally projecting connections which to the are glued to the conductors on the circuit board with an electrically conducting adhesive, of which the adhesion to the foundation is greater than a predetermined value. The component is subject to repeated temperature changes which leads to stresses on the connection between the connections and the conductors. The length of the connections is chosen depending on a predetermined threshold value for the highest acceptable attenuation which the high-frequency electrical signal is subject to when passing through the electrical high-power component via the connections. The contact surface of the connections towards the glued joint can be designed so that it includes a number of cavities, whereby the adhesive achieves a better grip to the connections.

Abstract: A PCB having oval solder ball lands, and a BGA semiconductor package produced using such a PCB, are disclosed. The PCB has a plurality of conductive traces forming circuit patterns on at least one of an upper and a lower surface of a resin substrate. A plurality of solder ball lands are formed on the lower surface of the substrate and are electrically connected to respective upper surface conductive traces. At least a portion of the solder ball lands have an oval shape and a major axis. The oval solder ball lands are oriented such that their major axes are either radially directed relative to a center of the substrate, perpendicularly directed relative to a side edge of the substrate, or both radially and perpendicularly directed relative the center and a side edge of the substrate, respectively.

Abstract: A printed-wiring board has a copper foil (the first conductive layer) providing electric conductivity formed on one or both sides of an insulating board providing electrical insulation, an insulating layer providing electrical insulation formed at specific sites (where there are through-holes) on the first conductive layer, and a second conductive layer providing electric conductivity formed on the insulating layer. In this printed-wiring board, when the second conductive layer is formed, deposition of an electrically conductive material by plating, and polishing of the deposited electrically conductive material, these steps are repeated at least once, so that the surface of the second conductive layer can be smoothened to enhance the bonding stability of chip parts.

Abstract: A method for fabricating bumped semiconductor components and electronic assemblies, such as multi chip modules, is provided. The method includes forming semi cured, electrically conductive, elastomeric bumps on electrodes of a semiconductor component (e.g., die, chip scale package), or on electrodes of a mating component (e.g., PCB, MCM substrate). The bumps include an adhesive matrix material and dendritic metal particles. The adhesive matrix material is in a semi cured condition having adhesive qualities for bonding, but with a structural rigidity for supporting the dendritic particles to enable penetration of oxide layers on the electrodes. The semi cured adhesive bumps permit the bumps to be cured without the necessity of externally generated compressive forces.

Abstract: A chip-sized semiconductor device includes a semiconductor element having a plurality of electrodes and a plurality of connecting pads electrically connected to the respective electrodes. A connecting board includes a base substrate having a first surface and a second surface, a plurality of connecting holes extending from the first surface to the second surface, a plurality of lands formed on the first surface to close the respective connecting holes, the lands being arranged in conformity with positions of the connecting pads of the semiconductor element, each of the connecting pads having a surface area smaller than that of the land. The semiconductor element is mounted on the connecting board in such a manner that the connecting pads of the semiconductor element are electrically connected to the respective lands of the connecting board by means of a plurality of bumps, respectively.

Abstract: An electronic circuit, particularly for an active implantable medical device such as a cardiac pacemaker or a defibrillator, and a process of realization (manufacture/assembly). This electronic circuit includes at least one chip (12), as well as other associated electronic components (18), placed on a substrate (10). The chip is a bare, exposed chip, that is not one embedded in a case or encapsulated, having on its face electrical contact pads turned to the exterior, such that the chip is buried in the thickness of the substrate, preferably near or at the bottom of a cavity (30). The cavity is filled with an isolating resin (38), up to the surface of the substrate and covering the chip, except for connection threads (34,36) connected to interconnection conductors (24, 26, 28) of the substrate. It is thus possible to place at least some supplementary components superimposed above the chip and, further, to foresee above the chip a plurality of supplementary layers of interconnections.

Abstract: The invention relates to a plate-like electronic member, e.g., an electro luminescence element or the like, and an electronic device. In the electronic member (1) of the invention, first and second electrodes are formed on respective surface of a plate-like electronic member body a first electrode connecting portion is formed on the first electrode, and, a second electrode connecting portion which is electrically connected with the second electrode is formed on a same side of the first electrode as the first electrode connecting portion with an insulating layer disposed between the second electrode connecting portion and the first electrode. The electronic device according to the invention comprises the electronic member (1) and an apparatus case (15) having the electronic member built-in.

Abstract: A microelectronic connection component has flexible leads formed by polymeric strips with metallic conductors thereon. The metallic conductors may be very thin, desirably less than 5 microns thick, and provide good fatigue resistance. Each strip may have two conductors thereon, one serving as a principal or first signal conductor for connection to a first contact on a chip or other microelectronic element and the other serving as potential reference or ground conductor, or as a second signal conductor connected to a second contact on the chip. The system provides enhanced resistance to crosstalk and rapid signal transmission, and is compatible with differential signal transmission.

Abstract: A vertically mountable semiconductor device including a plurality of bond pads disposed proximate to a single edge thereof. The bond pads are bumped with an electrically conductive material. The semiconductor device may also include a support member. Alternatively, the semiconductor device may be laminated to one or more adjacent semiconductor devices. The present invention also includes a method of attaching the semiconductor device to a carrier substrate. Preferably, solder paste is applied to terminals on the carrier substrate. The semiconductor device is oriented vertically over the carrier substrate, such that the bumped bond pads align with their corresponding terminals. The bumps are placed into contact with the solder paste. The bumps an older paste are then fused to form a joint between the each of the bond pads and their respective terminal, establishing an electrically conductive connection therebetween and imparting structural stability to the semiconductor device.

Abstract: A substrate for mounting an electronic part and a method for producing the same, which allows a conductive pin to be inserted and secured in a through hole without exerting any damage thereto. The substrate for mounting an electronic part is formed of a through hole piercing an insulating substrate and a conductive pin with its head inserted into the through hole. The head of the conductive pin is provided with a plurality of projections to its side wall, each projecting radially in 4 or more directions. Those projections form a plurality of pairs, each of which is extending in an opposite direction from an axial center of the head. Those projection pairs include a primary projection pair having a largest length and a secondary projection pair having a second largest length. The length of the primary projection pair is equal to or more than an inside diameter of the through hole. The length of the secondary projection pair is less than the inside diameter of the through hole.

Abstract: A packaging structure of semiconductor elements and for mounting such elements on which high density pads are formed on a board at a high production yield, where bumps or gold wires are bonded in a staggered manner within a pad on a semiconductor element. The spaces between bumps or gold wires can be widened without changing the semiconductor element.

Abstract: An electronic component assembly (10) is formed by mounting an electronic component (15) to the leads (12) of a leadframe (18). The portions of the leadframe (18) that come in physical contact with the electronic component (15) are electrically connected to the electronic component with bonding wires (31) or by placing the bonding regions (30) of the electronic component (15) in direct physical contact with the tips (35) of the leads (12). A package (20) is used to encapsulate the leads (12) and the electronic component (15).

Abstract: An electronic module comprises (a) an electrical assembly of electrical components and a cap. The cap surrounds a portion of the electrical assembly of electrical components to form a pocket between a portion of the electrical assembly of electrical components and the cap. The cap has at least one sidewall, each of the at least one sidewalls having an end, one of at least one sidewalls proximately positioned to at least one electrical lead and having at least one notch positioned in the end, the pocket filled with an encapsulant. A process comprises providing a cap and filling the cap with encapsulant, placing an electrical assembly of electrical components in the cap filled with the preselected amount of encapsulant, and allowing the electrical assembly to seat to a proper depth.

Abstract: A multiple die package may include a pair of dies having bonding pads and a front surface on which the bonding pads are located. The front surface is facing the same direction. At least one of the dies is secured to a lead frame. A spacer spaces the die from one another. At least one of the dies is spaced from the leadframe by a distance greater than the thickness of the die.

Abstract: A package socket system includes a positioning frame positioned on a circuit board. The positioning frame has an interior space defined between four side walls for receiving and accommodating a BGA socket that retains an array of contacts therein. The contacts have a lower ball end in contact engagement with and supported on conductive pads of the circuit board. A BGA package having an array of solder balls is received in the positioning frame and supported on the socket with the solder balls received in flared upper ends of the contacts of the socket. A heat sink has a flat base supported on the positioning frame and secured to the substrate to establish a firm contact engagement with the package thereby securely maintaining the package and the socket in position on the substrate. The positioning frame has a chamfered section and the socket and the package each have a corresponding chamfered corner for positioning purposes.

Abstract: Battery mounting apparatuses, electronic devices, and methods of forming electrical connections are described. In one implementation, a flexible circuit substrate has an area within which an electrical component, e.g. a thin-profile battery terminal housing member, is to be adhered. A conductive contact node pattern is disposed within the area and sized to be conductively adhered with the component. In one aspect, the conductive contact node pattern comprises an outer conductive node on the substrate at least a portion of which is positioned within the outermost 25% of the area. An electrical component is conductively bonded with the contact node pattern and encapsulating material is provided over and underneath the component. In a preferred aspect, the substrate and electrical component are vacuum processed sufficiently to redistribute the encapsulating material under the component.

Abstract: The specification describes a recessed chip IC package in which the IC chip is bonded to a translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The translator also has a large area outboard of the IC chip area to allow fan out from high pin count chips to large pitch interconnection sites for interconnection to the next board level.

Abstract: Leads 106 provided at an electronic part connectors 110 of an electronic part 100, which are electrically connected to a surface of a substrate 120 are structured in such a manner that they are directly connected to a substrate connector formed at the surface of the substrate 120 through a pressing force or a bonding force applied to the electronic part 100. This lead structure makes it possible to preclude the use of connectors including additional members such as contact pins, to achieve a reduction in the length of the communicating path of the electrical signals, and in addition, since electrical connection is achieved at one location, i.e., between the leads 106 and the substrate connector at the substrate 120, the contact resistance is minimized.

Abstract: A printed circuit board is provided with at least one component having one or more leads which are secured to contact faces of the printed circuit board. The leads of the component are secured to the printed circuit board via wire clamps soldered onto the surface of the contact faces. The formation of through-holes in the printed circuit board is rendered superfluous by the wire clamps. For the leaded components use can be made of resistors and capacitors, but also of a single electroconductive wire. Also described is a method of manufacturing the invented printed circuit board.

Abstract: A semiconductor device including bond pads disposed proximate an edge thereof, and an overcoat layer. The overcoat layer defines notches around each of the bond pads. The overcoat layer may be formed from a photoimageable material such as a photoimageable epoxy. The invention also includes an alignment device that secures the semiconductor device perpendicularly upon a carrier substrate. The alignment device includes intermediate conductive elements which correspond to the bond pads of the semiconductor device. Upon insertion of the semiconductor device into the alignment device, the notches facilitate alignment of the bond pads with their corresponding intermediate conductive elements. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate.

Abstract: A ball grid array integrated circuit package which has a plurality of elliptical shaped solder pads located on a substrate of the package. Routing traces are connected to the apexes of the elliptical shaped solder pads. Connecting a routing trace to the apex of an elliptical shaped solder pad reduces the stress points on the trace/pad interface. Vias may be coupled to the solder pads and the routing traces. The vias are located at the apexes of the elliptical shaped solder pads to reduce the stress points of the substrate.

Abstract: A high density vertical surface mount package and thermal carrier therefor including a heat sink.

Abstract: A semiconductor device comprises a semiconductor chip having a major surface, a plurality of bonding pads provided on the major surface of the semiconductor chip, an adhesive tape provided on a selected part of the major surface of the semiconductor chip, and a plurality of inner leads mounted on the adhesive tape, each adhered at a lower surface thereof to the adhesive tape. The device further comprises a wiring lead, bonding wires, and a resin-molded package. The wiring lead has at least one end portion and spaced apart from the major surface of the chip. The at least one end portion is depressed from the inner leads toward the semiconductor chip, located outside the adhesive tape and formed integral with at least one of the inner leads.

Abstract: There is disclosed herein a printed circuit board (PCB) having enhanced mounting pads useful for overprinting solder paste and for repair of the solder joints. The PCB comprises: a dielectric substrate 10 having at least one mounting pad 20 thereon, wherein each mounting pad is arranged in matched relation with a respective termination 32 of an electronic component 30. Each mounting pad 20 includes a main body portion 24 and one or more fingerlike extensions 26 extending outward from the main body portion and away from a projected footprint 34 of the electronic component.

Abstract: A high density vertical surface mount package and thermal carrier therefor including a heat sink.

Abstract: The surface-mount device package comprises a pad located on a face of the surface-mount device, a solder bump bonded to the pad, and a terminal spaced radially apart from the pad. A terminal surrounds the pad in at least one common plane that bisects the pad and the terminal. An electrically resistive volume intervenes between the pad and the terminal. The pad is electrically coupled to the terminal through the resistive volume. The terminal, the pad, and the electrically resistive volume cooperate to form a passive component associated with at least one device interconnection. The passive component preferable comprises an integral resistor. The integral resistor serves to eliminate or at least substantially reduce electrical resonances and reflections that may otherwise degrade the signal integrity.

Abstract: The present invention relates to a device and a method for electrical and mechanical connection of an electric high-power component (111) which transmits high-frequency electrical signals to conductors (120) on a circuit board (119). The component comprises connections (114) projecting over the circuit board and which are soldered to the conductors (120) on the circuit board (119) with a solder material (112) which essentially lacks grain growth. The component is subject to repeated temperature changes which leads to stresses on the connection between the connections (114) and the conductors (120). The length of the connections is selected depending on a predetermined threshold value for the highest acceptable attenuation which the high-frequency electrical signal is subject to when passing through the electrical high-power component via the connections. The connections can be shaped so that they comprise a bent part with a bending which is determined in dependence of said threshold value.

Abstract: A radio frequency identification tag (100) includes a radio frequency identification tag circuit chip (112) bonded to a substrate (114). Additional circuit components (140) are also bonded to the substrate. The substrate is formed to include a number of conductive traces (18, 20), and the radio frequency identification tag and circuit components are electrically coupled to the traces via selective application of a printable conductive medium (130, 132).

Abstract: A ball grid array (BGA) land pattern. In the present invention, a capture pad is disposed on a substrate. The capture pad is electrically coupled to a via which is formed into the substrate. A substantially rectangularly-shaped landing pad is also disposed on the substrate proximate to the capture pad. The substantially rectangularly-shaped landing pad is electrically coupled to the capture pad. In one embodiment, an electrically conductive connecting region electrically connects the substantially rectangularly-shaped landing pad to the capture pad. More specifically, the electrically conductive connecting region has a first end coupled to the capture pad and a second end coupled to the substantially rectangularly-shaped landing pad.

Abstract: A connector type semiconductor package having a package mounting surface on a package main body, the connection direction of a signal connection connector being parallel to the package mounting surface, the package comprising a connector insertion portion provided in the package main body, the signal connection connector detachably inserted into the connector insertion portion, surface mount type electrical connection terminals provided at the package main body, and a step provided at a side where the connector insertion portion of the package main body is provided, for determining the height of the surface mount type electrical connection terminals.

Abstract: Briefly stated a tag includes a dielectric substrate having first and second opposite principal surfaces. An electrical circuit having an electrically conductive pattern is formed on at least one of the principal surfaces of the dielectric substrate, the conductive pattern including a gap which establishes an electrical open circuit. An electrically conductive composition including electro-conductive particles is provided for bridging the gap in the conductive pattern to temporarily establish an electrical closed circuit which resonates when exposed to electromagnetic energy at a frequency within a predetermined frequency range.

Abstract: Procedure for producing a transponder unit (55) provided with at least one chip (16) and one coil (18), and in particular a chip card/chip-mounting board (17) wherein the chip and the coil are mounted on one common substrate (15) and the coil is formed by installing a coil wire (21) and connecting the coil-wire ends (19, 23) to the contact surfaces (20, 24) of the chip on the substrate.

Abstract: An electronic module or package is disclosed for providing high reliability and high performance operation. The package comprises a hermetically sealed enclosure having a metallic baseplate and a ceramic cover, and containing one or more circuits or devices therein which typically are power rectifiers, bridges or power control circuitry. One or more power terminals are disposed on a terminal block compliantly supported on or above the baseplate, the terminals extending through the cover in hermetically sealed manner. Signal or control terminals may also be disposed on a terminal block compliantly supported on or above the baseplate, these terminals also extending through the cover in hermetically sealed manner. An adapter plate may be mounted on the cover and containing a plurality of terminals connected to the module terminals. The terminals of the adapter plate can be in any configuration to suit user requirements without requiring a change in the terminal configuration of the module itself.

Abstract: Routing density of a wiring substrate (10) is increased by providing a nested plating bus (18) as a supplement to an external plating bus (16). A first group of conductive traces (14) is connected to the nested plating bus, while another group of traces is connected to the external plating bus. After the conductive elements are plated, the nested plating bus is removed by etching, milling, or stamping techniques. Use of a nested plating bus increases I/O count for a given substrate area and/or reduces the need to have routing on more than one layer of the substrate.