Flexible Connecting Lead Patents (Class 361/776)
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Patent number: 5734176Abstract: A test fixture for testing an integrated circuit having leads. The test fixture includes a substrate with top and bottom surfaces and holes extending from the top to the bottom surface. The integrated circuit is mounted on the top surface with each lead located above each hole. Contact flippers are located on the top surface of the substrate, with the contact flippers extending between the leads and the holes. Shuttle springs are located along the bottom surface and extend across the holes. Shuttles are inserted into each hole so that upon contact by the leads against the contact flippers, the shuttles move downward and against the upward pressure from the shuttle springs to provide a resilient connection between the test fixture and the integrated circuit.Type: GrantFiled: February 26, 1996Date of Patent: March 31, 1998Assignee: Wiltron CompanyInventor: William W. Oldfield
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Patent number: 5715143Abstract: A carrier system for an integrated circuit carrier assembly composed of a carrier member supporting an integrated circuit. The carrier system enables a number of carrier assemblies to be flexibly and sequentially interconnected, so as to form a flexible and continuous chain of carrier assemblies. The carrier system is characterized by interconnecting the carrier assemblies with a single tape that facilitates accurate alignment and placement of the carrier assemblies within the carrier system, and minimizes the risk of an adhesive buildup on the equipment used to handle the carrier system and separate the carrier assemblies from the carrier system.Type: GrantFiled: July 22, 1996Date of Patent: February 3, 1998Assignee: Delco Electronics CorporationInventors: John W. McHugh, Patricia Louise Jones
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Patent number: 5694296Abstract: A multipoint electrical interconnection (10) provides a plurality of electrical pathways between electrically conductive hooks (15) on a substrate (12) and an electrical component (50). A plurality of electrically conductive hooks generally formed in the shape of a `J` have a head portion (20) affixed to the substrate such that a hook portion (17) protrudes above the substrate. An electrically conductive portion of a component is disposed against the substrate such that it contacts at least three of the electrically conductive hooks and deforms the hooks. The deformed hooks provide a spring force to effect a multipoint electrical connection.Type: GrantFiled: December 20, 1995Date of Patent: December 2, 1997Assignee: Motorola, Inc.Inventors: Glenn F. Urbish, Robert W. Pennisi, William Boone Mullen, III, Robert W. Shisler, Richard A. Ceraldi
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Patent number: 5682297Abstract: A dual footprint for servicing either of two types of microprocessor packaging systems. A first footprint capable of receiving and servicing a first type of microprocessor packaging system, for example, a tape carrier package microprocessor package, is formed within a second footprint capable of receiving and servicing a second type of microprocessor packaging system, for example, a pin grid array microprocessor package. In a preferred form, the two footprints are electrically interconnected and the first footprint is offset by a selected angle from the second footprint to allow increased connectivity between the two footprints.Type: GrantFiled: March 12, 1996Date of Patent: October 28, 1997Assignee: AST Research, Inc.Inventor: David J. Silva
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Patent number: 5682061Abstract: A semiconductor chip assembly is mounted to contact pads in a compact area array. An interposer is disposed between the chip and the substrate. The contacts on the chip are connected to terminals on the interposer by flexible leads extending through apertures in the interposer. The terminals on the interposer in turn are bonded to the contact pads on the substrate. Flexibility of the leads permits relative movement of the contacts on the chip relative to the terminals and the contact pads of the substrate and hence relieves the stresses caused by differential thermal expansion. The arrangement provides a compact structure similar to that achieved through flip-chip bonding, but with markedly increased resistance to thermal cycling damage.Type: GrantFiled: June 5, 1995Date of Patent: October 28, 1997Assignee: Tessera, Inc.Inventors: Igor Y. Khandros, Thomas H. DiStefano
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Patent number: 5666272Abstract: A system for packaging integrated circuit components including a ball grid array substrate with a plurality of solder balls coupled to the substrate. A semiconductor device is mounted on the substrate and electrically coupled to the solder balls. One or more terminals are coupled to the substrate and electrically coupled to said semiconductor device. A detachable module contains auxiliary component, such as a data acquisition device, a wireless communications device, an output device or driving devices for a clock circuit. The module comprises a body portion for containing the component and one or more electrical connectors for mating with respective terminals to hold the module to the substrate and to electrically couple the component with the semiconductor device.Type: GrantFiled: June 3, 1996Date of Patent: September 9, 1997Assignee: SGS-Thomson Microelectronics, Inc.Inventors: Dale Thomas Moore, Frank Sigmund, Fred Chevreton
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Patent number: 5657207Abstract: A substrate has a plurality of circuit traces having ends which terminate in raised contacts and an integrated circuit (IC) chip has a plurality of circuit traces terminating in contact ends which engage the raised contacts when the IC chip is positioned onto the substrate. The substrate also has a plurality of raised features thereon which are higher than and spaced from the raised contacts. The raised features have tapered side surfaces for engaging vertically extending surfaces on the IC chip to guide the IC chip into place of the substrate and so that its contact ends are aligned with and engage the raised contacts.Type: GrantFiled: April 29, 1996Date of Patent: August 12, 1997Assignee: Packard Hughes Interconnect CompanyInventors: Chris M. Schreiber, Bao Le
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Patent number: 5625944Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: May 6, 1997Assignee: Interconnect Systems, Inc.Inventor: William E. Werther
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Patent number: 5615088Abstract: A multi-layer, flexible printed circuit device having a relatively rigid electronic component mounting portion and a relatively pliable connection wiring portion. The electronic component mounting portion comprises multiple layers of bases including at least one rigid base, and circuit pattern layers. The pliable connection wiring portion is formed by extending pliable bases and circuit pattern layers at one end. The rigidity of the electronic component mounting portion may be maintained by means of the rigid base or bases comprising a thick panel made of the same material as the pliable bases. Alternatively, the copper films of the circuit pattern layers may be made relatively thick or a base material with high rigidity may be used.Type: GrantFiled: August 21, 1995Date of Patent: March 25, 1997Assignee: Minolta Co., Ltd.Inventor: Yoshiyuki Mizumo
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Patent number: 5606198Abstract: A semiconductor device comprising a semiconductor chip substrate, an integrated circuit formed on a surface of the semiconductor chip substrate, and metal electrodes extending from the integrated circuit to at least one of the side surfaces of the semiconductor chip substrate. Occupation area on a wiring circuit board can be reduced. Damaged chips can be exchanged easily. When it is set vertically, heat radiation efficiency can be improved.Type: GrantFiled: October 12, 1994Date of Patent: February 25, 1997Assignee: Yamaha CorporationInventors: Yukichi Ono, Katsuhiko Ishida
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Patent number: 5592365Abstract: There is provided a display panel assembly structure capable of achieving a highly reliable connection even when fine-pitch electrode terminals are employed. A second electrode terminal is embedded in a flexible printed circuit board, and protrudes slightly from the flexible printed circuit board within a range of 0 to 2.times.10.sup.-3 mm. By embedding the second electrode terminal in the flexible printed circuit board, an apparent thickness of the second electrode terminal is reduced while keeping the rigidity of the second electrode terminal to thereby improve etching accuracy of a top surface thereof. With the reduction of the protrusion amount of the second electrode terminal, a ratio of a thickness of an anisotropic conductive film to a diameter of a conductive particle can be made to be approximately "1".Type: GrantFiled: December 20, 1994Date of Patent: January 7, 1997Assignee: Sharp Kabushiki KaishaInventors: Takayuki Sugimoto, Yasunobu Tagusa, Hisao Kawaguchi
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Patent number: 5572407Abstract: Apparatus for interconnecting an integrated circuit device, such as an infrared device, having a plurality of leads to a multilayer printed wiring board having a plurality of interconnects. The apparatus comprises a flexprint circuit having a plurality of interconnects that are configured to mate with the plurality of interconnects on the printed wiring board. The flexprint circuit has wrinkles formed along its surface that form a spring, and a plurality of printed circuit leads that are coupled between the leads of the integrated circuit device and the interconnects. Fastening members is provided for forcibly interconnecting the respective pluralities of interconnects. Respective ends of the flexprint circuit may be folded so that the interconnects contact the interconnects disposed on the printed wiring board.Type: GrantFiled: November 13, 1995Date of Patent: November 5, 1996Assignee: Hughes Aircraft CompanyInventor: Mohi Sobhani
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Patent number: 5567991Abstract: An electric vehicle relay assembly including a main relay and a flexible circuit electrically connected to the main relay. The relay assembly further includes a connection for mounting the flexible circuit onto the main relay and a wiring board affixed to the flexible circuit. The flexible circuit compensates for mechanical tolerance errors within the connection. The wiring board includes relay circuitry electrically connected to the flexible circuit.Type: GrantFiled: June 10, 1994Date of Patent: October 22, 1996Assignee: Northrop Grumman CorporationInventors: David L. Schantz, James H. DeOms, Ronnie L. Starling, Michael J. Ankrom
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Patent number: 5568363Abstract: A surface mount component comprising an IC chip, and a plurality of leads extending outward from the body of the chip. The leads are interconnected by an insulating frame at their outer ends. Each of the leads is provided in the vicinity of the portion thereof joined to the frame with an outer lead portion to be electrically connected to a wiring board. The frame is integrally connected to the chip body by bridges. When the component is mounted on the surface of the wiring board, the outer lead portion of each lead is bonded to the board by a solder layer without separating off the frame.Type: GrantFiled: April 10, 1995Date of Patent: October 22, 1996Inventor: Akira Kitahara
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Patent number: 5554823Abstract: A tantalum capacitor chip and lead terminals respectively connected to two electrodes of the chip are molded in resin. A portion of the lead terminal, not molded in the resin is bent at a tip side and at a base side. The resin is provided with a structure in which its upper half is longer than its lower half at both sides. The base side portion of the portion not molded in the resin, of each of the lead terminals is curved downward with a predetermined radius of curvature, and an inwardly bent portion is formed on the tip side of the base side curved portion of the protruding portion.Type: GrantFiled: December 23, 1992Date of Patent: September 10, 1996Assignee: Rohm Co., Ltd.Inventor: Miki Hasegawa
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Patent number: 5548486Abstract: An electrical connection pin blank having at least one compliant section is affixed to a first circuit board by compressive deformation in such a way that the compliant section of the pin blank projects outwardly from the surface of the first circuit board. The end of the pin projecting from the first circuit board is then inserted into a corresponding opening in a second circuit board and the two boards brought together until the second circuit board is firmly affixed to the complaint section of the pin by compliant pin connection.Type: GrantFiled: January 21, 1994Date of Patent: August 20, 1996Assignee: International Business Machines CorporationInventors: Stephen J. Kman, John A. Stubecki, William R. Sondej
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Patent number: 5543586Abstract: An apparatus comprising a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and a device having at least one electrically conductive lead or wire extending into the well and being in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate.Type: GrantFiled: March 11, 1994Date of Patent: August 6, 1996Assignee: The Panda ProjectInventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 5532906Abstract: A wiring substrate includes a ceramic substrate having a first conductive connection pattern on an lower surface of the ceramic substrate and a second conductive connection pattern on an upper surface or the lower surface of the ceramic substrate, a multilayered wiring portion arranged on the lower surface of the ceramic substrate through the first conductive connection pattern and including an insulating layer made of an organic polymer, on which an integrated circuit and/or a circuit part are/is mounted, and a flexible wiring substrate, connected to the second conductive connection pattern, for connecting the integrated circuit and/or the circuit part to an external circuit.Type: GrantFiled: July 21, 1995Date of Patent: July 2, 1996Assignee: Kabushiki Kaisha ToshibaInventors: Jun Hanari, Takeshi Miyagi, Kazuhiro Matsumoto, Ayako Tohdake, Yoshitaka Fukuoka
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Patent number: 5532910Abstract: A hybrid integrated circuit having a lead frame electrically connected to electronic components by means of a silver (Ag) paste, the hybrid integrated circuit comprising: an electroless-plated coating on the lead frame, the coating being free from an insulating surface oxide layer at least in a connection area in which the electrical connection is provided. A process of producing this hybrid integrated circuit comprises: a first step of electroless-plating a lead frame by using a phosphorus-containing reducing agent to form a coating on the lead frame; a second step of mounting electronic components on the lead frame and then electrically and mechanically connecting the former to the latter by means of an electroconductive paste; and a third step of maintaining the surface of the electroless-plated coating free from a phosphorus-containing oxide layer during the connecting operation.Type: GrantFiled: July 14, 1995Date of Patent: July 2, 1996Assignee: Nippondenso Co., Ltd.Inventors: Yasutoshi Suzuki, Kenichi Ao, Yoshimi Yoshino, Ryoichi Narita, Hiroshi Omi
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Patent number: 5514839Abstract: A termination for a flexible circuit having flat conductive strips integrally bonded to a flexible substrate. The conductive strip has a termination portion located adjacent an aperture in the substrate. The termination portion has a connection tab, with the termination portion and the connection tab lying in a plane. The termination is for connection to a conductive element end which extends through the aperture. The connection tab is formed into a shape outside the plane with the connection tab engaging the conductive element where it is secured by welding to the conductive element.Type: GrantFiled: February 9, 1995Date of Patent: May 7, 1996Assignee: Honeywell Inc.Inventor: Terrence D. Bender
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Patent number: 5508888Abstract: A mechanical component peripheral lead protector covers fine pitch component leads in such a manner that nothing can come into contact with them. The lead protector is disposed above the component having the leads. It can be made of aluminum, conductive plastic or any other non ESD (electric static discharge) generating material. It can be glued, snapped, bolted or riveted to the associated PC board or glued to the top of the component, depending upon the application in which it is being used. The attachment method should be one which enables it to be removed and replaced when necessary. The center of the lead protector can be provided with an aperture so that the legends on the top of the component will be exposed.Type: GrantFiled: May 9, 1994Date of Patent: April 16, 1996Assignee: AT&T Global Information Solutions CompanyInventor: Terry Craps
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Patent number: 5490040Abstract: An electrical device for logic circuits having a package comprising a combination of controlled collapse electrical interconnections, such as solder balls and pin through-hole conductors, wherein the conductors are disposed outside the perimeter of an inter-array of solder balls, which when a maximum number of solder balls are disposed, the array is circular in shape, so as to provide an increased footprint for the electrical device beyond that, otherwise maximum footprint for solder balls alone, which footprint is otherwise limited in size due to failures which occur in solder balls when solder balls are exposed to thermal and mechanical stress levels at extended distances from the neutral or zero stress point of the array.Type: GrantFiled: December 22, 1993Date of Patent: February 6, 1996Assignee: International Business Machines CorporationInventors: Gene J. Gaudenzi, Joseph M. Mosley, Vito J. Tuozzolo, John C. Milliken
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Patent number: 5455390Abstract: A component for mounting semiconductor chips or other microelectronic units includes a flexible top sheet with an array of terminals on it, and with flexible leads extending downwardly from the terminals. A compliant dielectric support layer surrounds the leads, holding the lead tips in precise locations. The leads are desirably formed from wire such as gold wire, and have eutectic bonding alloy on their tips. The component can be laminated to a chip or other unit under heat and pressure to form a complete subassembly with no need for individual bonding to the contacts of the chip. The subassembly can be tested readily and provides compensation for thermal expansion.Type: GrantFiled: February 1, 1994Date of Patent: October 3, 1995Assignee: Tessera, Inc.Inventors: Thomas H. DiStefano, John W. Smith, Jr.
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Patent number: 5452182Abstract: A flexible high density interconnect structure is provided by extending the high density interconnect structure beyond the solid substrate containing the chips interconnected thereby. During fabrication, the flexible portion of the high density interconnect structure is supported by a temporary interconnect support to facilitate fabrication of the structure in accordance with existing fabrication techniques. Subsequently, that temporary support structure may be removed or may remain in place if it sufficiently flexible to impart the desired degree of flexibility to that portion of the high density interconnect structure. Methods of fabrication are also disclosed.Type: GrantFiled: April 7, 1992Date of Patent: September 19, 1995Assignee: Martin Marietta CorporationInventors: Charles W. Eichelberger, William P. Kornrumpf, Robert J. Wojnarowski
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Patent number: 5452183Abstract: This invention is directed to a chip carrier system for mounting to a first planar electronic device, such as a motherboard or test fixture, where first planar electronic device is provided with a planar, electrical interconnection interface mounted thereto. The chip carrier system includes a frame comprising a peripheral body portion defined by upper and lower planar surfaces, a recess in the lower planar surface to receive the planar, electrical interconnection interface, a central recess terminating in a floor to receive a second planar electronic device, such as an integrated circuit chip, having leads extending therefrom, converging side walls extending from the upper planar surface down to the floor, and plural through slots for receiving the leads. Cooperating therewith is a force applying member adapted to provide a normal force to the second planar electronic device and be mechanically secured to the frame.Type: GrantFiled: March 28, 1994Date of Patent: September 19, 1995Assignee: The Whitaker CorporationInventors: Robert M. Renn, Keith L. Volz, Robert D. Irlbeck, Frederick R. Deak
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Patent number: 5448451Abstract: Two device holes are formed in a base film such that the device holes are juxtaposed in a width direction of the base film perpendicular to a feed direction of the base film. An outer lead hole is formed in the base film with a distance from the device holes in the feed direction. A first lead wire group is arranged on the base film between the outer lead hole and one of the device holes, and a second lead wire group is arranged on the base film between the outer lead hole and the other device hole. Further, a third lead wire group is arranged on the base film between both device holes.Type: GrantFiled: November 19, 1993Date of Patent: September 5, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Chiaki Takubo, Kimihiro Ikebe, Masafumi Takeuchi, Seiichi Hirata, Sumio Takeda
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Patent number: 5442511Abstract: A generic solenoid driver circuit and circuit board may be used in a plurality of application specific driver circuits. The circuit board includes a plurality of binary driver circuit locations, proportional circuit locations, and jumper locations. Electrical components are inserted at those locations needed for the circuit to perform the functions of the specific application. Microprocessor controlled switches may be substituted for the jumper locations so that the solenoid driver circuit configuration may be software controlled.Type: GrantFiled: March 30, 1993Date of Patent: August 15, 1995Assignee: Caterpillar Inc.Inventors: Stephen J. Morey, Joseph G. Kozlevcar
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Patent number: 5442519Abstract: Disclosed is a device and method of manufacture which provides a maintenance termination unit (MTU) and surge protector in a single 5-pin package. The components for both the MTU and surge protector are formed on a single printed circuit board separated by a groove but electrically connected by a plurality of wires. After wave soldering the contacts on the board, the board is broken apart while maintaining the electrical connection, and the resulting structure is mounted in a 5-pin package.Type: GrantFiled: December 29, 1993Date of Patent: August 15, 1995Assignee: AT&T Corp.Inventors: George A. DeBalko, Rajendra S. Rana
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Patent number: 5440452Abstract: A surface mount component comprising an IC chip, and a plurality of leads extending outward from the body of the chip. The leads are interconnected by an insulating frame at their outer ends. Each of the leads is provided in the vicinity of the portion thereof joined to the frame with an outer lead portion to be electrically connected to a wiring board. The frame is integrally connected to the chip body by bridges. When the component is mounted on the surface of the wiring board, the outer lead portion of each lead is bonded to the board by a solder layer without separating off the frame.Type: GrantFiled: May 12, 1993Date of Patent: August 8, 1995Assignee: Akira KitaharaInventor: Akira Kitahara
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Patent number: 5432680Abstract: A pair of holding members, which are displaced from each other along the horizontal plane of a plate face, are formed on each forward end of a plurality of plate type lead terminals fixed to a long base tape. An electronic component body is resiliently held by the paired holding members which are bent in opposite directions in relation to the plate thickness direction. The lead terminals are divided into first and second groups; bending modes for the pairs of holding members provided on the lead terminals belonging to the first group are opposite to those for the pairs of holding members provided on the lead terminals belonging to the second group in relation to the plate thickness direction. Thus, it is possible to suppress distortion of the electronic component with respect to the base tape.Type: GrantFiled: July 26, 1993Date of Patent: July 11, 1995Assignee: Murata Manufacturing Co., Ltd.Inventors: Toru Tsuchida, Hiroyoshi Shigeyama
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Patent number: 5420461Abstract: An integrated circuit device having an array of flexible leads attached to the bottom of an integrated circuit package. There is provided a sheet of electrically conductive material. A plurality of slots are punched into the sheet, such that there is formed a plurality of beams. The beams are then bent into a spring shape. The sheet is placed over an integrated circuit package which has an array of contact pads extending across a bottom surface of the package. The beams are aligned and attached to the contact pads. The beams are then cut and separated from the remainder of the sheet. The sheet is removed, wherein there is constructed an integrated circuit package that has a two dimensional array of flexible leads.Type: GrantFiled: April 7, 1994Date of Patent: May 30, 1995Assignee: Intel CorporationInventors: Debendra Mallik, Bidyut K. Bhattacharyya
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Patent number: 5414220Abstract: Disclosed herein is a flexible wiring cable being provided on its forward end with a connecting portion to be connected with a connector, which comprises a base film, a wiring conductor provided on the base film, a dielectric member electrically connected with the wiring conductor in the connecting portion of the base film, and a ground electrode electrically connected with the dielectric member for forming a capacitor with the wiring conductor.Type: GrantFiled: October 19, 1993Date of Patent: May 9, 1995Assignee: Murata Manufacturing Co., Ltd.Inventors: Yoshio Hanato, Toshio Hori, Hiromichi Tokuda, Toshimi Kaneko
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Patent number: 5400219Abstract: An article of manufacture which has a substrate including electrical leads and bond pads electrically connected to the leads. Two or more integrated circuit semiconductor chips are supported on the substrate. Each of the chips includes a plurality of edges and a plurality of input/output (I/O) bond pads. A portion of the bond pads on each chip are located adjacent at least one edge of the respective chip. At least two separate sections of Tape Automated Bonding (TAB) tape electrically connect the I/O bond pads on each chip to the bond pads on the substrate. In a refinement of the invention, the sections of TAB tape each include a plurality of inner lead bond leads extending from a longitudinal (along the tape length) edge of the tape. Each inner lead bond is connectable to one of the I/O bond pads on the chips.Type: GrantFiled: March 28, 1994Date of Patent: March 21, 1995Assignee: Eastman Kodak CompanyInventors: Samuel Reele, Thomas R. Pian
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Patent number: 5398165Abstract: To prevent the lead terminals of an electronic circuit component from being bent due to the vibration of the component after being mounted on a circuit board, each lead terminal has a tapered portion formed between an inserted tip portion and a cut dumb bar portion and having a width which decreases from the dumb bar portion toward the tip portion to prevent stresses from concentrating in the terminal.Type: GrantFiled: May 3, 1993Date of Patent: March 14, 1995Assignee: Rohm Co., Ltd.Inventor: Koichi Niinou
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Patent number: 5394305Abstract: Card cages for mounting an array of electronic modules are provided for. The card cage comprises a plurality of generally rectangular shaped panels, including a top panel, a bottom panel, a back panel, and two side panels. The panels are adapted for assembly into a generally right-rectangular prism shaped frame having a closed back and an open front and defining one or more module mounting areas. The card cage also comprises guides adapted to slidably receive one or more electronic modules having electrical connectors. The guides are provided on at least one panel defining each mounting area. The back panel has electrical connectors adapted to engage the electrical connectors of the electronic modules. The top, bottom, and side panels are interlockable. Those interlockable panels are fabricated from a single sheet of metal and have a plurality of integral interlocking members. The interlocking members collectively constitute a plurality of associated pairs of tongues and openings.Type: GrantFiled: December 23, 1993Date of Patent: February 28, 1995Assignee: Charles Industries, Ltd.Inventors: Leonardo D. Moral, Horace C. Rodriguez, Ronald M. Samson, Walter T. Harwood
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Patent number: 5392193Abstract: A transistor mounting device (102) includes a recess area (112) for allowing a transistor (114)to be secured to the transistor mounting device (102) by turning the transistor a certain amount. Once the transistor (114) is secured into position to the transistor mounting device (102), a set of transistor pads (402) provide support and alignment to the transistor fins (116).Type: GrantFiled: May 31, 1994Date of Patent: February 21, 1995Assignee: Motorola, Inc.Inventors: William H. Robertson, Jr., Chot Q. Pham, Philip C. Warder, James L. Stephens
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Patent number: 5389743Abstract: A ceramic circuit card (10) for a missile utilizing a "rivet" design and a method for making the same wherein thick-film copper I/O pads (15) are fabricated on a first dielectric layer (13) and on the upper surface of conducting material (20) in vias (14) formed in the dielectric layer (13). A first conductor layer (11) is printed directly on an alumina ceramic layer (12). The dielectric layer (13) is then printed on the first conductor layer (11) and on the alumina ceramic layer (12). During operation, each I/O pad (15) has attached to it a flex harness (21) for connecting the card (10) to a printed wiring board (22) on which the card (10) is mounted. The ceramic circuit card (10) is further comprised of additional dielectric and conductor layers in an alternating stacked arrangement. The top conductor layer is used to connect the circuit card to other electrical components.Type: GrantFiled: December 21, 1992Date of Patent: February 14, 1995Assignee: Hughes Aircraft CompanyInventors: Charles E. Simila, Mradul Mehrotra
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Patent number: 5386344Abstract: A flex circuit card with an elastomeric cable connector assembly is provided for transmitting high speed signals between two or more printed circuit boards in a high performance computer system. The flex circuit card connects a cable assembly to a printed circuit board. A conductor trace in the flex circuit card extends into an elastomeric end and terminates with a ball shaped contact which is angled to wipe against mating pads on the printed circuit card for making electrical contact. The cable assembly uses multiple wires attached to a plurality of elastomeric connectors. At least one elastomeric connector is attached to each end of the cable assembly and each elastomeric connector has a plurality of contacts which are used to mate with a plurality of pads on the surface of the printed circuit board. The elastomeric connector described in the present invention provides a high density, cable-to-board interconnection that is perpendicular to the surface of the printed circuit board.Type: GrantFiled: January 26, 1993Date of Patent: January 31, 1995Assignee: International Business Machines CorporationInventors: Brian S. Beaman, Fuad E. Doany, Thomas J. Dudek, Alphonso P. Lanzetta, Da-Yuan Shih, William J. Tkazyik, George F. Walker
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Patent number: 5383094Abstract: A specially designed electronic component is surface mounted on a printed circuit board substrate member having a spaced series of electrically conductive circuitry connection portions disposed on a side surface thereof. The electronic component has a body portion with a spaced series of elongated metal lead members fixedly secured thereto and projecting outwardly therefrom. Longitudinal portions of the lead members are soldered to the circuitry connection portions. Side surface areas of these longitudinal portions are clad with a second metal material having a coefficient of thermal expansion substantially different than that of the underlying longitudinal lead member portions. During fabrication of the circuit board a solder paste material is deposited on the circuitry connection portions and the lead member longitudinal portions are placed in a closely adjacent, aligned relationship with the circuitry connection portions.Type: GrantFiled: October 28, 1993Date of Patent: January 17, 1995Assignee: Dell USA, L.P.Inventor: Howard S. Estes
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Patent number: 5381308Abstract: A device and method for locking an electrical component, having a body and a flange portion, with a panel through a panel opening, in which the flange abuts a first face of the panel, which includes moving an actuator on the body of the component to displace a cam follower on the body from a first to a second position in which the cam follower projects beyond the contour of the body enough to abut another panel face.Type: GrantFiled: October 20, 1993Date of Patent: January 10, 1995Inventors: Richard W. Wolpert, Alan T. Wolpert, Richard A. Wolpert
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Patent number: 5363279Abstract: A semiconductor package having outer leads which are not protruded from the package but only exposed to outside. The semiconductor package comprises a semiconductor chip which is formed with a plurality of bond pads at a central portion of its bottom surface, a lead frame including leads connected to bond pads for input/output of the bond pads respectively and bus bars connected to power supplying pads of the bond pads, insulation adhesives for attaching inner leads of the leads and inner leads of the bus bars to a bottom surface of the semiconductor chip formed with the bond pads, metal wires for electrically connecting the inner leads of the leads and the inner leads of the bus bars to the bond pads respectively, and a molding compound enveloping the semiconductor chip assembly with outer leads of the lead frame exposed to outside. The adhesive tapes are removed after a molding procedure.Type: GrantFiled: November 3, 1992Date of Patent: November 8, 1994Assignee: Goldstar Electron Co., Ltd.Inventor: Gi Bon Cha
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Patent number: 5349501Abstract: An electronic device adaptive to mounting on a printed wiring board, which has outer leads that are not subject to be deformed by external force, which helps improve positioning precision when it is mounted, and which can be transported at a reduced cost. A plurality of conductor leads connected to an electronic circuit provided in the electronic device extend along a peripheral surface of the package, and at least the ends of the conductor leads are fixed to the peripheral surface of the package to constitute input/output terminals of the electronic circuit. Preferably, the conductor leads are formed on a flexible film, bent along the peripheral surface of the package together with the film and are fixed to a bottom surface of the package via the film. Preferably, furthermore, a film in the form of a tape is employed, and a plurality of packages are arranged and supported on the film while maintaining a predetermined distance between one another.Type: GrantFiled: October 9, 1992Date of Patent: September 20, 1994Assignee: Nippon Steel CorporationInventor: Youji Kawakami
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Patent number: 5349495Abstract: A system for securing and electrically connecting a semiconductor chip to a body of passive substrate. The semiconductor chip and the substrate are both provided with bonding pads or bonding areas. The bonding pads or areas are located so that when a chip is placed next to the substrate, at least some of the bonding pads on the chip are aligned with corresponding bonding areas on the substrate. Micro-pins in the shape of straight wires, stubs or loops are used to electrically connect some of the bonding pads on the chip to corresponding areas on the substrate thereby electrically connecting them and also securely bonding the chip to the substrate. In the preferred embodiment, epoxy is used to further strengthen the physical bonding between the chip and the substrate. The wicking action of the micro-pins reduces bridging of solder across adjacent micro-pins.Type: GrantFiled: October 4, 1990Date of Patent: September 20, 1994Assignee: VLSI Technology, Inc.Inventors: Thomas A. Visel, Jon M. Long
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Patent number: 5343365Abstract: A PCB relay comprising a housing having a bottom side, a top side and a circumferential wall and terminal pins protruding from the bottom side for being contacted to a printed circuit board. For conducting heavy load currents from the relay contacts and away from the printed circuit board in a quick manner and via a short pathway, at least two conducting strips are fastened to the circumferential wall of the housing, extending from the bottom side to the top side. The strips form soldering pins at the bottom end thereof and quick-connect plugs or terminals at the top end thereof. An electrically conducting connection between the strips and the terminal pins of the relay may be formed on the PCB or, alternatively, the elements may be directly connected to one another.Type: GrantFiled: September 23, 1992Date of Patent: August 30, 1994Assignee: Potter & Brumfield, Inc.Inventor: Klaus Lueneburger
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Patent number: 5341233Abstract: A matrix liquid crystal unit having a liquid crystal panel composed of two flexible plastic substrates and a liquid crystal material sandwiched between the flexible plastic substrates, and a flexible circuit sheet with a plurality of liquid crystal driver TAB.multidot.LSI assemblies mounted thereon are electrically connected to each other, making up a liquid crystal unit. Each of the flexible plastic substrates has a group of liquid crystal driver electrodes. Each of the liquid crystal driver TAB.multidot.LSI assemblies has a group of output terminals connected respectively to the liquid crystal driver electrodes through connection lines on the flexible circuit sheet. A connector connected to electrode terminals on the flexible circuit sheet, an interface connector to be connected to electrode terminals of an external control device, and printed wires for electrically connecting the connectors to each other, jointly make up a thin board.Type: GrantFiled: January 13, 1993Date of Patent: August 23, 1994Assignee: Idemitsu Kosan Co., Ltd.Inventors: Kazuhiro Tomoike, Moriyoshi Kurosawa
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Patent number: 5326161Abstract: An elastomeric seating member and an assembly incorporating the same, particularly for solenoid coils of solenoid valves in ABS systems, is provided. The elastomeric seating member (40) provides a moisture resistant seal between a first housing (24) in which first members, such as the solenoid coils (26), are mounted and a second housing (48) in which electronic circuitry, such as the electronic control circuitry (38) for the solenoid valves, is mounted. The elastomeric seating member is mounted within a bore (32, 32a) communicating between the first and second housings and provides a seat for the solenoid coils and is arranged to permit the solenoid coils a limited amount of movement so that when the first housing is mounted on a valve block (20) comprising switch parts (30) of the solenoid valve, the elastomeric seating member permits the movement of the solenoid coils for alignment with the switch parts (30).Type: GrantFiled: September 4, 1992Date of Patent: July 5, 1994Assignee: Motorola, Inc.Inventors: Graham L. Adams, Guenter Trach
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Patent number: 5317479Abstract: A curved lead provides a mechanical and electrical connection between a board contact on a circuit board and a chip contact associated with a circuit chip. The chip can be mounted to the circuit board, to a chip carrier or to a multiple-chip module. The curved lead is substantially entirely plated with solder and is formed of a single piece of conductive material. The curved lead has a first surface for connection to the chip contact and a second surface, generally parallel to the first surface, for connection to the board contact. The first and second surfaces are connected by at least one curved portion and are arranged to mount the circuit chip to the circuit board with the solder in a compliant, generally parallel arrangement substantially free of stress.Type: GrantFiled: October 1, 1993Date of Patent: May 31, 1994Assignee: Computing Devices International, Inc.Inventors: Deepak K. Pai, Terrance A. Krinke
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Patent number: 5313368Abstract: A flexible electrical connector (16) provides a circuit interface between the bent leads (12) of an integrated circuit package (10) and the respective circuit pads (14) of a printed circuit board (15). The integrated circuit package (10) is mounted on the surface of the printed circuit board (15), and the circuit interface has a substantially zero insertion force therebetween. The flexible electrical connector (16) has closely-spaced circuit traces (17) carried by an elastomeric core (18). The traces (17) accommodate the fine pitch of the leads (12) on the integrated circuit package (10); and the elastomeric core (18) provides a resilient "cushion" which compensates for irregularities or tolerance accumulations in the bent leads (12) as well as the different lead-bending specifications of the respective integrated circuit manufacturers.Type: GrantFiled: February 2, 1993Date of Patent: May 17, 1994Assignee: The Whitaker CorporationInventors: Keith L. Volz, Frederick R. Deak, Robert M. Renn, David C. Johnson, Robert D. Irlbeck
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Patent number: 5305179Abstract: A semiconductor device includes a semiconductor chip mounted in a resin package body. A plurality of interconnection leads are provided on the resin package body along a lower edge thereof and project outwardly from the lower edge. A heat dissipation lead is connected to the resin package body for dissipating heat generated by the semiconductor chip. The heat dissipation lead includes a plate of a heat conducting material having a stage part and a heat sink part, wherein the stage part is held inside the resin package body and supports the semiconductor chip thereon. The heat sink part projects outwardly from the resin package body and includes a part that extends in a downward direction.Type: GrantFiled: June 16, 1992Date of Patent: April 19, 1994Assignee: Fujitsu LimitedInventors: Michio Sono, Junichi Kasai, Kouji Saito, Kazuhiko Mitobe, Masanori Yoshimoto
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Patent number: 5299097Abstract: An electronic part mounting board and a semiconductor device which may be easily fabricated and have high reliability by preventing deterioration due to heat at the time of fabrication and the occurrence of internal stress. In the electronic part mounting board and the semiconductor device using such electronic part mounting device: a board fixing pin is provided on a lead frame which is provided to surround a circuit board and which has a plurality of leads, in a manner extended from the frame to be coupled to the circuit board to support the circuit board with respect to the frame; and the circuit board and the board fixing pin are coupled to each other by a fitting pin for connecting the two members. Since the circuit board and the lead frame are coupled, heating and caulking are not required. The thermal deterioration of the resin board to be used and internal stress due to heat between the board and the lead frame do not occur.Type: GrantFiled: March 31, 1993Date of Patent: March 29, 1994Assignee: Ibiden Co., Ltd.Inventors: Mitsuhiro Kondo, Katsumi Sagisaka