Abstract: A multi-chip module includes a chip stack package including at least one pair of stacked dies, the dies having overlapping opposing faces, and at least one capacitive proximity communication (CPC) interconnect between the pair of stacked dies. The CPC interconnect includes a first capacitor plate at a first one of the overlapping opposing faces and a second capacitor plate at a second one of the overlapping opposing faces spaced from and aligned with the first capacitor plate. The CPC interconnect further includes an inductive element connected in series with the first capacitor plate and second capacitor plate, wherein the capacitor plates form part of a capacitor and the capacitor cooperates with the inductor element to form a LC circuit having a resonant frequency.

Abstract: An electronic device includes a metal shield, a housing, a circuit board, an engaging element, and a fixing element. The circuit board is located between the metal shield and the housing. The engaging element is disposed on the circuit board. The circuit board is fixed on the housing and connected to the metal shield via the engaging element.

Abstract: An electrical device includes a first substrate and a second substrate which are disposed in an opposing manner so as to interpose a functional element, a first electrode (rear surface electrode) which is provided more to the first substrate side than the functional element, a second electrode which is provided on the second substrate and is electrically connected to the first electrode, and a functional element and an electronic component which drives the functional element in a region which is a region where the first substrate and the second substrate overlap and which is interposed between the first electrode and the second electrode.

Abstract: A module is configured for connection with a microelectronic assembly having terminals and a microelectronic element. The module includes a circuit panel bearing conductors configured to carry command and address information, co-support contacts coupled to the conductors, and module contacts coupled to the conductors. The co-support contacts include first contacts having address and command information assignments arranged in a first predetermined arrangement for connection with a first type of microelectronic assembly in which the microelectronic element is configured to sample command and address information coupled thereto through the first contacts at a first sampling rate, and in a second predetermined arrangement for connection with a second type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through a subset of the first contacts at a second sampling rate greater than the first sampling rate.

Abstract: Herein disclosed are an apparatus, a system and a method, selectively linking signals between or among slots on a backplane. A backplane printed circuit board has defined slots, each of which receives a card or module. One or more arrays of solder ball mounting pads correspond to signal lines of the slots. Each of one or more signal mapping overlay printed circuit boards has at least one signal trace connected to solder ball landing pads. Selected solder ball mounting pads of the backplane printed circuit board are connected to selected solder ball landing pads of the signal mapping overlay printed circuit board by solder balls. The signal trace or traces of the signal mapping overlay printed circuit board or boards connect the corresponding selected signal lines between or among the slots of the backplane. The backplane and signal mapping overlay printed circuit boards may have mirrored connection arrays.

Abstract: A touchscreen panel includes an upper substrate having a first transparent conductor layer provided on a first base layer, and a lower substrate having a second transparent conductor layer provided on a second base layer. The first and second transparent conductor layers oppose each other via a spacer and make contact when the first base layer is pressed. The first transparent conductor layer is segmented into a plurality of conductive regions that are electrically insulated from each other.

Abstract: An electronic device includes a substrate (1), an electronic component (2) seated on the substrate (1), and a cover (3) across the electronic component (2) with a space (330) between the cover (3) and the electronic component (2). The cover (3) is configured on an inside (32) facing the electronic component (2) in such fashion that the cover (3) has at least one support structure (4, 40) protruding into the space (330).

Abstract: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 ?m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.

Abstract: An image processing device includes a body that has a first connection portion and a second connection portion inside the body; an image processing board that is electrically connected to the first connection portion, the image processing board performing image processing; a functional board that is disposed so as to cover a part of the image processing board on one side of the image processing board; a side panel attached to the image processing board at a position opposite to the first connection portion, the side panel being a part of a side surface of the body; and an extension board disposed so as to cover another part of the image processing board on the same side as the functional board with respect to the image processing board, the extension board being electrically connected to the second connection portion and independently attachable to and removable from the image processing board.

Abstract: A motherboard for an electronic device comprising a main printed circuit board (PCB) with a through-hole extending between the upper component surface and the lower surface. The motherboard includes a carrier PCB having a top surface and a bottom surface, and at least one component, e.g. an optical device, sensor, or the like, coupled to the top surface. The carrier PCB is mounted in an in an inverted orientation with respect to the main PCB such that the top surface of the carrier PCB faces the upper component surface of the main PCB. The carrier PCB is aligned with the main PCB such that the component is substantially aligned with the through hole of the main PCB and is visible from the lower surface of the PCB.

Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.

Abstract: The instant disclosure provides a self-sealed stacked structure which includes a substrate unit, a first frame, a conductive unit and a blocker unit. The substrate unit includes a first and a second substrate, and a first frame sandwiched there-between. The conductive unit includes a plurality of first conductors and second conductors electrically connecting the first substrate, the first frame and the second substrate. The first and the second conductors are in electrical connection. A blocker unit including at least two first and at least two second blockers are surroundingly arranged around the plurality of first and second conductors, respectively. The first substrate and the first frame are connected in a sealed manner through the first blockers combined by the solder, where the first frame and the second substrate are connected in a sealed manner through the second blockers combined by the solder.

Abstract: The present invention provides a DC-DC power converter that comprises two or more Printed Wiring Boards (PWB) mounted parallel to one another and without encapsulation. Electronic components can be mounted on both sides of each board. The open design and parallel orientation of the PWBs allow airflow over components mounted on the PWBs. The PWBs are preferable made of FR-4 with copper foils, with one thicker board being comprised of more copper layers and the other boards comprised of less copper layers. In the preferred embodiment, the power processing elements are housed in the thicker PWB, while the thinner boards house the control circuitry.

Abstract: An MCM includes a two-dimensional array of facing chips, including island chips and bridge chips that communicate with each other using overlapping connectors. In order to maintain the relative vertical spacing of these connectors, compressible structures are in cavities in a substrate, which house the bridge chips, provide a compressive force on back surfaces of the bridge chips. These compressible structures include a compliant material with shape and volume compression. In this way, the MCM may ensure that facing surfaces of the island chips and the bridge chips, as well as connectors on these surfaces, are approximately coplanar without bending the bridge chips.

Abstract: Some embodiments include a device having a number of memory cells and associated circuitry for accessing the memory cells. The memory cells of the device may be formed in one or more memory cell dice. The associated circuitry of the device may also be formed in one or more dice, optionally separated from the memory cell dice.

Abstract: The present disclosure relates to the field of players, and provides a portable multimedia player includes a housing; an integrated circuit module received in the housing for playing multimedia; a storage device interface electrically connected to the integrated circuit module, and configured to connect to an external storage device; and a male HDMI connector electrically connected to the integrated circuit module, configured to be connected to a female HDMI of an external display device. The multimedia function of the external display device is expanded by connecting the male HDMI 11 to the female HDMI of the external display device. The portable multimedia player is connected to the display device without any corresponding interface cable, such that it affords convenient using to users and beautiful appearance.

Abstract: A printed circuit board unit usable with a computer device includes a main board on which a first component and a second component are mounted on an upper surface, and a routing unit mounted on at least one of the upper surface and a lower surface of the main board and including a sub-wire forming at least part of a wire to transmit a data between the first component and the second component.

Abstract: In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to uninterrupted TSVs. The interrupted TSVs provide signal paths other than common parallel paths between the ICs of the stack. This permits IC identification schemes and other functionalities to be implemented using TSVs, without requiring angular rotation of alternate ICs of the stack.

Abstract: A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.

Abstract: System and methods for improving connections to an information handling system are disclosed. An enhanced serial attached small computer system interface for an information handling system includes a receptacle which is connectable to an information handling system and a connector which is connectable to the receptacle. The connector comprises a first set of signal pins positioned on a first planar surface of the connector and a second set of signal pins positioned on a second planar surface of the connector. The second planar surface is not co-planar with the first planar surface. The connector further includes a third set of signal pins positioned on a third planar surface of the connector and the third planar surface is not co-planar with the first planar surface and the second planar surface.

Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.

Abstract: A portable external power-supplying device is disclosed. The portable external power-supplying device implements a unique mechanism to detachably assemble battery units whose number can be adjusted according to user needs, which means the overall aggregate capacity of the portable external power-supplying device is adjustable. The portable external power-supplying device is adaptive to connect and charge a portable electronic device.

Abstract: A circuit board assembly includes two external circuit boards, at least one electrical connector, at least one electronic component, and at least one hollow substrate. Each external circuit board includes an external electromagnetic shielding layer, a circuit layer and a dielectric layer. In each external circuit board, the dielectric layer is located between the external electromagnetic shielding layer and the circuit layer. The electrical connector is connected between the circuit layers located between the external electromagnetic shielding layers. The electronic component is disposed between the external circuit boards and connected with one of the circuit layers. The hollow substrate with plural openings is disposed between the external circuit boards. The electronic component and the electrical connector are located in the openings. Both a thickness of the electronic component and a height of the electrical connector are smaller than or equal to a thickness of the hollow substrate.

Abstract: A package substrate includes a main body having an upper surface and a lower surface opposite to the upper surface, a plurality of external terminals attached to the lower surface, and a plurality of grooves formed in regions of the lower surface to which the plurality of external terminals is not attached. The semiconductor package includes a package substrate, a semiconductor chip mounted on the upper surface of the semiconductor substrate, and a board providing a region mounted with the package substrate and being mounted with a plurality of mounting elements which are vertically aligned with the plurality of grooves and are inserted into the plurality of grooves.

Abstract: A semiconductor module system includes a substrate, at least one semiconductor chip, and a number of at least two electrically conductive first connecting elements. The substrate has a bottom side and a top side spaced apart from the bottom side in a vertical direction. The at least one semiconductor chip is arranged on the top side. Each one of the first connecting elements has a first end which protrudes away from an insulation carrier of the substrate in a direction perpendicular to the vertical direction. The semiconductor system further includes a connecting system with a number of N?1 connectors. A first one of the connectors includes at least two electrically conductive second connecting elements. Each one of the second connecting elements has a first end. The first end of each one of the first connecting elements is electrically conductively connectable to the first end of one of the second connecting elements.

Abstract: A method for assembling a portable computing device is disclosed. A number of operational components can be inserted into an extruded seamless housing through either a top or bottom opening in the housing. In some embodiments the housing can be radio frequency transparent so that the operational components disposed within the housing can send and receive wireless signals. The operational components can be aligned by internal rails disposed within the housing for positioning and supporting the operational components in an assembled position.

Abstract: According to one embodiment, an electronic apparatus includes a case, a main circuit board in the case, a connector on the main circuit board, an auxiliary circuit board includes one end portion connected to the connector and an extending portion extending outside the main circuit board, and a spring supporting mechanism between the case and the extending portion of the auxiliary circuit board. The spring supporting mechanism includes a spring portion configured to support the extending portion elastically deformable in a direction across a surface of the auxiliary circuit board, and is fixed to the extending portion to prevent the auxiliary circuit board from moving along the surface thereof.

Abstract: The present invention relates to, for example, printed circuit boards having a thin film battery or other electrochemical cell between or within its layer or layers. The present invention also relates to, for example, electrochemical cells within a layer stack of a printed circuit board.

Abstract: A system to mate logic nodes may include a connector to secure at least one of an inter-nodal circuit and a fabric bus, where the inter-nodal circuit provides communications between any connected logic nodes, and the fabric bus provides logical connections to a first logic node and any other logic node. The system may also include an element carried by the connector configured to provide an appropriate actuation force to mate the connector and at least one of the inter-nodal circuit and the fabric bus.

Abstract: The invention relates to a component arrangement with a first substrate and at least one second substrate arranged on the first substrate, wherein the first substrate has at least one first contact element and the at least one second substrate has at least one second contact element and the contact elements each has a contact surface connected such as to give an electrical contact and a protective layer connecting the first and second substrate together. During production the protective layer is structured such that a part surface of the first substrate and a part surface of the at least one second substrate are not covered, wherein the part surfaces include the contact surfaces of the at least one first and second contact elements and the contact generated between the contact surfaces is hence not contaminated by the protective layer. The contact surfaces are thus freely accessible without elements of the protective layer lying therebetween.

Abstract: An integrated circuit package system includes: providing a package substrate; mounting an interposer chip containing active circuitry over the package substrate; attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; connecting a stack connector to the interposer chip and the package substrate; and applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

Abstract: Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications in processor-based systems. More specifically, embodiments of the present invention include processor-based systems with volatile-memory having memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.

Abstract: A tiered integrated circuit (IC) assembly includes stacks of a limited number of ICs coupled to each other and arranged in a first direction across a base tier and a second tier. The base tier includes ICs and a data bridge. Each of the ICs includes a respective array of through silicon vias (TSVs) arranged in parallel with the first direction. The data bridge includes submicron metal interconnects (densely spaced electrical conductors) arranged in a plane that is substantially orthogonal to the first direction. The second tier is adjacent to the base tier and includes respective high-performance ICs different from the ICs of the base tier. The TSVs provide power and ground paths to the ICs in the second tier. In an example embodiment, the ICs in the second tier support one or more data bridges for connecting adjacent stacks.

Abstract: Decoupling capacitor circuit assembly is described. In one example, a circuit assembly includes a passive substrate, a plurality of terminals, and at least one capacitor. The passive substrate includes a top surface and a bottom surface. The plurality of terminals is formed on the top surface and is configured for electrical communication with a respective plurality of lands on a printed circuit board (PCB). The at least one capacitor is mounted to the bottom surface of the passive substrate and is configured to provide decoupling capacitance for an integrated circuit (IC) on the PCB. Each capacitor is coupled to a pair of the plurality of terminals. In another example, a circuit assembly includes a PCB, and IC mounted to the PCB, a passive substrate mounted to the PCB, and at least one capacitor mounted to the passive substrate for providing decoupling capacitance for the IC.

Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

Abstract: Some embodiments include a device having a number of memory cells and associated circuitry for accessing the memory cells. The memory cells of the device may be formed in one or more memory cell dice. The associated circuitry of the device may also be formed in one or more dice, optionally separated from the memory cell dice.

Abstract: A downhole tool string component has a through-bore intermediate first and second tool joints adapted for connection to adjacent tool string components. An instrumentation package is disposed within an outer diameter of the component. The instrumentation package comprises a circuit board assembly. The circuit board assembly comprises alternating rigid and elastomeric layers. The rigid layers are in electrical communication with each other.

Abstract: A memory support structure includes a base for physically and electrically connecting to a substrate. When so connected, the memory support structure extends orthogonal to the substrate to a height of at least 2.5 cm. The memory support structure provides at least three sockets for receiving and engaging memory modules so that they extend parallel to the substrate. The memory support structure also includes electrical pathways for electrically connecting the sockets and the base so that a memory module inserted into one of said sockets is electrically connected to the substrate.

Abstract: Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surface when the component is mounted. Two such components can be mounted side-by-side on the substrate surface with the above-mentioned contacts close to one another between the above-mentioned side surfaces. An electrical connection between the contacts can be made (or perfected) by depositing an electrically conductive connector material in contact with both of the contacts between the above-mentioned side surfaces.

Abstract: An electronic device includes a main frame structure, a plurality of functional modules fixed to the main frame structure, a plurality of cables connecting the functional modules, a cable collector board fixed to the main frame structure, and a motherboard detachably connected to the main frame structure. The cable collector board includes a plurality of first printed circuits electrically collecting the cables, and a first connector electrically collecting the first printed circuits. The motherboard includes a plurality of second printed circuits and a second connector collecting the second printed circuits. The second connector is detachably electrically connected to the first connector.

Abstract: The present invention relates to a fixing structure of a raulti-layer printed circuit board, and more particularly, to a fixing structure of a multi-layer printed circuit board, which has a simple structure and a high fixing force using a printed circuit board fixing portion having slots.

Abstract: A backplane arrangement is provided for an electronic mounting rack with a base backplane with several contact strips, wherein a free space, into which at least one additional backplane can be inserted, is provided on the base backplane.

Abstract: Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.

Abstract: A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes stacked semiconductor die. In accordance with embodiments, the semiconductor component includes a substrate having a component receiving area and a plurality of bond pads. A semiconductor chip is attached to the component receiving area. An electrical connector is coupled to the semiconductor chip and the substrate. A second semiconductor chip is mounted or attached to one of the ends of the electrical connector such that this end is positioned between the semiconductor chips. A second electrical connector is coupled between the second semiconductor chip and the substrate. A third semiconductor chip is mounted over or attached to the second electrical connector such that a portion is between the second and third semiconductor chips.

Abstract: An upper board having an opening and forming a circuit on a surface layer, a connection sheet between boards having an opening and forming conductive holes filled with conductive paste in through-holes, and a lower board forming a circuit on a surface layer are stacked up, heated and pressed. In particular, the connection sheet between boards is made of a material different from the upper board and the lower board. A multi-layer circuit board having a cavity structure, and a full-layer IVH structure with high interlayer connection reliability can be manufactured.

Abstract: A wiring structure of a head suspension including a flexure that supports a head and is attached to a load beam applying load onto the head, comprises write wiring and read wiring formed on the flexure and connected to the head, each having wires of opposite polarities. The wiring structure further comprises a stacked interleaved part includes segments electrically connected to the respective wires of the write wiring, the segments stacked on and facing the wires through an electrical insulating layer so that the facing wire and segment have opposite polarities.

Abstract: A motherboard assembly includes a motherboard having an expansion slot and a storage device interface, and a serial advanced technology attachment dual in-line memory module (SATA DIMM) with a circuit board. A control chip and a storage chip are arranged on the circuit board. Two voids are defined in a top side of the circuit board. A first extending board is formed on the top side of the circuit board between the voids. An edge connector is arranged on the first extending board and connected to a power supply. The edge connector includes power pins connected to the control chip and the storage chip. A second extending board is extended from an end edge of the circuit board and includes a connector connected to the storage device interface of the motherboard. A bottom side of the second extending board is in alignment with a bottom side of the circuit board.

Abstract: A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board.

Abstract: An arrangement includes an optoelectronic component with two contacts; at least one further component part; at least one contact arranged between the optoelectronic component and the further component part; and at least one web arranged between the optoelectronic component and the further component part.

Abstract: In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to uninterrupted TSVs. The interrupted TSVs provide signal paths other than common parallel paths between the ICs of the stack. This permits IC identification schemes and other functionalities to be implemented using TSVs, without requiring angular rotation of alternate ICs of the stack.