Stacked Patents (Class 361/790)
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Patent number: 7738258Abstract: A semiconductor mounting board 80 is prepared by electrically joining an IC chip 70 via an interposer 60 of high rigidity to external pads 41 and internal pads 43, which are formed on the uppermost surface of a build-up layer 30. When the IC chip 70 generates heat, since pads 41 are positioned away from the center, a large shearing stress is applied to the portions at which pads 41 are joined to the interposer 60 in comparison to the portions at which pads 43 are joined to the interposer 60. Here, pads 41 are formed at substantially flat wiring portions and thus when joined to the interposer 60 by means of solder bumps 51, voids and angled portions, at which stress tends to concentrate, are not formed in the interiors of solder bumps 51. The joining reliability is thus high.Type: GrantFiled: March 29, 2006Date of Patent: June 15, 2010Assignee: Ibiden Co., Ltd.Inventors: Masaki Ohno, Masanori Tamaki
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Patent number: 7737552Abstract: A device and a method for bonding elements are described. A first solder ball is produced on a main surface of a first element. A second solder ball is produced on a main surface of a second element. Contact is provided between the first solder ball and the second solder ball. The first and second elements are bonded by applying a reflow act whereby the solder balls melt and form a joined solder ball structure. Prior to the bonding, the first solder ball is laterally embedded in a first layer of non-conductive material and the second solder ball is laterally embedded in a second layer of non-conductive material, such that the upper part of the first solder ball and upper part of the second solder ball are not covered by the non-conductive material. A third solder volume is applied on one or both of the embedded first or second solder balls, prior to the bonding.Type: GrantFiled: May 23, 2008Date of Patent: June 15, 2010Assignee: IMECInventor: Eric Beyne
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Patent number: 7733654Abstract: A heat dissipation module is used to cool a microprocessor. The heat dissipation module includes a base, a diversion pipeline, a plurality of heat conductive pieces and a fan. The base is assembled on the microprocessor. The diversion pipeline is connected to the base, provides a diversion direction, and has a heat insulated pipe-wall which partitions the diversion pipeline into an inside and an outside portions and reduces the heat conduction in the diversion direction of the diversion pipeline. The heat conductive pieces are fixed on the diversion pipeline, and have a heat dissipation direction from the inside portion to the outside portion of the diversion pipeline which crosses the diversion direction. Each two neighboring heat conductive pieces are separated with the heat insulated pipe-wall. The fan is assembled on the outside of the diversion pipeline and provides a cool air for the heat conductive pieces.Type: GrantFiled: August 29, 2008Date of Patent: June 8, 2010Assignee: Coretronic CorporationInventors: Cheng Wang, Shang-Hsuang Wu
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Multi-layer substrate having conductive pattern and resin film and method for manufacturing the same
Patent number: 7733665Abstract: A multi-layer substrate connecting to an external electric device includes: a plurality of resin films; and a plurality of conductive patterns. The resin films are stacked together with the conductive patterns. The conductive pattern includes an inner conductive pattern and a surface conductive pattern. The inner conductive pattern is disposed inside of the multi-layer substrate for providing an inner circuit. The surface conductive pattern is exposed on the multi-layer substrate for connecting to the external electric device. The surface conductive pattern has a thickness in a stacking direction, which is thicker than a thickness of the inner conductive pattern.Type: GrantFiled: May 11, 2006Date of Patent: June 8, 2010Assignee: DENSO CORPORATIONInventors: Toshikazu Harada, Kouji Kondo -
Patent number: 7729121Abstract: In some embodiments, a stacked package assembly may include a first socket defining an interior cavity, a first semiconductor device coupled to the first socket, a second socket positioned within the interior cavity of the first socket, and a second semiconductor device removably coupled to the second socket within the cavity of the first socket. The second socket may be positioned between the first semiconductor device and the second semiconductor device and provide an electrical connection between the first semiconductor device and the second semiconductor device. Other embodiments are disclosed and claimed.Type: GrantFiled: December 30, 2008Date of Patent: June 1, 2010Assignee: Intel CorporationInventors: Anand Deshpande, Venkat Natarajan, Ashok Kabadi, Vittal Kini
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Patent number: 7724532Abstract: A handheld computing device is disclosed. The handheld computing device includes an enclosure having structural walls formed from a ceramic material that is radio-transparent.Type: GrantFiled: August 7, 2006Date of Patent: May 25, 2010Assignee: Apple Inc.Inventors: Stephen Paul Zadesky, Stephen Brian Lynch
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Patent number: 7715201Abstract: A housing or a frame-like holding element for, in particular, electronic or electrical components, including a frame that surrounds an opening, a holding fixture that, while extending in a longitudinal direction, is formed in the front side of at least one profile. An inscribed strip is placed inside the holding fixture and supports a holding strip that forms a viewing surface on the front side. This invention provides a holding element that can be easily assembled while having a visually appealing layout of the inscribed strip. This invention provides frame limbs forming the frame in the form of frame profiles, of which the holding fixture for the inscribed strip is formed on at least one, and the holding strip, on a rear side facing away from the viewing side, has two longitudinally extending resilient detent webs which are parallel to one another and which have detent elements that engage in a locking manner within detent mating elements formed on the holding fixture.Type: GrantFiled: September 9, 2005Date of Patent: May 11, 2010Assignee: Rittal GmbH & Co. KGInventors: Horst Besserer, Martin Lang
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Patent number: 7706148Abstract: A stack structure of circuit boards embedded with semiconductor chips is proposed. At least two circuit boards are provided. Each of the circuit boards includes circuit layers formed on surfaces thereof and at least one opening embedded with a semiconductor chip, wherein, the circuit layers have a plurality of conductive structures and electrically conductive pads, and the semiconductor chip has a plurality of electrode pads, and the conductive structures of the circuit layers are electrically conductive to the electrode pads of the semiconductor chip. At least one adhesive layer is formed between the two circuit boards and disposed with a conductive material corresponding in position to the electrically conductive pads of the circuit boards. Thus, a conductive path can be formed by the conductive material between the electrically conductive pads of the circuit boards, thereby establishing electrical connection between the two circuit boards.Type: GrantFiled: October 27, 2006Date of Patent: April 27, 2010Assignee: Phoenix Precision Technology CorporationInventors: Shih Ping Hsu, Chung Cheng Lien, Chia Wei Chang
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Patent number: 7701725Abstract: A computer system includes a chassis (10) having a bottom plate (12), a drive bracket (20) for securing at least one data storage device therein, a motherboard (40), and a riser card (30). The drive bracket is secured in the chassis above the bottom plate, and has a sidewall (203) perpendicular to the bottom plate of the chassis. The motherboard is secured on the bottom plate of the chassis forming a socket (41) thereon. The riser card electrically engages in the socket of the motherboard, and is secured on the sidewall of the drive bracket.Type: GrantFiled: July 16, 2007Date of Patent: April 20, 2010Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Chen-Lu Fan, Yi-Lung Chou, Li-Ping Chen, Yu-Feng Hung
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Patent number: 7692931Abstract: Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods are disclosed. A system in accordance with one embodiment includes a support member having first package bond sites electrically coupled to leadframe bond sites. A microelectronic die can be carried by the support member and electrically coupled to the first packaged bond sites. A leadframe can be attached to the leadframe bond sites so as to extend adjacent to the microelectronic die, with the die positioned between the leadframe and the support member. The leadframe can include second package bond sites facing away from the first package bond sites. An encapsulant can at least partially surround the leadframe and the microelectronic die, with the first and second package bond sites accessible from outside the encapsulant.Type: GrantFiled: August 23, 2006Date of Patent: April 6, 2010Assignee: Micron Technology, Inc.Inventors: Chin Hui Chong, Choon Kuan Lee, David J. Corisis
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Patent number: 7692279Abstract: A multipackage module has multiple die of various types and having various functions and, in some embodiments, the module includes a digital processor, an analog device, and memory. A first die, having a comparatively large footprint, is mounted onto first die attach region on a surface of a first package substrate. A second die, having a significantly smaller footprint, is mounted upon the surface of the first die, on a second die attach region toward one edge of the first die. The first die is electrically connected by wire bonds to conductive traces in the die-attach side of the substrate. The second die is electrically connected by wire bonds to the first package substrate, and may additionally be electrically connected by wire bonds to the first die.Type: GrantFiled: July 2, 2007Date of Patent: April 6, 2010Assignee: Chippac, Inc.Inventors: Marcos Karnezos, Flynn Carson, Youngcheol Kim
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Patent number: 7687315Abstract: An integrated circuit package system including providing a base substrate, attaching a base integrated circuit on the base substrate, attaching a core substrate over the base integrated circuit, attaching a substrate electrical connector between the core substrate and the base substrate, and applying an encapsulant having the core substrate partially exposed over the base integrated circuit.Type: GrantFiled: March 10, 2008Date of Patent: March 30, 2010Assignee: STATS ChipPAC Ltd.Inventor: Flynn Carson
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Patent number: 7681309Abstract: A method is disclosed that can be used to interconnect an integrated circuit (IC) multiple die assembly to conductors on a substrate such that signals can be conveyed between the dies and the conductors on the substrate. The multiple die assembly can include a first IC die and at least one secondary IC die, which can be mounted on a surface of the first IC die. Signal paths can be provided between the first IC die and the secondary IC die. The method can include providing conductive contacts on the surface of the first IC die. Each such conductive contact can have a free end extending outward from the surface beyond the secondary IC die. The method can also include mounting the multiple die assembly on the substrate such that the free end of each contact is brought into contact with the conductors on the substrate. The secondary IC die can reside between the surface of the first IC die and the substrate, and the contacts can convey signals between the first IC die and the conductors on the substrate.Type: GrantFiled: March 25, 2005Date of Patent: March 23, 2010Assignee: FormFactor, Inc.Inventor: Charles A. Miller
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Patent number: 7667981Abstract: A composite sandwich structure carrying an externally applied structural load and having embedded electronics, that in one embodiment includes two multilayered composite facesheet laminates, a central core, embedded electronic components within the central core region, embedded electrical conductors within the central core region, and two multilayer printed circuit laminates that are secondarily bonded or cured to the inner surface of the sandwich facesheet laminates. The electronic components and electrical conductors, which are located in the central core region of the sandwich element, are attached to one or both of the two circuit laminates.Type: GrantFiled: March 21, 2008Date of Patent: February 23, 2010Inventor: Barton E. Bennett
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Patent number: 7663886Abstract: An electronic circuit device includes a lower-side substrate formed with a main circuit; an upper-side substrate formed with a drive control circuit that drivingly controls the main circuit; a support body positionally fixed above the lower-side substrate with resin in a hardened state; and a case having a peripheral portion with an outer surface that has at least a portion of an external lead-out terminal of the drive control circuit and the main circuit thereon, and a substrate storage space that accommodates the lower-side substrate on a side inward from the peripheral portion.Type: GrantFiled: December 19, 2007Date of Patent: February 16, 2010Assignees: Aisin AW Co., Ltd., Fuji Electric Device Technology Co., Ltd.Inventors: Kazuo Aoki, Junji Tsuruoka, Seiji Yasui, Yasushi Kabata, Shin Soyano
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Patent number: 7660560Abstract: A battery cover latching assembly (50) for a portable electronic device (100) includes a housing (20), a first cover (10) configured for attaching to a first side of the housing, and a second cover (30) configured for attaching to a second side of the housing. The battery cover latching assembly includes a locking portion (131), a latch (342), and a button (40). The locking portion is formed on the first cover. The latch is formed on the second cover, the latch is engageable with the locking portion so as to lock the first cover and second cover with each other. The button is configured so as to be retained by the housing, the button is operable to deform the latch so as to unlock the first cover and the second cover.Type: GrantFiled: March 16, 2006Date of Patent: February 9, 2010Assignees: Shenzhen Futaihong Precision Industry Co., Ltd., FIH (Hong Kong) LimitedInventors: Zhou-Quan Zuo, Chia-Hua Chen
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Patent number: 7655504Abstract: Two semiconductor substrates are first bonded together by means of a metal bump, while respective one-side surfaces on which device patterns are formed are faced each other, and a resin is then filled into a gap between the respective one-side surfaces and thereafter each of the semiconductor substrates is polished and thinned to a prescribed thickness. Furthermore, a via hole and an insulating film are formed; part of a portion in contact with the metal bump, of the insulating film, is opened; the inside of the via hole is filled with a conductor; and an electrode pad is formed on the conductor, to thereby form structures. Finally, a required number of structures are electrically connected with each other through the electrode pad and stacked to thereby obtain a semiconductor device.Type: GrantFiled: May 16, 2008Date of Patent: February 2, 2010Assignee: Shinko Electric Industries Co., Ltd.Inventor: Naohiro Mashino
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Patent number: 7656680Abstract: A receiving apparatus according to the present invention comprises: a first board including a mount surface whose outer edge is substantially quadrilateral; and a board installation member including a plate portion that has an installation surface whose outer edge is substantially quadrilateral, the first board is installed on the installation surface (called a front surface) side and the surface (called a rear surface) of the rear side of the installation surface is installed on a given second board, the apparatus applies a predetermined processing to a received broadcast signal using a circuit disposed on the first board, and the board installation member includes a connecting terminal to electrically connect the first board with the second board and a leg portion used for the installation on the second board, the connecting terminal protrudes from the plate portion in the direction substantially perpendicular to the plate portion on the front surface side and on the rear surface side, and comes into contacType: GrantFiled: October 29, 2008Date of Patent: February 2, 2010Assignee: Sharp Kabushiki KaishaInventor: Tsutomu Jitsuhara
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Patent number: 7656678Abstract: The present invention stacks integrated circuit packages into circuit modules. In a preferred embodiment, solder paste and primary adhesive respectively are applied to selected locations on the flex circuitry. Supplemental adhesive is applied to additional locations on the flex circuitry, CSP, or other component. The flex circuitry and the CSP are brought into proximity with each other. During solder reflow operation, a force is applied and the CSP collapses toward the flex circuitry, displacing the primary adhesive and the supplemental adhesive. The supplemental adhesive establishes a bond providing additional support to the flex circuitry. In another embodiment, CSPs or other integrated circuit packages are bonded to each other or to other components with a combination of adhesives. A rapid bond adhesive maintains alignment of the bonded packages and/or components during assembly, and a structural bond adhesive provides additional strength and/or structural integrity to the bond.Type: GrantFiled: October 31, 2005Date of Patent: February 2, 2010Assignee: Entorian Technologies, LPInventors: Julian Partridge, James Douglas Wehrly, Jr., David L. Roper, Joseph Villani
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Patent number: 7656671Abstract: An expansion module includes a housing, at least one first wedging device, a connecting device, and a module socket. At one side of the housing, there is at least one plugging pin. The first wedging device is located in the housing. The first wedging device corresponds to the plugging pin. The connecting device has a first connecting portion and a second connecting portion. The first connecting portion is electrically connected with the second connecting portion, and the first connecting portion and the second connecting portion are located at the two opposite sides of the housing. The module socket is located in the housing. The module socket is electrically connected with the connecting device. The user can easily uninstalled or installed the expansion module, the time is reduced, and it prevents the plugging pins of the module card from being damaged due to external force.Type: GrantFiled: November 29, 2007Date of Patent: February 2, 2010Assignee: Axiomtek Co., Ltd.Inventors: Kuo-Hsien Liu, Lung-Ching Lu, Chih-Hua Lin, Lung-Chi Lu
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Patent number: 7649740Abstract: In a stacked mounting structure At least a pair of a first connecting terminal and a second connecting terminal is formed, and further, the stacked mounting structure includes a protruding electrode which is provided on at least any one of the first connecting terminal and the second connecting terminal, and an electroconductive paste which is formed on a side surface of an intermediate substrate, and which electrically connects the first connecting terminal and the second connecting terminal. The first connecting terminal and the second connecting terminal are exposed by a recess in a surface of the intermediate substrate. The first connecting terminal and the second connecting terminal are electrically connected via the protruding electrode and the electroconductive paste in the recess which is provided in the intermediate substrate.Type: GrantFiled: January 16, 2008Date of Patent: January 19, 2010Assignee: Olympus CorporationInventor: Takanori Sekido
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Patent number: 7636796Abstract: A smart interconnect for modular multi-component embedded devices is described. In an embodiment of a smart interconnect for modular multi-component embedded devices, a desired functionality of a stack of hardware boards is accessed. For example, a user may select a new functionality for the stack of hardware boards. The desired functionality is then transmitted to a board in the stack of hardware boards and the board is configured to implement the desired functionality of the stack of hardware boards.Type: GrantFiled: February 16, 2007Date of Patent: December 22, 2009Assignee: Microsoft CorporationInventors: Feng Zhao, Nissanka B. Priyantha, Dimitrios Lymperopoulos
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Patent number: 7619900Abstract: A dual-board case for multi-mainboard system includes a rectangular-sectioned tubular housing, in which two track sets are provided; and two mainboard trays being movably mounted on the two track sets to locate at an interior of two opposite lateral walls of the tubular housing. Each of the two mainboard trays has a loading surface, on which a mainboard is mounted; and the two mainboard trays are mounted on the track sets with their loading surfaces and accordingly, the two mainboards mounted thereon facing toward each other. Therefore, the dual-board case allows a multi-mainboard system to have optimal spatial arrangement to achieve best heat-dissipation efficiency and largely reduce noises.Type: GrantFiled: January 25, 2007Date of Patent: November 17, 2009Assignee: Mitac International Corp.Inventors: John McClure, Chun-Hung Lee
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Patent number: 7606044Abstract: The teachings of the present disclosure provide a housing for a modular component of an information handling system. The housing may include a wall member generally defining a first plane, one or more holes formed in the wall member, and one or more structural support members adjacent to the one or more holes. The one or more structural supports may extend from the first plane defined by the wall member to resist deformation of the wall member in at least one direction.Type: GrantFiled: June 6, 2007Date of Patent: October 20, 2009Assignee: Dell Products L.P.Inventors: Edmond Ira Bailey, Laurent Andrew Regimbal
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Patent number: 7606959Abstract: A multiprocessor system is provided, comprising a baseboard, for arranging peripheral equipments; and a plurality of processor modules, each equipped with a processor and a board-to-board connector; wherein the plurality of processor modules are stacked up, with board-to-board connectors being electrically connected between the processor modules and between the processor modules and the baseboard; the processors communicate with the peripheral equipments in accordance with a specific bus specification; and the operations of the plurality of processor modules are coordinated by routes provided between the processor modules and between the processor modules and the baseboard.Type: GrantFiled: November 27, 2006Date of Patent: October 20, 2009Assignee: Shenzhen Mindray Bio-Medical Electronics Co., Ltd.Inventors: Li Yao, Wei Chen
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Patent number: 7602630Abstract: Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.Type: GrantFiled: February 14, 2008Date of Patent: October 13, 2009Assignee: Micron Technology, Inc.Inventor: Jeffery W Janzen
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Patent number: 7602618Abstract: Apparatuses for transferring heat from stacked microfeature devices are disclosed herein. In one embodiment, a microfeature device assembly comprises a support member having terminals and a first microelectronic die having first external contacts carried by the support member. The first external contacts are operatively coupled to the terminals on the support member. The assembly also includes a second microelectronic die having integrated circuitry and second external contacts electrically coupled to the first external contacts. The first die is between the support member and the second die. The assembly can further include a heat transfer unit between the first die and the second die. The heat transfer unit includes a first heat transfer portion, a second heat transfer portion, and a gap between the first and second heat transfer portions such that the first external contacts and the second external contacts are aligned with the gap.Type: GrantFiled: August 25, 2005Date of Patent: October 13, 2009Assignee: Micron Technology, Inc.Inventors: Salman Akram, David R. Hembree
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Patent number: 7589409Abstract: A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.Type: GrantFiled: February 26, 2007Date of Patent: September 15, 2009Assignee: Tessera, Inc.Inventors: David Gibson, Andy Stavros
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Patent number: 7586747Abstract: A method for building scalable electronic subsystems is described. Stackable modules employ copper substrates with solder connections between modules, and a ball grid array interface is provided at the bottom of the stack. A cooling channel is optionally provided between each pair of modules. Each module is re-workable because all integrated circuit attachments within the module employ re-workable flip chip connectors. Also, defective modules can be removed from the stack by directing hot inert gas at externally accessible solder connections.Type: GrantFiled: July 27, 2006Date of Patent: September 8, 2009Assignee: Salmon Technologies, LLC.Inventor: Peter C. Salmon
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Patent number: 7583518Abstract: An information processing device is disclosed that is able to prevent displacement of an extension board caused by vibration or shock, and able to prevent deformation of the extension board and members nearby. The information processing device includes a substrate with a CPU (Central Processing Unit) mounted thereon, a housing that accommodates the substrate, an extension board arranged to be parallel to the substrate, and a supporting member that is fixed on the housing and is arranged to be parallel to at least one end surface of the substrate so that the supporting member supports the extension board.Type: GrantFiled: January 16, 2007Date of Patent: September 1, 2009Assignee: Ricoh Company, Ltd.Inventor: Hayato Watanabe
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Publication number: 20090207577Abstract: A modular patch panel module is mountable on an electronics enclosure and includes an angled patch face and mounting structure that enables stacking of modular patch panels without interference of patch panel cords with the top of the enclosure or another patch panel stacked thereon. The patch panel modules may each contain a plurality of RJ-45 ports and punchdown blocks. A cover plate may snap fit to the module to retain the patch panel electrical components therebetween.Type: ApplicationFiled: February 15, 2008Publication date: August 20, 2009Applicant: PANDUIT CORP.Inventors: Robert E. Fransen, Jason O'Young, Jeremy S. Parrish, Edward G. Blomquist
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Patent number: 7573723Abstract: Polyimide is used as a spacer that also bonds together the elements that it is spacing apart. This is achieved by constructing the spacer on at least one of the wafers as is conventionally done, except that prior to performing the final curing of the polyimide precursor to form the final polyimide, the elements are aligned in a bonder and placed in contact with a pressure of 40 grams per square millimeter at a temperature slightly higher than the soft-bake temperature, as specified by the manufacturer of the polyimide precursor, for few minutes to promote tackiness. This holds the elements together, and the combined structure is then baked to fully cure the polyimide precursor into polyimide and complete the bonding.Type: GrantFiled: February 21, 2003Date of Patent: August 11, 2009Assignee: Alcatel-Lucent USA Inc.Inventors: Victor Alexander Lifton, Victor Manuel Lubecke, Flavio Pardo
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Patent number: 7566960Abstract: A capacitive interposer (caposer) is disposed inside an integrated circuit package between a die and an inside surface of the package. Conductive layers within the caposer constitute a bypass capacitor. In a through-hole caposer, micro-bumps on the die pass through through-holes in the caposer and contact corresponding landing pads on the package. As they pass through the caposer, power and ground micro-bumps make contact with the plates of the bypass capacitor. In a via caposer, power and ground micro-bumps on the die are coupled to power and ground landing pads on the package as well as to the plates of the bypass capacitor by power and ground vias that extend through the caposer. In signal redistribution caposer, conductors within the caposer redistribute signals between die micro-bumps and package landing pads. In an impedance matching caposer, termination structures within the caposer provide impedance matching to a printed circuit board trace.Type: GrantFiled: October 31, 2003Date of Patent: July 28, 2009Assignee: Xilinx, Inc.Inventor: Robert O. Conn
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Publication number: 20090175016Abstract: Clip for attaching two outer panels to an intermediate panel, the clip comprising two arm portions each arm portion being configured to apply pressure to one of the outer panels in order to force the panel against a surface of the intermediate panel, and a bridge portion connecting the two arm portions, the bridge portion comprising a central section configured to provide mechanical coupling to the intermediate panel.Type: ApplicationFiled: January 4, 2008Publication date: July 9, 2009Applicant: Qimonda AGInventors: Anton Legen, Steve Wood
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Publication number: 20090168383Abstract: An electronic apparatus has a first circuit board and a second circuit board. The first circuit board has a first connector mounted thereto. The second circuit board has a second connector which is mounted to a first surface and is mechanically coupled to the first connector, and a third connector which is mounted to a second surface positioned on a backside of the first surface in an overlapping relation to the second connector with the second circuit board interposed between the second and third connectors, and which is mechanically coupled to a connector of an external device.Type: ApplicationFiled: December 17, 2008Publication date: July 2, 2009Applicant: FUJITSU LIMITEDInventors: Katsuichi GOTO, Eiji Takizawa
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Publication number: 20090151156Abstract: A method of manufacturing a circuit board assembly for a controller. The method includes providing first and second printed circuit boards wherein the first printed circuit board has a plurality of copper pads containing slots therein that correspond to a plurality of power tabs in the second printed circuit board. The power tabs are then slid into the slots and the tabs are flooded with copper. At this time the power tabs are soldered within the slots to provide an electrical connection between the first and second printed circuit boards that allows for the transfer of current between the boards of more than three amps.Type: ApplicationFiled: December 12, 2007Publication date: June 18, 2009Applicant: SAUER-DANFOSS INC.Inventors: Xiao YAN, Thomas J. BERGHERR
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Patent number: 7542299Abstract: A computer peripherals switch having a switching circuit contained within a body; a first computer cable electrically coupled to the switching circuit and integrally attached to the body; a second computer cable electrically coupled to the switching circuit and integrally attached to the body; a plurality of computer peripheral ports electrically coupled to the switching circuit and disposed on the body; wherein the first computer cable has a plurality of first computer connectors, each of which is matched to at least one of the ports in the plurality of computer peripheral ports, and wherein the switching circuit is configured to selectively couple the plurality of first computer connectors to the plurality of computer peripheral ports.Type: GrantFiled: December 22, 2005Date of Patent: June 2, 2009Assignee: Aten International Co., LtdInventor: Kevin Chen
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Patent number: 7539021Abstract: A retention device is applied in an electronic device that has a case and a circuit board. The circuit board may shifts along a integrate direction or a release direction. The retention device includes a fastener, a latching member, and a releasing member. The fastener is movably disposed on the case and has a stopping portion. The latching member is disposed on one side of the circuit board. The releasing member is movably disposed on the case and is located on one side of the fastener, and pushes the fastener to shift. The latching member shifts along the integrate direction with the circuit board, pushes the fastener to shift, and is blocked by the stopped portion. When the fastener is pushed by the releasing member to shift, the latching member is separated along the release direction, such that the circuit board is fixed on or detached from the case.Type: GrantFiled: October 16, 2007Date of Patent: May 26, 2009Assignee: Inventec CorporationInventor: Ying-Chao Peng
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Patent number: 7534966Abstract: A printed circuit board (PCB) edge connection structure formed by a first PCB having one or more electronic components and printed circuitry provided thereon and a second PCB, having one or more edge contact pads provided thereon, attached to the first PCB and covering an area on the first PCB into which a portion of the printed circuitry extends. The resulting structure maximizes the utilization of the surface area on the first PCB for printed circuitry, thus, reducing the overall size of the end product.Type: GrantFiled: June 12, 2007Date of Patent: May 19, 2009Assignee: Clear Electronics, Inc.Inventor: Seong Bean Cho
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Patent number: 7532480Abstract: Embodiments of methods, apparatuses, devices, and/or systems for power delivery for electronic assemblies are disclosed.Type: GrantFiled: December 14, 2006Date of Patent: May 12, 2009Assignee: nVidia CorporationInventor: Ludger Mimberg
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Patent number: 7531897Abstract: A process for connecting two bodies forming parts of an electromechanical, fluid and optical microsystem, wherein a welding region is formed on a first body; an electrically conductive region and a spacing region are formed on a second body; the spacing region extends near the electrically conductive region and has a second height smaller than said first height. One of the first and second bodies is turned upside down on the other, and the two bodies are welded together by causing the electrically conductive region to melt so that it adheres to the welding region and collapses until its height becomes equal to that of the spacing region. Thereby it is possible to seal active parts or micromechanical structures with respect to the outside world, self-align the two bodies during bonding, obtain an electrical connection between the two bodies, and optically align two optical structures formed on the two bodies.Type: GrantFiled: January 29, 2002Date of Patent: May 12, 2009Assignee: STMicroelectronics S.r.l.Inventor: Ubaldo Mastromatteo
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Patent number: 7531754Abstract: A flexible substrate comprises a film, a first insulating resin layer on a front face of the film, a second insulating resin layer on a rear face of the film, a front-sided wiring pattern embedded in the first insulating resin layer, and a rear-sided wiring pattern embedded in the second insulating resin layer. A surface of the front-sided wiring pattern is flush with a surface of the first insulating resin layer, and a surface of the rear-sided wiring pattern is flush with a surface of the second insulating resin layer. A part of at least one of the front-sided wiring pattern and the rear-sided wiring pattern is dented toward a part of the other of the at least one of the front-sided wiring pattern and the rear-sided wiring pattern such that a portion of the front-sided wiring pattern and a portion of the rear-sided wiring pattern are jointed to each other to form a junction.Type: GrantFiled: March 2, 2007Date of Patent: May 12, 2009Assignee: Panasonic CorporationInventors: Yoshihisa Yamashita, Hiroki Yabe, Takashi Ichiryu, Seiichi Nakatani, Satoru Tomekawa, Toshio Fujii, Seiji Karashima
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Patent number: 7529093Abstract: A first insulating layer is formed on the front surface of a circuit board, and a second insulating layer on the back surface. A conductive pattern is formed on the surface of the first insulating layer. Circuit elements are connected to the conductive pattern. Sealing resin covers the front and side surfaces of the circuit board. Furthermore, the sealing resin also covers the edge region of the back surface of the circuit board. Thus, it is ensured that the circuit board has a dielectric strength while exposing the back surface of the circuit board to the outside.Type: GrantFiled: November 28, 2005Date of Patent: May 5, 2009Assignee: Sanyo Electric Co., Ltd.Inventor: Noriaki Sakamoto
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Patent number: 7530043Abstract: A printed circuit board includes a first layer including a first power portion and a first ground portion isolated from each other, and a second layer including a second power portion and a second ground portion isolated from each other. The second layer is spaced from the first layer. The second ground portion is arranged below the first power portion. The second power portion is arranged below the first ground portion. One portion of the first power portion overlaps one portion of the second power portion, and one portion of the first ground portion overlaps one portion of the second ground portion to provide a zero-intensity electric field between the first layer and the second layer. The first power portion is coupled to the second power portion via a first via. The first ground portion is coupled to the second ground portion via a second via.Type: GrantFiled: November 25, 2006Date of Patent: May 5, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Shou-Kuo Hsu, Cheng-Hong Liu
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Patent number: 7525816Abstract: The present invention provides a wiring board including a first board provided with a first wiring pattern and a second board provided with a second wiring pattern while the first wiring pattern and the second wiring pattern are electrically connected, wherein the first board includes: a board insertion opening in which the second board is inserted; and a first connection pattern provided inside the board insertion opening and electrically connected to the first wiring pattern, and the second board includes: an inserting portion to be inserted into the board insertion opening of the first board; and a second connection pattern provided at a position opposed to the first connection pattern and electrically connected to the second wiring pattern in the case where the inserting portion of the second board is inserted into the board insertion opening of the first board, and further comprising: solder or brazing filler metal applied at least to a surface of one of the first connection pattern and second connectionType: GrantFiled: December 1, 2006Date of Patent: April 28, 2009Assignee: Fujifilm CorporationInventor: Youichi Sawachi
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Patent number: 7525809Abstract: A packaged electrical system includes an enclosure and a main interior volume for component supports. The component supports may support electrical, electronic, power electronic and similar components, as well as switchgear and the like. A main power wireway is provided adjacent to the main interior volume of the enclosure for accommodating three phase power conductors. A network and control power wireway is formed separately from the main power wireway. The network and control power wireway may be formed toward the rear of the main interior volume, and may accommodate plug-in connections between component supports and network conductors and control power conductors. The network and control power wireway is thus accessible through a separate door from the main power wireway.Type: GrantFiled: November 11, 2005Date of Patent: April 28, 2009Assignee: Rockwell Automation Technologies, Inc.Inventors: Herberto Bergmann, Arnaldo Hiroyuki Omoto, Luis Ricardo Luzardo Pereira, José Batista Ferreira Neto, David L. Jensen, Chester Malkowski, Jr.
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Patent number: 7521788Abstract: A semiconductor module and a method of manufacturing a semiconductor module including at least one chip package, at least one module board, at least one conductive element provided between the first chip package and the module board and a protector for applying pressure to the conductive element, the module board, and the first chip package and/or acting as a heat sink for the first chip package.Type: GrantFiled: September 23, 2005Date of Patent: April 21, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Hyo-Jae Bang, Byung-Man Kim, Dong-Chun Lee, Kwang-Su Yu
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Patent number: 7515430Abstract: An electrically conductive shock mount system for electrical subassemblies is provided. The shock mount system includes a first assembly having a housing containing a hook member for a hook and loop fastener. The second assembly has a housing containing a loop member for a hook and loop fastener. A plurality of holes in the housings of the first and second assemblies allows the hook member to engage the loop member. In one embodiment, the housings are made from a conductive fabric and include a plurality of conductive columns that extend through the housings.Type: GrantFiled: May 29, 2008Date of Patent: April 7, 2009Assignee: International Business Machines CorporationInventors: Ross T. Fredericksen, Edward C. Gillard, Don A. Gilliland, Thomas J. McPhee
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Patent number: 7511968Abstract: Multiple fully buffered DIMM circuits or instantiations are presented in a single module. In a preferred embodiment, memory integrated circuits (preferably CSPs) and accompanying AMBs are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete FB-DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile.Type: GrantFiled: December 8, 2004Date of Patent: March 31, 2009Assignee: Entorian Technologies, LPInventor: Paul Goodwin
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Patent number: 7511963Abstract: This metal housing (2) is particularly intended to contain electronic or similar components. It includes a side wall (8) furnished with a ledge (20) having a bore (16) to receive a fixing screw (6). The side wall (8) has, at the bore (16), a recessed zone (10) whose concavity is oriented toward the outside of the housing (2), the ledge (20) intended to receive the screw (6) overhanging the recessed zone (10).Type: GrantFiled: May 13, 2004Date of Patent: March 31, 2009Assignee: Continental Automotive FranceInventor: Gautier Louchart