Abstract: Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs.

Abstract: A metal core substrate is provided. A first routing member is comprised of a first area of one sheet of metal core material; a first insulation layer formed on the first area; and a first circuit pattern made of a copper foil and formed on the first insulation layer. A second routing member comprised of: a second area of the one sheet of the metal core material, which is separated from the first area; a second insulation layer formed on the second area; and a second circuit pattern made of a copper foil and formed on the second insulation layer. A connecting member electrically connects the first routing member and the second routing member. The connecting member is comprised of a third area of the one sheet of the metal core material, which is interposed between the first area and the second area.

Abstract: A highly reliable electronic circuit board for suppressing propagation of noise and a power line communication apparatus using it are provided. An electronic circuit board of the invention is connected to a different electronic circuit board and including a first board having a first face and a second face opposed to the first face and a second board having a third face and a fourth face opposed to the third face.

Abstract: A robust printed circuit board (PCB) that includes at least two power layers that are used in providing power to components connected to the PCB. The power layers may be a power plane layer and a ground plane layer. The power plane layer is situated such that its edge is pulled back a second distance from the planar edge of the PCB. The ground plane layer is situated such that its edge is pulled back a first distance from the planar edge of the PCB. The second distance and the first distance are different, and as a result, the planar edges of the power plane layer and the ground plane layer respectively do not coincide.

Abstract: An inductor with patterned ground plane is described. In one design, the inductor includes a conductor formed on a first layer and a patterned ground plane formed on a second layer under the conductor. The patterned ground plane has an open center area and a shape matching the shape of the conductor. The patterned ground plane includes multiple shields, e.g., eight shields for eight sides of an octagonal shape conductor. Each shield has multiple slots formed perpendicular to the conductor. Partitioning the patterned ground plane into separate shields and forming slots on each shield help prevent the flow of eddy current on the patterned ground plane, which may improve the Q of the inductor. Multiple interconnects couple the multiple shields to circuit ground, which may be located at the center of the conductor.

Abstract: A mounting structure of an electronic component includes: a bump electrode included in the electronic component, the bump electrode having an internal resin as a core and a conductive film covering a surface of the internal resin, and elastically deforming so as to follow a shape of at least one corner of a terminal so that the conductive film makes direct conductive contact with at least part of a top surface of the terminal and at least part of a surface along a thickness direction of the terminal; a substrate having the terminal and the electronic component that is mounted on the substrate; and a holding unit provided to the substrate and the electronic component so as to hold a state in which the bump electrode electrically deformed makes conductive contact with the terminal.

Abstract: This invention provides an electronic device including a casing and a circuit board. The casing has an opening. The circuit board is located in the casing and at least includes a conductive layer and a surface insulating layer. The conductive layer includes a signal transmission portion and a static induction portion. The static induction portion is electrically disconnected with the signal transmission portion at the conductive layer, and the static induction portion is closer to the opening than the signal transmission portion. The surface insulating layer covers the signal transmission portion on the circuit board and exposes the static induction portion.

Abstract: A power module includes a semiconductor device having a first and second arms, and gate driving circuit board. The first arm includes a first extending electrode, a first gate electrode of a first power device extending in a direction different from the first extending electrode, and a first output electrode extending in the different direction from the first gate electrode. The second arm stacked on the first arm includes a second extending electrode extending in the first extending electrode extending direction in an insulating state, a second gate electrode of a second power device, extending in the first gate electrode extending direction, and a second output electrode extending in the first output electrode extending direction with electrical connection thereto. The gate driving circuit board is disposed at the first and second gate electrodes extending side so as to face the semiconductor device.

Abstract: Decoupling capacitor circuit assembly is described. In one example, a circuit assembly includes a passive substrate, a plurality of terminals, and at least one capacitor. The passive substrate includes a top surface and a bottom surface. The plurality of terminals is formed on the top surface and is configured for electrical communication with a respective plurality of lands on a printed circuit board (PCB). The at least one capacitor is mounted to the bottom surface of the passive substrate and is configured to provide decoupling capacitance for an integrated circuit (IC) on the PCB. Each capacitor is coupled to a pair of the plurality of terminals. In another example, a circuit assembly includes a PCB, and IC mounted to the PCB, a passive substrate mounted to the PCB, and at least one capacitor mounted to the passive substrate for providing decoupling capacitance for the IC.

Abstract: Substrates having power and ground planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a power plane and a ground plane. The at least one noise suppression structure may include a power plane extension that extends from the power plane generally toward the ground plane, and a ground plane extension that extends from the ground plane generally toward the power plane. The ground plane extension may be separated from the power plane extension by a distance that is less than the distance separating the power and ground planes. Electronic device assemblies and systems include such substrates. Methods for suppressing noise in at least one of a power plane and a ground plane include providing such noise suppression structures between power and ground planes.

Abstract: The invention offers a board-connecting structure that can provide electrodes with a fine pitch and that can combine the insulating property and the connection reliability. The structure of connecting printed wiring boards 10 and 20 electrically connects a plurality of first electrodes 12 and 13 provided to be adjacent to each other on a first board 11 with a plurality of second electrodes 22 and 23 provided to be adjacent to each other on a second board 21 through an adhesive 30 that contains conductive particles 31 and that has anisotropic conductivity. By heating and pressing the adhesive placed between the mutually facing first electrode 12 and second electrode 22 and between the mutually facing first electrode 13 and second electrode 23, an adhesive layer 30a is formed between the first board 11 and the second board 21 and in the adhesive layer 30a, a cavity portion 33 is formed between the first electrodes 12 and 13 and between the second electrodes 22 and 23.

Abstract: A multi-layer substrate includes a plurality of substrate main bodies, a plurality of layers which are alternately layered with the main bodies, a signal via hole which is connected with a signal line and includes a signal column which passes through at least one substrate main body; and a sub via hole which includes a sub column which surrounds the signal column, and a pair of sub pads which extend from end parts of the sub column to be formed to the layers, the layers which are formed with the sub pads being disposed in the same layer as the layers which are formed with the signal line of the signal via hole, or being disposed outside the layers which are formed with the signal line which is connected with the signal via hole.

Abstract: A PCB includes a number of insulation layers, a number of circuit layers, a signal-interfering component, and a signal-sensitive component. The circuit layers and the insulation layers are stacked alternately. The circuit layers include at least two first circuit layers, a second circuit layer, and a ground layer. The ground layer has a first side and a second side facing away the first side. The first circuit layers are positioned near the first side and include an outmost first circuit layer and at least one inner first circuit layer positioned between the outmost first circuit layer and the ground layer. The second circuit layer is positioned near the second side. The signal-interfering component is positioned on the outmost first circuit layer. The signal-sensitive component is positioned on the second circuit layer. Each inner first circuit layer defines a copper-remove area corresponding to an orthogonal projection of the signal-interfering component thereon.

Abstract: A portable hand held power inverter/converter having a pass through device for simultaneously sourcing A.C. and multiple voltage D.C. power consuming devices through a single D.C. power source connection. Inverter and converter circuitry is provided to invert and convert D.C. voltage to an A.C. voltage source and a lower DC voltage. A.C. electrical outlets are provided to facilitate a connection to an external A.C. power-consuming device and a DC outlet to a lower volt DC power-consuming device. The pass through device provides an independent and simultaneous connection to an additional D.C. outlet that would otherwise be eliminated when occupied by the inverter thus allowing simultaneous connection and operation of both A.C. and multi source D.C. power consuming devices through a single external D.C. power outlet of a single D.C. power source.

Abstract: A backplane arrangement is provided for an electronic mounting rack with a base backplane with several contact strips, wherein a free space, into which at least one additional backplane can be inserted, is provided on the base backplane.

Abstract: A signal line and a circuit board that can be easily bent in a U shape and prevent unwanted emission include a line portion includes a plurality of laminated line portion sheets made of a flexible material. Signal lines extend within the line portion in an x-axis direction. Ground lines are provided within the line portion on a positive direction side in a z-axis direction with respect to the signal lines and have line widths equal to or smaller than the line widths of the signal lines. Ground lines are provided within the line portion on a negative direction side in the z-axis direction with respect to the signal lines. The signal lines overlap the ground lines when seen in a planar view from the z-axis direction.

Abstract: Disclosed is a printed wiring board having signal layers each interposed between a power supply layer and a ground layer, wherein the signal layer includes at least one of a wiring region for a ground potential and a wiring region for a power supply potential.

Abstract: A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof and the second supplemental patterned conductive layer at another side thereof.

Abstract: An electromagnetic bandgap structure, including: a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, having one end part which is connected to the first metal layer; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer, whereas the other end part of the via is connected to a via land which is placed in a hole formed in the metal plate, and the via land is connected to the metal plate through a metal line.

Abstract: A dummy memory card includes a circuit board and a golden finger board. The circuit board includes a first conductive element and a second conductive element connected to a first electrical load. The golden finger board extends from the circuit board and is inserted into a memory slot of a motherboard. The golden finger board includes a first power pin and a first ground pin. The first conductive element is electrically connected to the first power pin. The second conductive element is electrically connected to the second power pin.

Abstract: A printed circuit board includes a power layer, a ground layer, a signal layer, and a backboard. The backboard is arranged below the signal layer opposite to the ground layer. A number of vias are formed from the backboard through the signal layer, and then connected to the ground layer.

Abstract: A wiring board has a first rigid wiring board having an accommodation section, a second rigid wiring board to be accommodated in the accommodation section, and an insulation layer formed on the first rigid wiring board and the second rigid wiring board. Here, a conductor of the first rigid wiring board and a conductor of the second rigid wiring board are electrically connected to each other, and at least either a side surface of the second rigid wiring board or a wall surface of the accommodation section has a concave-convex portion.

Abstract: A circuit system comprising: forming a lower electrode over a substrate; forming a resistive film over the lower electrode; forming a multi-layered insulating stack over a portion of the resistive film; and forming an upper electrode over a portion of the multi-layered insulating stack.

Abstract: A high-speed transmission circuit board connection structure includes a first high-speed transmission circuit board including a laminated substrate including a first signal transmission wiring formed on a surface thereof and a ground plane formed inside thereof, a second high-speed transmission circuit board including a circuit substrate and a second signal transmission wiring formed on a surface of the circuit substrate, a conductive board connecting member for fixing the first and second high-speed transmission circuit boards to a surface thereof, and a bonding wire for electrically connecting the first signal transmission wiring and the second signal transmission wiring. The ground plane is exposed on a side end face of the laminated substrate, and a conductive film is formed on the side end face such that the ground plane of the first high-speed transmission circuit board is electrically connected to the board connecting member with the conductive film.

Abstract: An electronic apparatus includes an electronic component electrically connected to a substrate positioned beneath the electronic component. A member includes a plurality of decoupling capacitors having different voltages, and the decoupling capacitors are electrically connected to the electronic component. A plurality of voltage planes in the member are electrically connected to the decoupling capacitors. The decoupling capacitors, via the voltage planes in the member, provide different voltages to the voltage planes and thus the electronic component.

Abstract: A mezzanine board alignment and mounting device includes a multi-stage pin connected to a main board near a mezzanine board connector disposed on the main board. The multistage pin includes a base adapted to connect to the main board, a point distal to the base adapted to pass through an opening on a mezzanine board, and a support disposed between the base and the point. A diameter of the point widens towards the support. A diameter of the support is wider than a diameter of the opening. When the point is fully inserted through the opening in the mezzanine board, the mezzanine board is aligned properly to connect with the mezzanine board connector on the main board.

Abstract: A printed circuit board (PCB) includes first to fourth layers. A power supply is arranged on the first layer. An electronic component is arranged on the fourth layer. A first via and a second via extend through the PCB and are electrically connected to the electronic component. The PCB further includes third to seventh vias. A length of a transmission path of the current flows from the power supply to electronic component through the third via and the seventh via is almost the same as a length of a transmission path of the current flows from the power supply to the electronic component through the fourth to sixth vias.

Abstract: An orthogonal array is formed by performing electromagnetic field analysis only once and determining a range by using the mount position and type of a capacitor and the number of capacitors as parameters to perform circuit analysis a small number of times. An estimation equation is formed by using as an index a result of the absolute value of the calculated power source impedance, and a capacitor is disposed to reduce noises by using the estimation equation.

Abstract: The present invention relates to a layered structure assembly (1) for a DC to AC inverter comprising: a first layered structure (10) with first (12) and second (13) conductive layers, a second layered structure (14) with third (16) and fourth (17) conductive layers, and at least one connector (21) providing a low resistance/inductance interconnection between layered structures (10, 14), the connecter (21) comprising a rod (23) inside a sleeve (26).

Abstract: According to one of the invention, a circuit board comprises a conductive layer. The conductive layer includes a first land portion, a second land portion apart from the first land portion in a plan view, and a line portion connecting the first land portion and the second land portion to each other. The line portion includes lead portions through which a current is to flow and an opening portion arranged between the lead portions. The opening portion penetrates the conductive layer in a thickness direction.

Abstract: A modular packet network device has a chassis in which multiple logic cards mate to the front side of an electrical signaling backplane. Logic power for the logic cards is supplied from a group of power converter cards that convert primary power to the logic voltages required by the logic cards. The power converter cards lie in a separate cooling path behind the backplane. Advantages achieved in at least some of the embodiments include removing primary power planes from the signaling backplane or portion of the backplane, providing redundant, upgradeable power modules whose individual failure does not cause logic card failure, and providing cool air to power converter circuits that would be subject to only heated air if located on the logic cards. Other embodiments are also described and claimed.

Abstract: Terminal pads are arranged on a first surface of the substrate for an electronic component to receive terminals of the electronic component. An electrically-conductive film is formed on a second surface defined on the back of the first surface over the back of a mounting area for the electronic component. The mounting area is contoured along the outer periphery of the arrangement of the terminal pads. The ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the back of the mounting area is set appropriate to the ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the mounting area for each electronic component. This results in suppression of flexure of the printed wiring board during reflow.

Abstract: A buildup board includes a buildup layer having a multilayer structure and/or a core layer having a multilayer structure. The multilayer structure includes a signal wiring pattern, a pad connected to the signal wiring pattern, an insulating part arranged around the pad on the same layer as the pad, and a conductor arranged around the insulating part on the same layer as the pad. The multilayer structure has at least two different keepouts where the keepout is defined as a minimum interval between an outline of the pad and the conductor closest to the pad on the same layer.

Abstract: An electronic apparatus includes, for example, a circuit board with an electronic component and a piezoelectric element, a reference potential pattern that gives a reference potential to at least one of the electronic component and the piezoelectric element, and a solder land connected to the reference potential pattern. On the circuit board, the electronic component is located on a downstream side in a transport direction of the circuit board during mounting of the piezoelectric element and the electronic component on the solder land, and the piezoelectric element is located on an upstream side in the transport direction.

Abstract: A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.

Abstract: An apparatus is provided that comprises a plurality of signaling planes providing signal pathways and at least one internal reference plane providing either a voltage or a ground connection. The at least one internal reference plane are provided between at least two of the signaling planes. The apparatus further comprises a signal blind/buried via coupling a signal pathway of a first one of the at least two signaling planes with a signal pathway of a second one of the at least two signaling planes. The blind/buried via runs through the at least one internal reference plane. The apparatus also comprises at least one first conductive feature in the first one of the at least two signaling planes. The at least one first conductive feature is in close proximity to the signal blind/buried via and increases the capacitive coupling of currents in the reference planes of the apparatus.

Abstract: The stopband characteristics of an electromagnetic bandgap structure in a printed circuit board may be preserved by selectively forming slots in an additional conductive layer of the printed circuit board. For example, an electromagnetic bandgap structure may include a layer with a continuous conductive region and another layer with a periodically patterned region having a plurality of spaced-apart patches interconnected by branches. Additional conductive layers may be included within the printed circuit board without neutralizing the bandgap by forming slots in the conductive layers in general alignment with spaces between the patches.

Abstract: A structure for transmission in a power supply, particularly to a power structure for transmission for bearing large DC current, wherein the power supply includes a power input port for connecting to DC input power and a DC/DC conversion circuit for converting the DC input power into DC output power. The architecture including at least one power transmission board for disposing the power input port, wherein the power transmission board is electrically connected to the power process board with the DC/DC conversion circuit mounted thereon by at least one power conduction element. Therefore, through the power conduction elements replacing the conventional connecting wires with large diameter to connect the power input port and the power process board without disobeying the safety regulation, not only the space occupied by the bent connection wires can be reduced, but the collisions and damage to other components caused therefrom also can be avoided.

Abstract: A printed circuit board includes a number of signal layers, a number of ground layers, a first transmission line, a second transmission line, a first via, and a second via. The first transmission is located on one of the number of signal layers. The second transmission line is located on another of the number of signal layers. The first and second vias pass through the printed circuit board. The first via is electrically coupled to the first and second transmission lines, and is isolated from the number of ground layers. The second via is electrically coupled to one or more of the number of ground layers, and is isolated from the other of the number of ground layers to increase an inductance, thus compensating capacitive nature of an open stub and improving signal integrity.

Abstract: A printed circuit board (“PCB”) includes a first pattern structure, a second pattern structure, a third pattern structure, and a fourth pattern structure. The first pattern structure includes a first ground pattern. The second pattern structure includes a first line pattern overlapping the first ground pattern and a second ground pattern electrically insulated from the first line pattern. The third pattern structure includes a third ground pattern overlapping the first line pattern and a second line pattern overlapping the second ground pattern. The fourth pattern structure includes a fourth ground pattern overlapping the second line pattern. Therefore, the PCB may decrease noise.

Abstract: A method of creating a layout geometry for a multilayer printed circuit board is described. The method involves identifying a signal trace connected to a connector pin via. A antipad is selected for use in conjunction with the connector pin via, where the antipad is of a size selected to prevent interference with said signal trace.

Abstract: Disclosed is a printed circuit board into which an electromagnetic bandgap structure for blocking a noise is inserted. The electromagnetic bandgap structure can include a first conductor and a second conductor arranged on different planar surfaces, a third conductor arranged on a same planar surface that is different from a planar surface where the second conductor is arranged, and a first stitching via unit configured to connect the first conductor to the third connector through the planar surface where the second conductor is arranged and being electrically separated from the second conductor. The first conductor can include a first plate, a second plate spaced from the first plate, and a second stitching unit configured to electrically connect the first plate to the second plate through a planar surface that is different from a planar surface where the first plate and the second plate are arranged.

Abstract: Disclosed are apparatus and methodology for providing land grid feedthrough capacitor designs having broad applicability to signal and power filtering technologies. Such capacitor designs provide characteristics for use in decoupling applications involving both signal level and power level environments. Low equivalent series inductance (ESL) is provided by current cancellation techniques involving opposite current flow in power or signal and ground current paths through the device.

Abstract: Provided is a method and system for designing an integrated circuit (IC) substrate, the substrate being formed to include at least one die. The method includes providing at least portions of IC power and a grounding function on a metal 2 substrate layer and utilizing all of a metal 3 substrate layer for the grounding function. Portions of the metal 2 layer and a metal 4 layer are utilized for the IC power, wherein all of the IC power is centralized underneath the die.

Abstract: Terminal pads are arranged on a first surface of the substrate for an electronic component to receive terminals of the electronic component. An electrically-conductive film is formed on a second surface defined on the back of the first surface over the back of a mounting area for the electronic component. The mounting area is contoured along the outer periphery of the arrangement of the terminal pads. The ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the back of the mounting area is set appropriate to the ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the mounting area for each electronic component. This results in suppression of flexure of the printed wiring board during reflow.

Abstract: Using die side capacitors and embedded resistors, an advantageous power delivery network may be achieved. In some embodiments, the embedded resistors may be more precisely controllable. The number of die side capacitors may be reduced by combining embedded resistors with these capacitors to reduce costs. The embedded resistors may be provided within the metallization layers either at an upper layer or a lower layer, as two examples.

Abstract: To provide a technique that can improve the reliability of coupling between a package with a PA module and a mounting board in mounting the package over the mounting board. The width of a back conductor pattern is made smaller than the width of each of back terminals. Specifically, for example, the back terminals are arranged in the X direction. The back terminals arranged in parallel to the X direction are coupled together by the back conductor pattern. At this time, the coupling direction (coupling line direction) of the back conductor pattern is the X direction. Taking into consideration the Y direction orthogonal to (intersecting) the X direction, the width of the back conductor pattern in the Y direction is made smaller than the width of each of the back terminals in the Y direction.

Abstract: Magnetic field distribution and mutual capacitance control for transmission lines are provided. A first circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, and attaching a first trace to the second surface of the dielectric material. A surface profile of the reference plane layer is modified to decrease a resistance of a return current signal path through the reference plane layer, to reduce a magnetic field coupling between the first trace and a second trace. A second circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, attaching a trace to the dielectric material, and forming a solder mask layer on the dielectric material layer over the trace. An effective dielectric constant of the solder mask layer is modified to reduce or increase a mutual capacitance between the first trace and a second trace on the dielectric material.

Abstract: A modular packet network device has a chassis in which multiple logic cards mate to the front side of an electrical signaling backplane. Logic power for the logic cards is supplied from a group of power converter cards that convert primary power to the logic voltages required by the logic cards. The power converter cards lie in a separate cooling path behind the backplane. Advantages achieved in at least some of the embodiments include removing primary power planes from the signaling backplane or portion of the backplane, providing redundant, upgradeable power modules whose individual failure does not cause logic card failure, and providing cool air to power converter circuits that would be subject to only heated air if located on the logic cards. Other embodiments are also described and claimed.

Abstract: The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration.