Abstract: An electronics module for automotive vehicles includes a housing; an electrical connector having a commercial standard electrical connector footprint mounted on the housing; and an electronics assembly including commercial standard communication bus electronics contained in the housing, the electronics assembly being electrically connected to the electrical connector. The electronics module is adapted to be plugged into a power distribution unit of an automotive vehicle in order to control power distribution components of the unit.

Abstract: An electromagnetic bandgap structure and a printed circuit board that can solve a mixed signal problem between an analog circuit and a digital circuit are disclosed. In accordance with an embodiment of the present invention, the electromagnetic bandgap structure can include a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, connecting the first metal layer to the metal plate; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer. Here, a hole can be formed on the metal plate. With the present invention, the electromagnetic bandgap structure can lower a noise level more within the same frequency band as compared with other structures having the same size.

Abstract: In a package for a semiconductor device, a core substrate has two metal plates, each of which includes a first through hole, a second through hole, a projection, and an insulating layer formed on its surface. The metal plates are stacked in a manner that the projections of the mutual metal plates enter the second through hole of the metal plate on a partner side, and the first through holes of the metal plates form a through hole penetrating the core substrate. A tip end of each of the projections of the metal plates is exposed to a surface of the metal plate on the partner side to form a first terminal portion, and a second terminal portion is exposed from the insulating layer and formed on a surface of the metal plate on a side where the first terminal portion of the metal plate on the partner side is exposed.

Abstract: An object of the present invention is to provide a wiring module that enables dense mounting and a reduction in wiring distance. The wiring module in accordance with the present invention includes a base material, a plurality of electronic circuit parts, insulating portions, and conductive portions connected to the electronic circuit parts, the plurality of electronic circuit parts, the insulating portions, and the conductive portions being integrally held on the base material. Wires are composed of a stack of the conductive portions and extend in a direction crossing a surface of the base material and in a direction crossing a direction perpendicular to the base material surface to electrically connect the plurality of electronic circuit parts together.

Abstract: A printed circuit board includes a first signal layer, a second signal layer, a plurality of transmission lines respectively including first segments laid in parallel on the first signal layer and second segments laid in parallel on the second signal layer, and a plurality of vias, each via connecting the first segment with the second segment of a corresponding transmission line. One of the plurality of transmission lines has the first segment positioned in the middle of an array defined by the first segments of the plurality of transmission lines, and a second segment positioned in an outmost position of an array defined by the second segments of the plurality of transmission lines. The printed circuit board reduces the possibility of false action of electronic components coupled to transmission lines, which is caused by the crosstalk between transmission lines.

Abstract: The present invention relates to a substantially package-like discrete electronic component of the type comprising a power electronic circuit, a body or casing, substantially parallelepiped, and electric connecting pins connected inside the body with said circuit and projecting from said body for an electric connection on the electronic printed circuit board. The body has a heat dissipating header having at least one surface emerging from the body and laying on a plane whereas the pins project from the body for a first section initially extended parallel to the plane. Advantageously a pair of pins has a substantially U-shaped bending, after the first section parallel to the plane for allowing a more stable bearing of the component during the step of welding to a heat dissipating intermediate die.

Abstract: A multilayered printed circuit board includes a first surface layer that includes a semiconductor integrated circuit, a second surface layer that includes a bypass capacitor and that is opposite to the first surface layer, a main power supply wiring layer, and a ground layer between the first and second surface layers. In the multilayered printed circuit board, one terminal of the bypass capacitor is connected to a midpoint of a wiring path from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.

Abstract: An integrated audio transducer with associated signal processing electronics is disclosed. A silicon audio transducer, such as a MEMS microphone or speaker, can be integrated with audio processing electronics in a single package. The audio processing electronics can be configured using control signals. The audio processing electronics can provide a single line serial data interface and a single line control interface. The audio transducers can be integrated with associated processing electronics. A silicon microphone can be integrated with an Analog to Digital Converter (ADC). The ADC output can be a single line serial interface. The ADC can be configured using a single line serial control interface. A speaker may be integrated with a Digital to Analog Converter (DAC). Audio transducers can also be integrated with more complex processing electronics. Audio processing parameters such as gain, dynamic range, and filter characteristics may be configured using the serial interface.

Abstract: Plated through holes pass through clearances in a ground plane of a circuit board. A conductive collar/spoke arrangement is constructed on the ground plane adjacent the clearance, to provide an inductive component to the coupling between a plated through hole and the ground plane. The inductive component impedes the transfer of high-frequency noise between the through hole and the ground plane. Other embodiments are also described and claimed.

Abstract: An embedded capacitor core including a first set of capacitors, a second set of capacitors, and an inter-layer dielectric film between the first set of capacitors and the second set of capacitors. The first set of capacitors includes: a first conductive pattern comprising at least two conductive electrodes; a second conductive pattern comprising at least two conductive electrodes corresponding to the two conductive electrodes of the first conductive pattern; and a first dielectric film between the first conductive pattern and the second conductive pattern. The second set of capacitors includes: a third conductive pattern comprising at least two conductive electrodes; a fourth conductive pattern comprising at least two conductive electrodes corresponding to the two conductive electrodes of the third conductive pattern; and a second dielectric film between the third conductive pattern and the fourth conductive pattern.

Abstract: A power distribution system for integrated circuits includes methods to damp resonance between a bypass capacitor network and a power/ground cavity of the printed circuit board that (a) does not require excessive quantities of bypass/damping components or (b) does not require high plane cavity capacitance or in the alternative can insure a Q of less than 1.4 at the transition from the bypass network to the plane cavity impedance cross-over.

Abstract: A multilayer printed circuit board has an IC chip included in a core substrate in advance and a mediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole and reliability.

Abstract: A multilayer printed circuit board has an IC chip included in a core substrate in advance, and an intermediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the intermediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole, and to improve reliability.

Abstract: A multilayer printed circuit board has an IC chip included in a core substrate in advance and a mediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole and reliability.

Abstract: A multilayer printed wiring board includes: a build-up layer that is formed on a core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; lands that are disposed on an upper surface of the low elastic modulus layer and connected via solder bumps to a IC chip; and conductor posts that pass through the low elastic modulus layer and electrically connect lands with conductor patterns. The conductor posts have the aspect ratio Rasp (height/minimum diameter) of not less than and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts, which are positioned at external portions of the low elastic modulus layer, is greater than or equal to the aspect ratio Rasp of internal conductor posts, which are positioned at internal portions of the low elastic modulus layer.

Abstract: A printed circuit board (PCB) has a multi-layered substrate including a plurality of signal lines and a ground voltage plate disposed below the signal lines and by which a common ground voltage is applied to the signal lines, a heat sink disposed on the multi-layered substrate, and thermal interface material interposed between the signal lines and the heat sink to transfer heat from the multi-layered substrate to the heat sink. The heat sink thus dissipates the heat generating from the multi-layered substrate and along with the ground voltage plate suppresses electromagnetic interference of signal transmitted through adjacent ones of the signal lines. The thermal interface material also serves in the design phase as a means to tune the impedance of the signal lines.

Abstract: Provided is a method and system for designing an integrated circuit (IC) substrate, the substrate being formed to include at least one die. The method includes providing at least portions of IC power and a grounding function on a metal 2 substrate layer and utilizing all of a metal 3 substrate layer for the grounding function. Portions of the metal 2 layer and a metal 4 layer are utilized for the IC power, wherein all of the IC power is centralized underneath the die.

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract: A grounding apparatus for connecting electrical equipment to ground comprises a plate comprising a top surface, a bottom surface and first and second end portions. Typically, the plate is connected to opposing support legs, such that an open space is provided under the bottom surface of the plate. The top surface of the plate may comprise one or more raised surfaces and also define a plurality of apertures for use in securing one or more lugs to the plate. The grounding apparatus optionally comprises a port connected thereto and comprising an exterior surface defining an opening for receiving a plug.

Abstract: A circuit board includes a plurality of signal lines and a plurality of shielding walls. The shield walls are disposed between the signal lines. Each shield wall includes an upper surface, a lower surface, a rectangular groove, a first metal layer and a second metal layer. The lower surface is opposite to the upper surface. The rectangular groove extends from the upper surface to the lower surface. The first metal layer is disposed on the upper surface. The second metal layer is disposed in the rectangular groove and electrically connected to the first metal layer.

Abstract: The present invention provides a PWB for attaching electrical components thereto. One aspect of the PWB includes multiple PWB insulating layers having conductive traces therebetween. The PWB has an interconnect opening located in the multiple PWB insulating layers that intersect at least a portion of the conductive traces. The interconnect opening has ledges therein, wherein each of the ledges separates a first group of the conductive traces from a second group of the conductive traces. The present invention also provides a method of making the PWB and also provides a power converter implementing the edge plate interconnects.

Abstract: A packaged integrated circuit device and a circuit board assembly are disclosed that include a semiconductor die and a package substrate that includes a first grid array of contact pads that are electrically coupled to corresponding contact pads on the semiconductor die. The first grid array of contact pads includes a first set of adjacent rows or columns of contact pads that are coupled to a first channel that extends within a ground plane of the package substrate. The first grid array of contact pads includes a second set of adjacent rows or columns of contact pads that are electrically coupled to a second channel that extends within a power plane of the package substrate. The contact pads in the first set of adjacent rows or columns of contact pads directly overlie a portion of the first channel and the contact pads in the second set of adjacent rows or columns of contact pads directly overlie a portion of the second channel.

Abstract: According to one embodiment, a multilayer printed circuit board having a plurality of wiring layers and an electronic component mounted thereon, includes a spiral wire including a path in a substantial spiral shape configured with a printed wire section of a substantial loop shape provided on each of at least two wiring layers of the plurality of wiring layers, and a plug provided on each wiring layer arranged between a top wiring layer which is a wiring layer on a top on which the printed wire section of a substantial loop shape is provided and a bottom wiring layer which is a wiring layer on a bottom on which the printed wire section of a substantial loop shape is provided.

Abstract: First sheet-like substrate is arranged at a region surrounded by first terminals of male connector and first circuit substrate, and second sheet-like substrate is arranged at a region surrounded by second terminals of female connector and second circuit substrate, and male connector and female connector are fitted together so that a first passive element of first sheet-like substrate and a second passive element of second sheet-like substrate configure a filter circuit.

Abstract: A circuit board includes a plurality of through holes into which a plurality of leads of one electronic devices are inserted and soldered with lead free solder. Among these through holes, the volume of through hole into which the outermost end lead of leads of the electronic device is inserted, is set greater than the volume of through hole, into which the lead at the position nearest to the center of the electronic device is inserted.

Abstract: A transceiver module including an adaptor and a PCB is provided. The PCB, connected with the adaptor, has a first signal layer, a second signal layer and a singular ground layer wherein the singular ground layer is set between the first signal layer and the second signal layer. The first signal layer includes a first transmitter circuit region and a first receiver circuit region. The second signal layer includes a second transmitter circuit region and a second receiver circuit region. The singular ground layer includes a ground portion of a third receiver circuit electrically connected with the ground signals of the first and the second receiver circuit region. Beside, the projection area of the singular ground layer onto the first signal layer substantially covers the first transmitter the first receiver circuit region. The ground portion of the third receiver circuit is electrically connected with a ground of the adaptor.

Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.

Abstract: The objective of present invention is to provide an electroplating solution capable of forming the upper face of a via-hole and the upper face of a conductor circuit in the same layer in approximately the same plane at the time of manufacturing a multilayer printed circuit board. The electroplating solution of the present invention is characterized by containing 50 to 300 g/L of copper sulfate, 30 to 200 g/L of sulfuric acid, 25 to 90 mg/L of chlorine ion, and 1 to 1000 mg/L of an additive comprising at least a leveling agent and a brightener.

Abstract: Techniques pertaining to powering multiple platforms with a minimum impact on air passage in a predefined environment are disclosed. Instead of connecting each of the platforms in a chassis to a power supply therein, the present invention uses what is referred to as cascading powering to power all platforms within minimum cable delivery. According to one embodiment of the present invention, each platform is provided with a pair of power connectors. At least one of the platforms has a power connector located towards or near a power supply so that only a short cable is needed to power the platform. The power is serially provided to an adjacent platform via a pair of corresponding connectors, each located on one of the two adjacent platforms. Such configuration is extended to the remaining platforms. As a result, all platforms are powered by the same power supply without using individual cables directly to the power supply.

Abstract: A component having reference layer openings to contribute towards achieving a differential impedance in a circuit, is described herein.

Abstract: A printed wiring board has a first wiring layer formed at least on one surface of an insulative substrate, an insulating layer formed as covering the first wiring layer, and a second wiring layer formed on the insulating layer. The insulating layer is formed of a cured insulative sheet made of a high-stiff sheet-type reinforcing material containing resin. The first and second wiring layers are electrically connected to each other through at least one hole having a bottom. The second wiring layer is united with the insulating layer at an interface thereof with a conductive material of the second wiring layer injected into concave sections provided on the interface. Another printed wiring board has an insulative substrate having a first surface and a second surface, a first insulating layer and a second insulating layer formed on the first surface and the second surface, respectively, and a first wiring layer formed on the first insulating layer and a second wiring layer formed on the second insulating layer.

Abstract: A method and device for data security including a printed circuit board and an integrated circuit each having a conductive trace layer shielded by a electrical shield layer. Tampering with either side of the device causes disturbance of a current flowing through a conductive trace layer used as an electrical shield. This triggers a security circuit to erase the data stored in the integrated circuit and stop data flow between the printed circuit board and the integrated circuit.

Abstract: A printed wiring board unit includes an electronic circuit component, a printed wiring board, a plurality of first conductive terminals disposed between the electronic circuit component and the printed wiring board, at least one of the first conductive terminals arranged along a quadrangular outline, and a plurality of second conductive terminals disposed between the electronic circuit component and the printed wiring board, the second conductive terminals arranged at a corner of the quadrangular outline, and the second conductive terminals contacting at least one of the printed wiring board and the electronic circuit component in a relatively displaceable manner.

Abstract: A system may include a first conductive ground pad, a second conductive ground pad, a first conductive via coupling the first ground pad to the second ground pad, a first conductive signal trace, a second conductive signal trace, and a second conductive via disposed within the first conductive via and coupling the first conductive signal trace to the second conductive signal trace. The first conductive ground pad and the second conductive ground pad may be disposed between the first conductive signal trace and the second conductive signal trace.

Abstract: Substrates having power and ground planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a power plane and a ground plane. The noise suppression structure may include a power plane extension that extends from the power plane generally toward the ground plane, and a ground plane extension that extends from the ground plane generally toward the power plane. The ground plane extension may be separated from the power plane extension by a distance that is less than the distance separating the power and ground planes. Electronic device assemblies and systems include such substrates. Methods for suppressing noise in at least one of a power plane and a ground plane include providing such noise suppression structures between power and ground planes.

Abstract: A flexible substrate includes: (i) a film; (ii) an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and (iv) a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.

Abstract: A power distribution system for integrated circuits includes methods to damp resonance between a bypass capacitor network and a power/ground cavity of the printed circuit board that (a) does not require excessive quantities of bypass/damping components or (b) does not require high plane cavity capacitance or in the alternative can insure a Q of less than 1.4 at the transition from the bypass network to the plane cavity impedance cross-over.

Abstract: A reconfigurable high performance computer occupies less than 360 cubic inches and has an approximate compute power of 0.7 teraflops per second while consuming less than 1000 watts. The computer includes a novel stack of semiconductor substrate assemblies. Some semiconductor substrate assemblies involve field programmable gate array (FPGA) dice that are directly surface mounted, as bare die, to a semiconductor substrate. Other semiconductor substrate assemblies of the stack involve bare memory integrated circuit dice that are directly surface mounted to a semiconductor substrate. Elastomeric connectors interconnect adjacent semiconductor substrates proceeding down the stack. Tines of novel comb-shaped power bus bar assembly structures extend into the stack to supply DC supply voltages. The supply voltages are supplied from bus bars, through vias in the semiconductor substrates, and to the integrated circuits on the other side of the substrates.

Abstract: The present invention relates to computer hardware design, and in particular to a printed circuit board (card) comprising wiring dedicated to supply electric board components such as integrated circuits with at least three different reference planes. In particular at locations, where the pins of a card-to-card connector enter the layer structure of the card discontinuities brake the high frequency signal return path of a given signal wiring. In order to close the signal return path around a signal path from card to card including the connector, and thus to limit the signal coupling while concurrently keeping the card design as simple as possible, it is proposed to provide a) an additional capacitance for a given signal wiring in a discontinuity section, b) wherein the additional capacitance is formed by a voltage island placed within a signal layer located next to the given signal wiring.

Abstract: A wired circuit board has a metal supporting board, an insulating layer formed on the metal supporting board, a conductive pattern formed on the insulating layer and having a pair of wires arranged in spaced-apart relation, and a semiconductive layer formed on the insulating layer and electrically connected to the metal supporting board and the conductive pattern. The conductive pattern has a first region in which a distance between the pair of wires is small and a second region in which the distance between the pair of wires is larger than that in the first region. The semiconductive layer is provided in the second region.

Abstract: A multi-layer substrate connecting to an external electric device includes: a plurality of resin films; and a plurality of conductive patterns. The resin films are stacked together with the conductive patterns. The conductive pattern includes an inner conductive pattern and a surface conductive pattern. The inner conductive pattern is disposed inside of the multi-layer substrate for providing an inner circuit. The surface conductive pattern is exposed on the multi-layer substrate for connecting to the external electric device. The surface conductive pattern has a thickness in a stacking direction, which is thicker than a thickness of the inner conductive pattern.

Abstract: A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

Abstract: An assembly integrating commercially available capacitors into filtered feedthroughs. A feedthrough assembly comprises a plurality of Input/Output (I/O) conductors, wherein the I/O conductors pass through a hermetic seal such that a first end of the I/O conductors reside on a non-hermetic side of the hermetic seal and a second end of the I/O conductors reside on a hermetic side of the hermetic seal, a printed circuit interconnect substrate residing on the hermetic side of the hermetic seal, and a plurality of ceramic chip capacitors mounted on the printed circuit interconnect substrate, wherein a first end of each capacitor is connected via the interconnect to the second end of an I/O conductor and a second end of each capacitor is connected via the interconnect to a constant voltage level.

Abstract: Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance.

Abstract: A substrate for power decoupling and a method of forming a substrate for power decoupling. The substrate comprises one or more decoupling capacitors; and one or more interconnections to the decoupling capacitors. At least one of the interconnections comprises a lossy material.

Abstract: The invention relates to an electrical device comprising a substrate carrying at least one component comprising at least one electrode, a first connecting line electrically connected to said electrode, wherein the first connecting line bridges a second connecting line by means of a crossover. The crossover is, at least at one side, bounded by an electrically insulating structure. The invention allows new testing methods and efficient lead-outs for an electrical device, such as electroluminescent display devices.

Abstract: A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: A shielded flexible cable having a plurality of shielded electronic circuits in close proximity to one another such that signals transmitted on one of said plurality of shielded electronic circuits do not substantially interfere with signals transmitted on the other of said plurality of electronic circuits comprising a polyimide support member supporting a plurality of etched copper traces on a first side of said polyimide support member and a copper layer on a second side of said polyimide support member. Said polyimide support member is flexible along at least one axis, and said plurality of etched copper traces and said copper layer substantially as flexible as said polyimide support member.

Abstract: The invention provides an electronic circuit module capable of reliably mounting a chip to a multi-layer wiring plate in a flip chip manner. In an electronic circuit module according to an embodiment of the invention, a chip including bumps with a height of d is mounted to a multi-layer wiring plate including surface electrodes and internal electrodes in a flip chip manner. In the multi-layer wiring plate, when the minimum thickness of the surface electrode and the internal electrodes overlapping each other below each of the bumps is TD and the maximum thickness of the surface electrode and the internal electrodes overlapping each other in a space surrounded by the bumps is TI, the surface electrodes and the internal electrodes are arranged so as to satisfy TI<TD+d.

Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 ?m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 ?m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.