Interconnection Details Patents (Class 361/803)
  • Patent number: 7403397
    Abstract: A switching power-supply module includes circuit boards, power conversion circuit sections provided on the respective circuit boards, conductor land patterns provided with spacing therebetween along edges of the circuit boards, conductor terminals for interconnecting the conductor land patterns. The circuit boards are stacked with spacing therebetween with the corresponding conductor land patterns being aligned, and the aligned conductor land patterns are interconnected by the corresponding conductor terminals. At least one of the conductor terminals includes an interboard-connection portion for interconnecting the conductor land patterns of the circuit boards and a leg portion that extends from the interboard-connection portion in the stacking direction of the circuit boards and that defines an external-connection portion, and the other conductor terminals each function as an interboard-connection dedicated terminal for providing connection between the circuit boards.
    Type: Grant
    Filed: December 26, 2003
    Date of Patent: July 22, 2008
    Assignee: Murata Manufacturing Co., Ltd
    Inventors: Tadahiko Matsumoto, Syuichi Honda, Yasuo Ohashi, Naoto Sano
  • Patent number: 7400512
    Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: July 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Tsunenori Yoshida, Seiichi Nakatani
  • Patent number: 7400515
    Abstract: An electrode connection structure between outer lead(s) of TCP(s), being first circuit board(s), and actuator member electrode(s) for connection to external circuitry, being second circuit board(s); actuator member(s) electrode(s) for connection to external circuitry being formed in or on floor(s) of recess(es) which is/are step(s) smaller in magnitude than thickness(es) of outer lead(s) protruding from polyimide substrate(s) of TCP(s); adhesive(s) having thickness(es) more or less equal to difference(s) between step(s) and thickness(es) of outer lead(s); and outer lead(s) being electrically and mechanically connected to electrode(s) for connection to external circuitry.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: July 15, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Sakamoto, Tomoyuki Sagara, Yoshinori Nakajima
  • Publication number: 20080165518
    Abstract: A flip chip mounting process or a bump-forming process according to the present invention is characterized in that electrically-conductive particles are fixed on electrodes formed on an electronic component. A composition comprising solder powder, a convection additive and a resin component is supplied onto a surface of the electronic component, the surface is provided with the electrodes. The supplied composition is heated up to a temperature enabling the solder powder to melt. As a result, the convection additive boils or is decomposed so as to generate a gas. The generated gas produces a convection phenomenon within the supplied composition. Since the convection phenomenon promotes the movement of the solder powder, the solder powder can move freely within the composition. The electrically-conductive particles serve as nuclei for the solder powder to self-assemble and grow.
    Type: Application
    Filed: March 13, 2006
    Publication date: July 10, 2008
    Inventors: Takashi Ichiryu, Seiichi Nakatani, Seiji Karashima, Yoshihiro Tomita, Koichi Hirano, Toshio Fujii
  • Patent number: 7394663
    Abstract: An electronic component built-in module according to the present invention includes a pair of opposed circuit substrates, each of which includes a wiring pattern and an insulating base material containing a resin, an insulating layer that is placed between the pair of circuit substrates and contains an inorganic filler and a resin composition containing a thermosetting resin, an electronic component that is embedded in the insulating layer, and an inner via that is provided in the insulating layer so as to make an electrical connection between wiring patterns provided on different circuit substrates. A glass transition temperature Tg1 of the resin composition contained in the insulating layer and a glass transition temperature Tg2 of the insulating base material included in each of the circuit substrates satisfy a relationship Tg1>Tg2.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: July 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Koichi Hirano, Yasuhiro Sugaya, Toshiyuki Asahi, Seiichi Nakatani
  • Patent number: 7394666
    Abstract: A cam-action expanding standoff connector and related method are disclosed for mounting a circuit board. The standoff connector includes a body and a plurality of mounting members having interior longitudinally-extending camming portions for engagement by a cam. A cam is configured to be positioned within the mounting members in a first position in which the mounting members are not expanded against the interior of a mounting opening and in a second position in which the cam engages the camming portions to expand the plurality of mounting members against the interior of the mounting opening. Since the camming action is horizontal only (purely radial), practically no vertical forces are applied to the circuit board and a best-fit alignment between a circuit board and heatsink can be established and maintained.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: July 1, 2008
    Assignees: International Business Machines Corporation, Apple Computer, Inc.
    Inventors: David L. Edwards, Ronald L. Hering, David C. Long, Jason S. Miller, Carl R. Peterson
  • Patent number: 7394665
    Abstract: In a circuit module package arranged on a mounting board, a circuit module has signal input and output terminals and is mounted on an interposer. The interposer is provided with first signal terminals electrically connected to the signal input and output terminals of the circuit module, second electric terminals for electrically connecting the circuit module to the mounting board, internal wirings electrically connected to the first signal terminals, and first coupling parts electrically connected to the internal wirings. An interface module is provided with a signal transmission line for transmitting the signals and second coupling parts electrically connected to the transmission line. The second coupling part is electrically and mechanically connected to the first coupling parts, respectively.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: July 1, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Hamasaki, Hideto Furuyama
  • Publication number: 20080144301
    Abstract: A connecting terminal has an electrically-conductive ring surrounding a columnar space. Electrically-conductive elastic pieces extend from the electrically-conductive ring in the direction of the central axis of the columnar space. Electrically-conductive blades stand from the outer surfaces of the electrically-conductive elastic pieces. A lead terminal is received in the columnar space. The tip ends of the electrically-conductive elastic pieces are urged against the lead terminal. The lead terminal is prevented from withdrawing out of the through hole. Electric connection is established between the lead terminal and the elastic pieces. The blade or blades of the connecting terminal or terminals stick into the wall surface of the through hole. The connecting terminal is thus firmly held in the through hole. Electric connection is established between the blade or blades and the through hole. Electric connection is thus established between the lead terminal and the through hole.
    Type: Application
    Filed: October 4, 2007
    Publication date: June 19, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Ikuo Konishi
  • Publication number: 20080130253
    Abstract: An electronic circuit, preferable as a sensor node, has a highly sensitive radio function and is capable of performing a low-power-consumption operation. The electronic device has a board; a connector for connecting a sensor; a first signal processor circuit receiving an input of sensor data from the sensor through the connector and forming transmission data; and a second signal processor circuit converting a transmission signal from the first signal processor circuit into a high-frequency signal. The connector and the first signal processor circuit are mounted on a first surface of the board, and the second signal processor circuit is mounted on a second surface of the board.
    Type: Application
    Filed: October 19, 2007
    Publication date: June 5, 2008
    Inventor: Shunzo Yamashita
  • Patent number: 7374811
    Abstract: A method for manufacturing a ceramic device is provided. The ceramic device comprises a ceramic layer. A polyimide layer is on the ceramic layer. The polyimide layer has disposed therein a plurality of copper vias. Each copper via is in physical contact with the ceramic layer. A plurality of pads are formed on the polyimide layer. Each of the plurality of pads is in physical contact with a copper via of the plurality of copper vias. In this way, the pads are supported by a continuous copper arrangement, thereby providing greater support for the probe pads than if the probe pads were supported by the polyimide layer, as the mechanical strength of polyimide layer is lower than the mechanical strength of copper.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: May 20, 2008
    Assignee: SV Probe Pte Ltd.
    Inventors: Chi Shih Chang, Bahadir Tunaboylu
  • Patent number: 7375981
    Abstract: An electric power distribution and control apparatus has a stack of conductive plates each having a plurality of spaced contact pads and conductive traces connecting the contact pads to others of the pads. At least one of the plates has contact terminals for connection to electrical components for supply of electrical current. An array of contact pins pass through holes in the plates at a respective one of the contact pads such that the array of pins provides connection between selected contact pads of different selected conductive plates. An electronic system for connection to a communication bus is added to the above known system by providing a main circuit board having the electronic components thereon, a mapping circuit board having a plurality of contact pads thereon arranged for connection to respective ones of the array of pins and a header having a male pin array and a female socket array connecting the main printed circuit board and the mapping circuit board.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: May 20, 2008
    Assignee: Vansco Electronics LP
    Inventor: Kevin Dickson
  • Patent number: 7372143
    Abstract: A via is formed in a printed circuit board to penetrate through an insulating layer. A guard pattern, made of an electrically-conductive material, extends on the front surface of the insulating layer along a circle concentric with the via. An electrically-conductive body extends from the guard pattern in the insulating layer along an imaginary cylinder concentric with the via. The guard pattern of the printed circuit board serves to control the characteristic impedance of the via at the front surface of the insulating layer. The electrically-conductive body contributes to a better control of the characteristic impedance of the via. The via is allowed to reliably enjoy a better impedance matching than ever. Noise can sufficiently be suppressed in electric signals running through the via.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: May 13, 2008
    Assignee: Fujitsu Limited
    Inventors: Naoki Nakamura, Midori Kobayashi
  • Patent number: 7362589
    Abstract: A circuit board comprising at least one slot provided on a surface of the circuit board. An add-in card can be mated to the slot. The slot comprises a first electrical connection adapted to couple to an add-in card of a first type and a second electrical connection adapted to couple to an add-in card of a second type. The first or second types of add-in cards are different.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: April 22, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Raphael Gay
  • Patent number: 7351072
    Abstract: A memory extension memory module, a memory module system, and a memory module is disclosed. The memory module including at least one memory device and a connector for connecting the memory module to a computer system, wherein the memory module additionally includes a surface-mounted connector for connecting a memory extension memory module to the memory module. Furthermore, a method for manufacturing a memory module is disclosed. The memory module including at least one memory device and at least one connector for connecting a memory extension memory module to the memory module, wherein the at least one memory device and the at least one connector are connected to the memory module in a single manufacturing process.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: April 1, 2008
    Assignee: Qimonda AG
    Inventors: Simon Muff, Siva Raghuram
  • Patent number: 7352589
    Abstract: A modular computer system mechanical interconnection includes a primary chassis having a first opening and a secondary chassis attached to the primary chassis and having a second opening, wherein the first opening and the second opening are generally aligned. The apparatus further includes a backplate covering the aligned first opening and second opening.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: April 1, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Jimmy Clidaras, Kenneth Kitlas
  • Patent number: 7350292
    Abstract: A method for affecting an impedance of a portion of an electrical circuit loop in an electrical circuit apparatus includes providing an electrical circuit apparatus having at least a portion of an electrical circuit loop including at least one of at least one trace and at least one via, and providing a layer of magnetic material disposed adjacent at least one of the trace and the via. The trace and the via are operatively connected together to provide electrical communication. Dielectric material is disposed in an operative relationship adjacent at least one of the trace and the via. The layer of magnetic material is disposed in operative relationship near at least one of the trace and the via to affect the impedance of at least one of the trace, the via and the portion of the circuit loop formed by the trace and the via.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: April 1, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Michael J. Tsuk
  • Patent number: 7348492
    Abstract: A flexible wiring board is obtained as follows. A copper foil pattern is formed on the both surfaces of a base polymer film made of polyimide, etc. The copper foil pattern of the both sides, except for an end portion of the copper foil pattern of one surface, is covered entirely with an insulative protecting film made of polyimide, etc., for protecting the copper foil pattern, and the insulative protecting film and the copper foil pattern are bonded with each other by an insulative protecting film adhesive layer. On the exposed end portion of the copper foil pattern on one surface is formed a plated layer to be connected to an electrical component. The thickness of the insulative protecting film which is bonded with the surface on which the plated layer is formed is set to be thinner than the base polymer film. As a result, it is ensured that insulation failure of the insulative protecting film is prevented, and wire breakage of wiring when bent can easily be prevented.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: March 25, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Noriko Kawai, Takashi Nakashima, Hirokazu Yoshida
  • Patent number: 7349223
    Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: March 25, 2008
    Assignee: Nanonexus, Inc.
    Inventors: Joseph Michael Haemer, Fu Chiung Chong, Douglas N. Modlin
  • Patent number: 7345891
    Abstract: A circuit board assembly includes a circuit board, an electronic component and a structure coupling the electronic component to the circuit board. The structure retains the electronic component relative to the circuit board at a selected one of a plurality of positions in both directions along an axis perpendicular to the circuit board. The structure is movably coupled to one of the electronic component and the circuit board in a direction perpendicular to the axis at least prior to being coupled to the other of the electronic component and the circuit board.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: March 18, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Stephan K. Barsun, Gregory S. Meyer, Bryan D. Bolich, S. Daniel Cromwell
  • Patent number: 7342805
    Abstract: A method and apparatus to mount a capacitor plate to a substrate, under a component. One embodiment of the invention involves a method to assemble a capacitor plate on a substrate. A second embodiment of the invention involves a method to fabricate a capacitor plate. A third embodiment of the invention involves an assembled substrate with a capacitor plate on the second side of the assembled substrate, under an electrical contact area of a component on the first side of the assembled substrate.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: March 11, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Thane M. Larson
  • Patent number: 7342810
    Abstract: The present invention can reduce the warping of the printed circuit board of a display device.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: March 11, 2008
    Assignee: Hitachi Displays, Ltd.
    Inventors: Masaki Tsubokura, Shinichi Iwasaki, Chiaki Notsu, Mitsuo Saitou
  • Patent number: 7342308
    Abstract: Component stacking for increasing packing density in integrated circuit packages. In one aspect of the invention, an integrated circuit package includes a substrate, and a plurality of discrete components connected to the substrate and approximately forming a component layer parallel to and aligned with a surface area of the substrate. An integrated circuit die is positioned adjacent to the component layer such that a face of the die is substantially parallel to the surface area of the substrate. The face of the die is aligned with at least a portion of the component layer, and terminals of the die are connected to the substrate.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: March 11, 2008
    Assignee: Atmel Corporation
    Inventor: Ken Lam
  • Patent number: 7336499
    Abstract: An object of the present invention is to provide a flexible printed wiring board which relaxes stress concentration in the flexible printed wiring board during production steps, thereby preventing wire breakage in inner lead portions and cracking in solder resist which would otherwise be caused during mounting of devices such as IC chips and LSI chips. The flexible printed wiring board of the present invention includes an insulating layer; a wiring pattern formed of a plurality of wirings being juxtaposed, which wiring pattern is formed through patterning a conductor layer stacked on at least one surface of the insulating layer and on which wiring pattern a semiconductor chip is to be mounted; and grid-like dummy patterns formed in a blank area where the wiring pattern is not provided, wherein the dummy patterns are formed in a width direction generally symmetrically with respect to the longitudinal direction of the flexible printed wiring board.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: February 26, 2008
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventor: Kota Hagiwara
  • Publication number: 20080043449
    Abstract: One embodiment relates to an encased electrical component board interconnection system, including an audio/video related electrical component board encased within a housing, an interconnection panel disposed on an external surface of the housing, and an interconnection retaining system. The electrical interconnection panel facilitates the electrical coupling between the electrical component board and external electrical devices. The interconnection panel includes electrical couplers disposed on independently oriented coupling surfaces. The coupling surfaces may be oriented in a convex outward facing configuration to facilitate efficient coupling and may further include an intermediary positioned labeling surface. The interconnection retaining system releasably supports an elongated interconnection device connected to the electrical couplers at a particular three-dimensional orientation that minimizes visual obstruction of the electrical interconnection panel and maintains proper electrical connection.
    Type: Application
    Filed: June 28, 2007
    Publication date: February 21, 2008
    Inventor: Michael Pyle
  • Patent number: 7322100
    Abstract: Methods for producing micromachined layered devices having a membrane layer and a first and second layer on both sides of the membrane layer are disclosed. The method includes applying a membrane layer to a substrate, opening a window in the substrate so as to enable the addition of layers from both sides of the membrane layer while the substrate is made into a frame that supports the membrane layer during processing, adding at least one layer on each side of the membrane either simultaneously or on one side at a time, and removing the device from the substrate frame.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: January 29, 2008
    Assignee: Micromuscle AB
    Inventors: Edwin Jager, Magnus Krogh
  • Patent number: 7324352
    Abstract: Multiple DIMM circuits or instantiations are presented in a single module. In some embodiments, memory integrated circuits (preferably CSPs) and accompanying AMBs, or accompanying memory registers, are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: January 29, 2008
    Assignee: Staktek Group L.P.
    Inventor: Paul Goodwin
  • Patent number: 7321497
    Abstract: The invention provides an electronic circuit apparatus having a plurality of electronic circuit units (101a-101n), a circuit board (102) and a connection unit (103), the circuit board (102) having a basic board element (200) and a plurality of additional board elements (201-204), the plurality of additional board elements (201-204) being connected to the basic board element (200) by means of connecting elements (301-304) and the circuit units being arranged on the additional board elements (201-204) in such a way that in each case identical signal propagation times are provided between the circuit units arranged on an additional board (201-204) and the connection unit (103).
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: January 22, 2008
    Assignee: Infineon Technologies AG
    Inventors: Sven Boldt, Erwin Thalmann
  • Patent number: 7321496
    Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Patent number: 7321097
    Abstract: The invention provides in a preferred embodiment an electronic component comprising a first conductive layer, a non-conductive layer and a second conductive layer. A hole is etched through the non-conductive layer. A nanotube, which is provided in said hole, links the first conductive layer to the second conductive layer in a conductive manner.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: January 22, 2008
    Assignee: Infineon Technologies AG
    Inventors: Manfred Engelhardt, Wolfgang Hönlein, Franz Kreupl
  • Patent number: 7319197
    Abstract: A stacked via structure (200) adapted to transmit high frequency signals or high intensity current through conductive layers of an electronic device carrier is disclosed. The stacked via structure comprises at least three conductive tracks (205a, 205b, 205c) belonging to three adjacent conductive layers (110a, 110b, 110c) separated by dielectric layers (120), aligned according to z axis. Connections between these conductive tracks are done with at least two vias (210, 215) between each conductive layer. Vias connected to one side of a conductive track are disposed such that they are not aligned with the ones connected to the other side according to z axis.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: January 15, 2008
    Assignee: International Business Machines Corporation
    Inventors: Stefano Oggioni, Michele Castriotta, Gianluca Rogiani, Mauro Spreafico, Giorgio Viero
  • Patent number: 7319599
    Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor, a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: January 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Tsunenori Yoshida, Seiichi Nakatani
  • Patent number: 7316571
    Abstract: A circuit module includes a printed circuit board, which is vertically mounted on a system circuit board. The support structure includes a first supporting member and a second supporting member. The first supporting member is arranged on a first side of the printed circuit board and includes a first bottom surface lying flat on the system circuit board. The second supporting member is arranged on a second side of the printed circuit board and includes a second bottom surface lying flat on the system circuit board, wherein the second side is opposed to the first side. The first supporting member and the second supporting member cooperatively clamp a lower edge of the printed circuit board therebetween.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: January 8, 2008
    Assignee: Delta Electronics, Inc.
    Inventor: Hung-Chi Chen
  • Publication number: 20080002382
    Abstract: A power interconnection system is provided including a printed circuit board (10), a voltage regulator package (30), and an electrical connection socket (20) adapted for receiving a chip package (40) therein. The electrical socket and the voltage regulator package are mounted and electrically coupled to opposite surfaces of the printed circuit board. Thus, the voltage regulator package and the chip package are held in a substantially opposed relationship relative to the printed circuit board after the chip package is mounted onto the socket. Therefore, with such configuration, a lower impedance connection is achieved between the chip package and the voltage regulator package in comparison with the conventional configuration.
    Type: Application
    Filed: June 28, 2006
    Publication date: January 3, 2008
    Inventors: David Gregory Howell, Genn-Sheng Lee
  • Patent number: 7304857
    Abstract: An electronic circuit, preferable as a sensor node, has a highly sensitive radio function and is capable of performing a low-power-consumption operation. The electronic device has a board; a connector for connecting a sensor; a first signal processor circuit receiving an input of sensor data from the sensor through the connector and forming transmission data; and a second signal processor circuit converting a transmission signal from the first signal processor circuit into a high-frequency signal. The connector and the first signal processor circuit are mounted on a first surface of the board, and the second signal processor circuit is mounted on a second surface of the board.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: December 4, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Shunzo Yamashita
  • Patent number: 7301781
    Abstract: The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: November 27, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Satoru Konishi, Tsuneo Endoh, Masaaki Tsuchiya, Hirokazu Nakajima
  • Patent number: 7298628
    Abstract: A processor mounted to a circuit board is provided with regulated voltage through lower-inductance circuit board traces by mounting a voltage regulator module for the processor, on the side of the circuit opposite to the processor. Current from the voltage regulator is provided to the processor by way of one or more conductors between the regulator and processor that extend through the circuit board from one side to the other. Inductance attributable to lead length is reduced by locating the voltage regulator close to its load. Circuit board space on the processor side of the circuit board is increased by moving the voltage regulator to the opposite side.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: November 20, 2007
    Assignee: Molex Incorporated
    Inventors: Augusto P. Panella, John E. Lopata, James L. McGrath, Arindum Dutta
  • Patent number: 7298625
    Abstract: An expansion structure of memory module slots is provided. A circuit switch board and a substrate are disposed on a motherboard, wherein a plurality of first memory module slots is disposed on the motherboard, at least one second memory module slot is disposed on one side of the substrate, and a plurality of third memory module slots is disposed on the other side of the substrate. The third memory module slots are electrically connected to the second memory module slot, and two ends of the circuit switch board are plugged into one of the first memory module slots and the second memory module slot. When memory modules are plugged in the third memory module slots, the memory modules are electrically connected to the first memory module slots respectively through the circuit switch board and then transmit data and signals with the motherboard.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: November 20, 2007
    Assignee: Inventec Corporation
    Inventors: Fu-Chung Wu, Sheng-Yuan Tsai, Shih-Jui Tung
  • Patent number: 7298630
    Abstract: A coupling mechanism mainly includes a coupling member and two bucking blades. The coupling member has two anchor ends on two sides to anchor a plugging main board on the coupling member, and a groove on an upper side and a lower side, to hold the bucking blades. The bucking blades are squeezed and deformed when the coupling member is moved and latched on a coupling interface of an electronic device to fill the tolerance between the two, thus can prevent electromagnetic waves from leaking out. The two anchor ends are made of metal and can also prevent the electromagnetic waves from leaking out from two sides. The coupling mechanism solves the interference problem during assembly occurring to conventional coupling mechanisms that use annular conductive-foamed plastics. The cost of the coupling mechanism also decreases.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: November 20, 2007
    Assignee: Inventec Corporation
    Inventor: Ruei-Lin Chen
  • Patent number: 7294928
    Abstract: A bottom unit including a bottom unit semiconductor chip is mounted to a circuit board and one or more top elements such as packaged semiconductor chips are mounted to the bottom unit. Both mounting operations can be performed using the same techniques as commonly employed for mounting components to a circuit board. Ordinary packaged chips can be employed as the top elements, thereby reducing the cost of the assembly and allowing customization of the assembly by selecting packaged chips. The assembly achieves benefits similar to those obtained with a preassembled stacked chip unit, but without the expense of special handling of the bare dies included in the packaged chips.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 13, 2007
    Assignee: Tessera, Inc.
    Inventors: Kyong-Mo Bang, David Gibson, Young-Gon Kim, John B. Riley
  • Patent number: 7292453
    Abstract: A mounted printed wiring board is disclosed that will allow sensors to be installed in optimal positions thereon with the same time and effort needed for one board, and allow the same to be inexpensively manufactured with a simple process. A single board unit includes first and second board portions having a break line interposed therebetween. Sensors and mounted components that are shorter than the sensors are mounted on the first board portion, connectors and mounted components that are taller than the sensors are mounted on the second board portion, and jumper wires are mounted across the first and second board portions. The board unit is then folded in two with the break line so that the mounting surfaces face outward, and the first and second board portions are fixed with spacers.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: November 6, 2007
    Assignee: Kyocera Mita Corporation
    Inventor: Kentarou Naruse
  • Patent number: 7289336
    Abstract: An interconnect structure for use in an electronic device, wherein the interconnect structure comprises a first substrate comprising a flexible material, wherein the first substrate comprises a front side and a back side, and wherein the first substrate is configured to receive a sensor on the front side; and a second substrate coupled to the back side of the first substrate and comprising a rigid material. A detector module for use in an imaging system comprises the aforementioned interconnect structure.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: October 30, 2007
    Assignee: General Electric Company
    Inventors: William Edward Burdick, Jr., James Wilson Rose, John Eric Tkaczyk, Oded Meirav, Jerome Stephen Arenson, David Michael Hoffman
  • Patent number: 7289335
    Abstract: A force distributor is configured for disposition between a printed circuit board and a stiffening plate, which is spaced from the printed circuit board. The force distributor is configured to distribute a compressive force between the printed circuit board, an interposer and a land grid array module carried on a side of the printed circuit board opposite the stiffening plate. The force distributor comprises a spring element comprising a first portion and a second portion with the first portion extending radially outward from the second portion. The spring element is configured for placement so that the first portion is secured to the stiffening plate and the second portion is biased in unsecured, pressing contact against the printed circuit board.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: October 30, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel Lyle Callahan, Raymond Joseph Iannuzzelli, S. Daniel Cromwell, James D. Hensley, Zoila Vega-Marchena
  • Patent number: 7288724
    Abstract: A method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiling substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: October 30, 2007
    Assignee: Sony Corporation
    Inventors: Hiroshi Asami, Hidetoshi Kusano, Yuji Nishitani, Ken Orui
  • Patent number: 7286370
    Abstract: A wired circuit board is provided that is formed by connecting a first wired circuit board and a second wired circuit board, which include a first connection terminal and a second connection terminal, respectively. A solder bump is provided to continuously extend over surfaces of the first connection terminal and the second connection terminal to mechanically couple the first wired circuit board and the second wired circuit board. Consequently, the solder bump is not interposed between opposed surfaces of the first connection terminal and the second connection terminal, thereby allowing the electrical connection provided by the solder bump to be confirmed by visual observation.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: October 23, 2007
    Assignee: Nitto Denko Corporation
    Inventor: Yasunari Ooyabu
  • Patent number: 7285729
    Abstract: A printed circuit board includes circuit lines having different transmission characteristics. In the printed circuit board, mounted components are connected to each other at a plurality of points by an anisotropic conductive film (ACF) adhesion by using a flexible circuit board (FPC) which includes transmission lines formed of circuit line patterns having transmission characteristics optimal to signals. This structure enables the printed circuit board to be easily designed, and be also made smaller.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: October 23, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hajime Gushiken
  • Patent number: 7278184
    Abstract: A slide hinge for a small-sized information terminal having a first casing with keyboard and a relatively slid second casing with display. The slide hinge has a linear slide between the first and second casings, and a turning mechanism for a turning operation of the casings. The slide has a first guide groove provided on an undersurface of the second casing, a guide pin engaged with the first groove and attached to an upper surface of the first casing. The turning mechanism has a rotary hinge on an upper surface of one side of the first casing, a turning member rotatably attached to the rotary hinge in a horizontal direction, and a second pin attached to a free end of the turning member and engaged with a second groove provided on the undersurface of the second casing in cross direction of the first guide groove.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: October 9, 2007
    Assignee: Katoh Electric Machinery Co., Ltd.
    Inventor: Ryuta Kuramochi
  • Patent number: 7280373
    Abstract: A printed board unit includes a mother board 60, and a first board unit 70-1 and a second board unit 70-2 that face each other and are vertically mounted onto the mother board 60 with connector devices 100-1 and 100-2. The first board unit 70-1 has memory mounting boards 81-1 horizontally mounted to a region near the lower end of a vertically standing daughter board 71-1. The second board unit 70-2 has memory mounting boards 81-2 horizontally mounted to a region near the upper end of a vertically standing daughter board 71-2. The memory mounting boards 81-1 of the first board unit 70-1 are arranged on the lower side, while the memory mounting boards 81-2 of the second board unit 70-2 are arranged on the upper side.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: October 9, 2007
    Assignee: Fujitsu Limited
    Inventor: Osamu Aizawa
  • Patent number: 7273379
    Abstract: A hybrid circuit board includes a first circuit board and a second circuit boards. The first circuit board includes a first body having a slot, and a first circuit pattern formed on the first body and extended to the slot. The second circuit board includes a second body, a protruding portion, a second circuit pattern, and a separating member. The protruding portion extends from the second body. The protruding portion is inserted into the slot of the first circuit board to combine the second circuit board to the first circuit board. The second circuit pattern is formed on the second body to be extended to the protruding portion, so that the second circuit pattern is electrically connected to the first circuit pattern of the first circuit board. The separating member is disposed between the second body and the protruding portion to separate the protruding portion from the second body.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: September 25, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeon-Yong Jang, Cheol-Jin Park
  • Patent number: 7262975
    Abstract: A multilayer printed wiring board 10 includes: a build-up layer 30 that is formed on a core substrate 20 and has a conductor pattern 32 disposed on an upper surface; a low elastic modulus layer 40 that is formed on the build-up layer 30; lands 52 that are disposed on an upper surface of the low elastic modulus layer 40 and connected via solder bumps 66 to a IC chip 70; and conductor posts 50 that pass through the low elastic modulus layer 40 and electrically connect lands 52 with conductor patterns 32. The conductor posts 50 have the aspect ratio Rasp (height/minimum diameter) of not less than 4 and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts 50a, which are positioned at external portions of the low elastic modulus layer 40, is greater than or equal to the aspect ratio Rasp of internal conductor posts 50b, which are positioned at internal portions of the low elastic modulus layer 40.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: August 28, 2007
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Toshiki Furutani
  • Patent number: 7259683
    Abstract: A rack has a plurality of LEDs arranged on the front surface thereof correspondingly to respective units. The rack is provided with an LED lighting circuit which lights these LEDs, on the back of a display section and an input section. The LED lighting circuit has an LED lighting control section and a memory. The LED lighting control section acquires correspondence relation information indicating correspondence between servers and apparatuses from the input section, and stores the information in the memory. When a server is selected, the LED lighting circuit lights some of the plurality of LEDs based on the correspondence relation information stored in the memory.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: August 21, 2007
    Assignee: NEC Corporation
    Inventor: Takashi Abe