Interconnection Details Patents (Class 361/803)
  • Patent number: 7633767
    Abstract: A memory module includes a body with a plurality of memory chips mounted thereon and an elongated connector protruding from the body. The elongated connector includes a plurality of single in-line memory module (SIMM)-type contacts at first portions along an edge thereof and a plurality of dual in-line memory module (DIMM)-type contacts at second portions along the edge thereof. The plurality of SIMM-type contacts may be positioned at opposing end portions of the elongated connector, and the plurality of DIMM-type contacts may be positioned between the opposing end portions. Related memory systems including a system board having a socket therein configured to receive the memory module are also discussed.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: December 15, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kee-hoon Lee
  • Patent number: 7626831
    Abstract: A retaining member for a circuit board array is provided. The retaining member includes an elongated support post having a first end and an opposite second end. A protrusion extends from the first end. The protrusion is configured to be received in a slot having side walls in a circuit board array. The support post is movable to move the protrusion within the slot from a first position wherein the protrusion is disengaged from the side walls of the slot to a second position wherein the protrusion engages the side walls of the slot to retain the circuit board array.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: December 1, 2009
    Assignee: Tyco Electronics Corporation
    Inventors: Douglas Sebastian Pfautz, Michael Steven Stanard
  • Patent number: 7623358
    Abstract: An improved I/O device, such as an audio/video router, includes at least a motherboard, such as a matrix board, including a plurality of locating slots and a plurality of connectors located on the motherboard such that when the motherboard is mounted in the I/O device, the plurality of connectors are positioned horizontally across the I/O device. The I/O device further includes a plurality of input/output (I/O) cards, such as audio/video cards, each of the I/O cards including a locating slot and two I/O connectors. In an I/O device of the present invention, the locating slot of each of the I/O cards mates with a respective locating slot of the motherboard such that the two I/O connectors of each of the I/O cards vertically straddle a respective connector of the motherboard thus maximizing a number of inputs and outputs able to be provided in the rear of the I/O device.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: November 24, 2009
    Assignee: Thomson Licensing
    Inventors: Steven Edwin Miller, Scott Raitt
  • Publication number: 20090282674
    Abstract: An electrical interconnecting structure suitable for a circuit board is provided. The electrical interconnecting structure includes a core, an ultra fine pattern, and a patterned conductive layer. The core has a surface, and the ultra fine pattern is inlaid in the surface of the core. The patterned conductive layer is disposed on the surface of the core and is partially connected to the ultra fine pattern. Since the ultra fine pattern of the electrical interconnecting structure is inlaid in the surface of the core and is partially connected to the patterned conductive layer located on the surface of the core.
    Type: Application
    Filed: December 29, 2008
    Publication date: November 19, 2009
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang, David C. H. Cheng
  • Publication number: 20090279274
    Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.
    Type: Application
    Filed: December 22, 2005
    Publication date: November 12, 2009
    Inventors: Martin Joseph Agnew, Gary David Panaghiston, Murray Jerel Niman, Nicholas Chandler
  • Patent number: 7616452
    Abstract: Provided circuit modules employ flexible circuitry populated with integrated circuitry (ICs). The flex circuitry is disposed about a rigid substrate. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. A strain relief portion of the flex circuitry has preferably fewer layers than the portion of the flex circuitry along which the integrated circuitry is disposed and may further may exhibit more flexibility than the portion of the flex circuit populated with integrated circuitry. The substrate form is preferably devised from thermally conductive materials.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: November 10, 2009
    Assignee: Entorian Technologies, LP
    Inventors: James Douglas Wehrly, Jr., Paul Goodwin, Russell Rapport
  • Patent number: 7616446
    Abstract: In a mobile terminal device, at least one heat conduction layer formed of a member, such as copper, aluminum or carbon, being excellent in heat conductivity is provided inside a circuit board on which electronic components are mounted. The heat generated in the electronic components is promptly dispersed in the direction of the face of the circuit board by the heat conduction layer, and transferred from the whole face of the circuit board to the operation member, such as keys, and the housing, and then radiated to the outside. With this structure, the local temperature rise at the operation member and the housing can be suppressed, and the temperature on the surface of the mobile terminal device can be made uniform, without significantly increasing the cost and the thickness of the mobile terminal device. In addition, high-performance electronic components can be used by adopting this structure.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: November 10, 2009
    Assignee: NEC Corporation
    Inventor: Yousuke Watanabe
  • Patent number: 7613012
    Abstract: A standing apparatus for mounting electrical components to a base plate (10), the standing apparatus includes the base plate, a standing member (20), and a clamping member (30). The base plate defines a recess (12) in a first face, and a hole (14) extends through the recess to a second face opposite to the first face. The standing member includes a positioning collar (22) and a standing pillar (24). The standing pillar has a groove (242). The clamping member includes a base portion (32) and a domelike portion (34), the domelike portion has a plurality of spring clips (36), the spring clips encircling the standing pillar and received in the groove of the standing member for retaining the standing member to the base plate.
    Type: Grant
    Filed: September 3, 2007
    Date of Patent: November 3, 2009
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Feng Hung, Chen-Lu Fan, Li-Ping Chen
  • Publication number: 20090268423
    Abstract: Interconnect substrate (1) that connects at least the first circuit board and the second circuit board. Interconnect substrate (1) includes housing (1) and connecting terminal electrodes for connecting the top and bottom faces of housing (10). Housing (10) has protrusion (11) on its outer periphery and opening (13) in its inner periphery.
    Type: Application
    Filed: June 19, 2007
    Publication date: October 29, 2009
    Inventors: Daisuke Sakurai, Masato Mori, Yoshihiko Yagi
  • Publication number: 20090268422
    Abstract: A scalable electronic package assembly for memory devices and other terminated bus structures is disclosed. The scalable electronic package assembly includes a first electronic carrier and a second electronic carrier. The first electronic carrier includes a first set of electronic devices controlled by a controller. The second electronic carrier includes a second set of electronic devices that are also controlled by the controller on the first electronic carrier. The second electronic carrier is electrically connected to the first electronic carrier via multiple solder columns. The second electronic carrier is physically stacked on top of the first electronic carrier via an insulator.
    Type: Application
    Filed: April 29, 2008
    Publication date: October 29, 2009
    Inventors: Mark J. Bailey, Gerald K. Bartley, Richard B. Ericson, Wesley D. Martin, Benjamin W. Mashak, Trevor J. Timpane
  • Patent number: 7606042
    Abstract: Multiple DIMM circuits or instantiations are presented in a single module. In some embodiments, memory integrated circuits (preferably CSPs) and accompanying AMBs, or accompanying memory registers, are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: October 20, 2009
    Assignee: Entorian Technologies, LP
    Inventor: Paul Goodwin
  • Patent number: 7606048
    Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP integrated circuit and a support element CSP integrated circuit are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements. A portion of the flex circuit connected to the support element is folded over the base element to dispose the support element above the base element while reducing the overall footprint. The flex circuit provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB).
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: October 20, 2009
    Assignee: Enthorian Technologies, LP
    Inventors: James W. Cady, James Wilder, David L. Roper, Russell Rapport, James Douglas Wehrly, Jr., Jeffrey Alan Buchle
  • Patent number: 7602613
    Abstract: A flexible circuit has contacts for mounting in a socket or card edge connector. The flexible circuit includes integrated circuit devices mounted on both sides of the edge connector contacts. Preferably, the flexible circuit is wrapped about an edge of a rigid substrate and presents contacts on both sides of the substrate for mounting in a socket. Multiple flexible circuits may be overlaid with the same strategy. The flexible circuit may exhibit one or two or more conductive layers, and may have changes in the layered structure or have split layers.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: October 13, 2009
    Assignee: Entorian Technologies, LP
    Inventors: Paul Goodwin, James W. Cady, Douglas Wehrly
  • Patent number: 7602618
    Abstract: Apparatuses for transferring heat from stacked microfeature devices are disclosed herein. In one embodiment, a microfeature device assembly comprises a support member having terminals and a first microelectronic die having first external contacts carried by the support member. The first external contacts are operatively coupled to the terminals on the support member. The assembly also includes a second microelectronic die having integrated circuitry and second external contacts electrically coupled to the first external contacts. The first die is between the support member and the second die. The assembly can further include a heat transfer unit between the first die and the second die. The heat transfer unit includes a first heat transfer portion, a second heat transfer portion, and a gap between the first and second heat transfer portions such that the first external contacts and the second external contacts are aligned with the gap.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: October 13, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, David R. Hembree
  • Patent number: 7599189
    Abstract: A resin case main body includes a connector housing, a component housing, and a joint portion. A busbar includes a reinforcement plate portion which is orthogonal to a plane of a board and is parallel to an alignment direction of the connector housing, the joint portion, and the component housing. The reinforcement plate portion is formed by insert molding in the joint portion.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: October 6, 2009
    Assignee: Advics Co., Ltd.
    Inventors: Kosei Nishimoto, Koji Yanai, Takahiro Naganuma
  • Patent number: 7596000
    Abstract: The disclosure relates to a signal transmitting apparatus. The signal transmitting apparatus includes a conductor, a first and a second circuit boards, and a signal transmitting medium that is electrically interconnected between the first circuit board and the second circuit board. The signal transmitting medium includes a ground wire and an insulating layer wrapping the ground wire, wherein at least an end portion of the ground wire is not wrapped by the insulating layer and is bent to overlap the insulating layer and electrically connected to the conductor via a conductive adhesive material so as to conduct the electrostatic charges accumulated in the signal transmitting medium to the conductor as a ground.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: September 29, 2009
    Assignee: Lite-On It Corp.
    Inventors: Shih-Lin Yeh, Jung-Fu Chen, Min-Cheng Yang
  • Patent number: 7593239
    Abstract: A fixing device for securing a circuit board to a plate member includes a spacer, a nut member, and a fastener. A coupling hole is defined through the spacer. A female thread is formed on a part of an interior surface of the coupling hole at an end thereof. A nut member comprises a pressing portion and a coupling portion extending from the pressing portion. A male thread is formed on a part of an exterior surface of the coupling portion at a free end thereof, corresponding to the female thread of the coupling hole of the spacer such that the coupling portion is capable of being movably retained in the coupling hole. A threaded hole is defined in the nut member. A fastener includes a head and a threaded rod extending from the head for being screwed in the threaded hole of the nut member.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: September 22, 2009
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Tsung-Hsi Li, Ming-Chih Hsieh
  • Patent number: 7586758
    Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP integrated circuit and a support element CSP integrated circuit are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements. A portion of the flex circuit connected to the support element is folded over the base element to dispose the support element above the base element while reducing the overall footprint. The flex circuit provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB).
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: September 8, 2009
    Assignee: Entorian Technologies, LP
    Inventors: James W. Cady, James Wilder, David L. Roper, Russell Rapport, James Douglas Wehrly, Jr., Jeffrey Alan Buchle
  • Publication number: 20090213563
    Abstract: A device for connecting printed circuit boards. The device comprises an insulative housing and a plurality of conductive terminals arranged in the insulative housing. The insulative housing defines a first mounting surface, a second mounting surface, and flat pickup portions respectively disposed on opposite faces of the first mounting face and the second mounting face; each terminal includes a first leg on the first mounting surface, and a second leg on the second mounting surface.
    Type: Application
    Filed: February 23, 2009
    Publication date: August 27, 2009
    Inventors: De-Jin Chen, Yu-San Hsiao, Meng-Xia Shang
  • Publication number: 20090213562
    Abstract: The present invention relates to an interconnection system of a first substrate (1) comprising at least one first transmission line (3) with a second substrate (10) comprising at least one second transmission line (11), the orientation of the first substrate with respect to the second substrate being arbitrary. The first substrate (1) comprises at least one metallized hole at one extremity of said first line and the second substrate (10) comprises a projecting element extending said second line and a ground saving, said projecting element being inserted into the metallized hole. The invention notably applies in the domain of microwaves and can interconnect a substrate comprising a printed antenna with a substrate receiving the processing circuits of the signal.
    Type: Application
    Filed: February 9, 2009
    Publication date: August 27, 2009
    Inventors: Julian Thevenard, Dominique LO Hine Tong, Ali Louzir, Corinne Nicolas, Christian Person, Jean-Philippe Coupez
  • Patent number: 7572984
    Abstract: An electronic module includes electronic circuitry and first and second connection mechanisms, both operationally connected to the electronic circuitry, for mounting the module in a larger electronic device by different respective methods. Preferably, the first connection mechanism is a robotic connection mechanism such as a BGA with one or more solder balls and the second connection mechanism is a manual connection mechanism such as a plug with one or more electrically conducting pads, both mechanisms being for mounting the module on a PCB.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: August 11, 2009
    Assignee: SanDisk IL Ltd.
    Inventor: Dov Moran
  • Patent number: 7573727
    Abstract: A connecting device for contacting a semiconductor component to at least one further component, the connecting device comprising at least one metal connecting strip extending in a longitudinal direction and having a contact region for mounting on a terminal region of the semiconductor component. In order to achieve a contacting system that can be manufactured inexpensively but can nevertheless carry high current densities, a connecting device is proposed whose contact region is embodied in structured fashion and flexibly with respect to stresses that extend in a terminal plane parallel to the terminal region.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: August 11, 2009
    Assignee: Robert Bosch GmbH
    Inventors: Henning Hauenstein, Dirk Balszunat
  • Publication number: 20090190319
    Abstract: A three-dimensional module having a first substrate holding a function element, and a second substrate holding other components. The first and second substrates are laid one above the other in a three-dimensional fashion, and are electrically and mechanically connected. The module has inter-substrate joining members interposed between the first and second substrates and joining the first and second substrates. Each inter-substrate joining member has a stress-absorption member and an electrically conductive stress-absorption member. The stress-absorption member has elasticity and mechanically joining the first and second substrates. The electrically conductive stress-absorption member connects the first and second substrates and can deform in a desirable direction.
    Type: Application
    Filed: January 22, 2009
    Publication date: July 30, 2009
    Applicant: OLYMPUS CORPORATION
    Inventor: Tomoyuki HATAKEYAMA
  • Patent number: 7566960
    Abstract: A capacitive interposer (caposer) is disposed inside an integrated circuit package between a die and an inside surface of the package. Conductive layers within the caposer constitute a bypass capacitor. In a through-hole caposer, micro-bumps on the die pass through through-holes in the caposer and contact corresponding landing pads on the package. As they pass through the caposer, power and ground micro-bumps make contact with the plates of the bypass capacitor. In a via caposer, power and ground micro-bumps on the die are coupled to power and ground landing pads on the package as well as to the plates of the bypass capacitor by power and ground vias that extend through the caposer. In signal redistribution caposer, conductors within the caposer redistribute signals between die micro-bumps and package landing pads. In an impedance matching caposer, termination structures within the caposer provide impedance matching to a printed circuit board trace.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: July 28, 2009
    Assignee: Xilinx, Inc.
    Inventor: Robert O. Conn
  • Patent number: 7566968
    Abstract: A biosensor that has a smart card configuration includes a semiconductor chip including a bioactive structure and contact areas disposed on a first side of the semiconductor chip, and a rewiring substrate including contact pads, external contact areas and rewiring lines that electrically connect the contact pads to the external contact areas. The rewiring substrate covers a portion of the first side of the semiconductor chip without covering the bioactive structure, such that the rewiring substrate overlaps the contact areas of the semiconductor chip and the contact pads and the contact areas are aligned with and electrically connect to each other. In addition, a measuring apparatus is configured to receive the biosensor and conduct measurements of a fluid medium that is delivered into the measuring apparatus.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: July 28, 2009
    Assignee: Siemens Aktiengesellschaft
    Inventors: Michael Bauer, Bernd Goller, Robert-Christian Hagen, Gerald Ofner, Christian Stuempfl, Holger Woerner
  • Publication number: 20090180260
    Abstract: A memory module, a method for manufacturing a memory module and a computer system is disclosed. One embodiment includes a printed circuit board including a component area and a connector area, wherein a number of signal layers is larger in the component area than in the connector area, the connector area being configured to be plugged into a slot. The memory module further includes memory components mounted on the printed circuit board in the component area.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 16, 2009
    Applicant: QIMONDA AG
    Inventor: Srdjan Djordjevic
  • Patent number: 7561437
    Abstract: An electronic element module and an electronic device using the same are provided. The electronic element module includes a circuit board and a plurality of electronic elements. In one embodiment, the circuit board has a plurality of leg-holes. Each of the electronic elements includes a body and a plurality of legs that connected to the body. Wherein, the bodies of the electronic elements are glued each other, and the legs of the electronic elements are partially plugged in the leg-holes. In another one embodiment, the circuit board has a plurality of contacts. The electronic element is disposed on the circuit board with a gap therebetween. The electronic element has a plurality of terminals that electrically connect to the contacts of the circuit board correspondingly. Otherwise, the gap is filled with glue.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: July 14, 2009
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Liang-Ming Yu, Chien-Lung Tsou, Hsin-Li Lin, Yuming Liu
  • Publication number: 20090175019
    Abstract: [Problem] To enable mounting a part on the rear surface at the back of a connection part on a PCB to be connected with a FPC. [Means for Solving the Problem] Connection parts are provided such that a conductor wiring of a first circuit board and a conductor wiring of a second circuit board are connected with an anisotropic conductive adhesive which is made of an insulative resin including needle-shaped or linear chain-shaped metal powders oriented in a thickness direction, i.e., adhesion direction, and a part is mounted on at least either one of the first and the second circuit boards, the part being mounted on the rear surface at the back opposed to the surface where the connection part is formed.
    Type: Application
    Filed: February 8, 2008
    Publication date: July 9, 2009
    Inventors: Keiji Koyama, Masamichi Yamamoto, Katsunari Mikage, Jin-Joo Park
  • Patent number: 7557304
    Abstract: Closed vias are formed in a multilayer printed circuit board by laminating a dielectric layer to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: July 7, 2009
    Assignee: Motorola, Inc.
    Inventors: Jaroslaw A. Magera, Gregory J. Dunn, Kathy D. Leganski
  • Publication number: 20090168384
    Abstract: An electronic apparatus has a board; a first connection section which is mounted on the board; a component which is selectively mounted on the board; a flexible board which includes a second connection section and a reinforcing plate attached at a position of the second connection section; and a housing cover which includes a projection section which abuts the reinforcing plate in a state in which the second connection section of the flexible board is connected to the first connection section. The reinforcing plate has a length that allows the reinforcing plate to extend on the selectively mounted component in a state in which the second connection section of the flexible board is connected to the first connection section.
    Type: Application
    Filed: August 20, 2008
    Publication date: July 2, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Katsuichi Goto, Hiroshi Yokozawa, Eiji Takizawa
  • Publication number: 20090161331
    Abstract: A circuit board device, a wiring board connecting method, and a circuit board module device are provided for controlling a compression ratio of anisotropically conductive members within an optimal range, for restraining variations in the impact resilient force of the anisotropically conductive members even if an increased number of wiring boards are laminated, for restraining deformations of the wiring board and fluctuations in the impact resilient force of the anisotropically conductive members even if a static external force or the like is applied, for suppressing a linear expansion of the anisotropically conductive members, even if the ambient temperature changes, to increase the stability of electric connections, and for reducing the impact resilient force of the anisotropically conductive members to allow for a reduction in thickness.
    Type: Application
    Filed: May 14, 2007
    Publication date: June 25, 2009
    Inventors: Junya Sato, Nobuhiro Mikami, Shinji Watanabe, Atsumasa Sawada, Nozomu Nishimura
  • Patent number: 7551449
    Abstract: The flexible circuit board according to the present invention includes a plurality of mounting portions which are mounted with electronic circuits respectively, a connector portion that performs signal transmission between the electronic circuit mounted on each of the mounting portions and the electronic circuit device, and coupling portions that couple the respective mounting portions to the connector portion in different directions. The flexible circuit board is mounted on the electronic circuit device in a state of being folded at a predetermined part of one of the coupling portions.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: June 23, 2009
    Assignee: NEC Corporation
    Inventor: Kenichiro Yasui
  • Patent number: 7551453
    Abstract: An optically connectable circuit board and optical components mounted thereon. At least one component includes optical transceivers and provides an optical connection to the board. Electronic components may be directly connected to the board electrically or optically. Also, some electronic components may be indirectly connected optically to the board through intermediate optical components.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: June 23, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ferenc M. Bozso, Philip G. Emma
  • Publication number: 20090154131
    Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.
    Type: Application
    Filed: January 26, 2009
    Publication date: June 18, 2009
    Applicant: IBIDEN CO., LTD.
    Inventors: Naohiro HIROSE, Hitoshi ITO, Yoshiyuki IWATA, Masanori KAWADE, Hajime YAZU
  • Publication number: 20090154130
    Abstract: The micro-sensor includes a first circuit substrate and a second circuit substrate. One surface of the first circuit substrate has an image sensing device electrically connected to main printed wires formed by a first wire group and a second wire group. On the other surface of the first circuit substrate has a main connector electrically connected to the second wire group. A plurality of first signal transmission lines connected to the first wire group. The second circuit substrate has a sub-connector that is electrically connected to sub printed wires having an equivalent number as and corresponding to the second wire group. The other end of the sub printed wires is electrically connected to a plurality of second signal transmission lines. Through connecting the connectors respectively disposed in different circuit boards to overcome the difficulty in the manufacturing process of concentrating all devices on a single circuit board.
    Type: Application
    Filed: April 4, 2008
    Publication date: June 18, 2009
    Applicant: Altek Corporation
    Inventors: Parn-Far Chen, Hsiu-Wu Tung, Chao-Yu Chou
  • Patent number: 7548431
    Abstract: An optically connectable circuit board and optical components mounted thereon. At least one component includes optical transceivers and provides an optical connection to the board. Electronic components may be directly connected to the board electrically or optically. Also, some electronic components may be indirectly connected optically to the board through intermediate optical components.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: June 16, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ferenc M. Bozso, Phillip G. Emma
  • Patent number: 7545651
    Abstract: A memory module according to one implementation includes a support substrate, plural memory devices mounted on the support substrate, and pins having a predetermined arrangement on the support substrate, the pins comprising signal pins connected to the memory devices, power pins, and ground pins. In the predetermined arrangement of pins, each signal pin uses a ground pin as a reference, and each power pin is adjacent a ground pin for reduced impedance between the power pin and ground pin. In some implementations, some of the signal pins are associated with redundant pins.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: June 9, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: June E. Goodwin, Michael C. Day, Brian M. Johnson, John A. Nerl, Richard A. Schumacher, Vicki L. Smith
  • Patent number: 7544898
    Abstract: Providing a method for manufacturing a multilayer wiring board and a touch panel, which does not cause decreasing of yields, reliabilities and productivities even though the materials of each board to be stacked are different, and which manufactures the multilayer wiring board and the touch panel at low cost with high productivities. A multilayer wired board constituting at least part of a electrical circuit board in which a plurality of wired boards are stacked so as to face their wired surfaces each other, wherein: electrical connection parts between the multilayer wired boards are connected through an elastic conductive material part adhered to one of the wired boards; and at least part of a peripheral edge portion of the elastic conductive material part is adhered by a double-sided adhesive material part to seal the plurality of multilayer wired boards.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: June 9, 2009
    Assignee: Sony Corporation
    Inventors: Tomio Hirano, Masao Ono, Nobuyuki Oikawa
  • Patent number: 7542305
    Abstract: A memory module adapted for installation in an open memory socket on a mainboard of a computer. The memory module includes a substrate with an edge connector comprising pins along an edge of the substrate, and at least one memory package mounted to the substrate and containing a memory die electrically connected to input/output leads located along the perimeter of the memory package and through which data signals are transmitted to and from the memory die. Data signal lines electrically connect a plurality of the input/output leads of the memory package to a plurality of the pins of the edge connector. Termination resistors individually electrically connect each of the data signal lines to ground, a supply voltage, or a reference voltage of the memory package so as to reduce noise and signal reflections through the data signal lines.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: June 2, 2009
    Assignee: OCZ Technology Group, Inc.
    Inventors: Ryan M. Petersen, Franz Michael Schuette
  • Publication number: 20090135573
    Abstract: A circuit board device includes: plurality of wiring boards (101 and 102) in which terminals are provided on the front and back surfaces and vias are provided for connecting the terminals together, an anisotropic conductive member (103) arranged between wiring boards (101 and 102) for connecting the electrodes of one wiring board to the electrodes of another wiring board, a functional block (104) composed of a metal material and arranged between the wiring boards (101 and 102) to enclose anisotropic conductive member (103), and a pair of holding blocks (105 and 106) composed of a metal material arranged to clamp the plurality of wiring boards (101 and 102), wherein the plurality of wiring boards (101 and 102), while in a state of being clamped between the pair of holding blocks (105 and 106), is connected together by the anisotropic conductive member (103) and the terminals provided on each of the wiring boards (101 and 102), the functional block (104), and the holding blocks (105 and 106) are electrically co
    Type: Application
    Filed: May 14, 2007
    Publication date: May 28, 2009
    Inventors: Junya Sato, Toru Taura, Nobuhiro Mikami, Shinji Watanabe, Atsumasa Sawada, Nozomu Nishimura
  • Publication number: 20090135572
    Abstract: Provided is a circuit device in which an electronic circuit to be incorporated therein operates stably. A hybrid integrated circuit device includes multiple circuit boards which are disposed on approximately the same plane. An electronic circuit including a conductive pattern and a circuit element is formed on each top surface of the circuit boards. Furthermore, these circuit boards are integrally supported by a sealing resin. Moreover, a lead connected to the electronic circuit formed on the surface of the circuit board is led out from the sealing resin to the outside.
    Type: Application
    Filed: August 30, 2006
    Publication date: May 28, 2009
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Sadamichi Takakusaki, Noriaki Sakamoto
  • Publication number: 20090135575
    Abstract: A semiconductor apparatus includes: first electronic components; a first circuit board, including first electronic component mounting pads on which the first electronic components are mounted; and a second circuit board located above the first circuit board, wherein the first electronic component mounting pads are arranged on a first face of the first circuit board, opposite the second circuit board, and the first circuit board and the second circuit board are electrically connected by internal connection terminals located between the first circuit board and the second circuit board, and wherein a recessed portion is formed in the second circuit board, opposite the first electronic components, in order to provide space to accommodate portions of the first electronic components.
    Type: Application
    Filed: November 25, 2008
    Publication date: May 28, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Atsunori KAJIKI, Sadakazu Akaike, Takashi Tsubota, Norio Yamanishi
  • Publication number: 20090135574
    Abstract: The present disclosure relates to a method of manufacturing a wiring board. The method includes: (a) preparing a first board having a pad; (b) providing an insulating member on the first board, wherein a size of the insulating member is larger than that of the first board, when viewed from the top; (c) forming a via in the insulating member such that the via is directly connected to the pad; and (d) repeatedly forming a wiring layer and an insulating layer on the insulating member in which the via is formed, thereby forming a second board.
    Type: Application
    Filed: November 21, 2008
    Publication date: May 28, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masato TANAKA, Fumihiko Hayano, Toru Hizume
  • Patent number: 7539027
    Abstract: A force distributor is configured for disposition between a printed circuit board and a stiffening plate, which is spaced from the printed circuit board. The force distributor is configured to distribute a compressive force between the printed circuit board, an interposer and a land grid array module carried on a side of the printed circuit board opposite the stiffening plate. The force distributor comprises a spring element comprising a first portion and a second portion with the first portion extending radially outward from the second portion. The spring element is configured for placement so that the first portion is secured to the stiffening plate and the second portion is biased in unsecured, pressing contact against the printed circuit board.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: May 26, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel Lyle Callahan, Raymond Joseph Iannuzzelli, S. Daniel Cromwell, James D. Hensley, Zoila Vega-Marchena
  • Patent number: 7539026
    Abstract: A method of assembling and configuring multiple mezzanine cards on a carrier card is disclosed. The method includes the establishing an I/O profile that represents the I/O configuration of a mezzanine card. The I/O of the mezzanine card is not enabled unless the I/O profile matches a known value stored on the carrier card. In this way, the electronic circuitry is protected if an incorrect mezzanine card is connected to the carrier card.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: May 26, 2009
    Assignee: Technobox, Inc.
    Inventors: Michael James Finnerty, Stefan Gerhard Levie, Joseph Peter Norris, III
  • Publication number: 20090129041
    Abstract: A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs.
    Type: Application
    Filed: September 26, 2008
    Publication date: May 21, 2009
    Inventors: Jung-Chan Cho, Yang-Je Lee, Hyun-Seok Choi, Yong-Hyun Kim, Jung-Hyeon Kim, Hyo-Jae Bang, Do-Hyung Kim, Kyoung-Sun Kim, Young-Ho Lee, Jae-Sang Baik, Yong-Jin Kim
  • Publication number: 20090116206
    Abstract: A portable electronic device includes: a printed circuit board having opposite first and second surfaces and provided with at least one electronic component, the first surface being provided with at least one conductive pad that is electrically coupled to the electronic component; and a flexible circuit board having a main part stacked on the second surface of the printed circuit board, and an extension part extending and folded from the main part and stacked on the first surface of the printed circuit board. The extension part is provided with at least one conductive bump thereon. An outer surface of the main part is provided with at least one input key that is electrically coupled to the conductive bump. The conductive pad is bonded to the conductive bump.
    Type: Application
    Filed: December 20, 2007
    Publication date: May 7, 2009
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL CO., LTD.
    Inventors: Wen-Jen LIAU, Jin-Ching GUO, Ching-Sheng CHANG, Hsin-Shun CHEN
  • Publication number: 20090111295
    Abstract: A riser card (10) includes a card body (11) and a connector (20). The card body defines an opening (12) therein, and has a first side and an opposite second side. The connector is secured in the opening of the card body, and has a first edge connector socket (22) facing away from the second side of the card body, and a second edge connector socket (24) facing away from the first side thereof. The first edge connector socket is located at the first side of the card body for insertion of an edge portion of one peripheral card therein, and the second edge connector socket is located at the second side of the card body for insertion of an edge portion of another peripheral card therein.
    Type: Application
    Filed: March 5, 2008
    Publication date: April 30, 2009
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: ZHAN-YANG LI
  • Patent number: 7525817
    Abstract: A printed circuit board wiring system including a printed wiring circuit board having a plurality of conductive layers, at least one electronic part mounted on one side of the circuit board and configured to output signals via signal lines, and an auxiliary wiring package mounted on the other side of the circuit board and including a plurality of conductive layers configured to allow the signal lines from the electronic part to pass therethrough so as to be connected to the circuit board. Further, a first set of signal lines are immediately drawn from the at least one electronic part using half of the plurality of conductive layers of the circuit board without passing through the auxiliary wiring package, and a second set of signal lines are drawn from the at least one electronic part through the circuit board and the auxiliary wiring package using the other half of the plurality of conductive layers of the circuit board.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: April 28, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Akira Yashiro
  • Patent number: RE41039
    Abstract: A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: December 15, 2009
    Assignee: Entorian Technologies, LP
    Inventor: John A. Forthun