Interconnection Details Patents (Class 361/803)
  • Publication number: 20110069466
    Abstract: A power electronics assembly is provided. A first support member includes a first plurality of conductors. A first plurality of power switching devices are coupled to the first support member. A first capacitor is coupled to the first support member. A second support member includes a second plurality of conductors. A second plurality of power switching devices are coupled to the second support member. A second capacitor is coupled to the second support member. The first and second pluralities of conductors, the first and second pluralities of power switching devices, and the first and second capacitors are electrically connected such that the first plurality of power switching devices is connected in parallel with the first capacitor and the second capacitor and the second plurality of power switching devices is connected in parallel with the second capacitor and the first capacitor.
    Type: Application
    Filed: December 7, 2009
    Publication date: March 24, 2011
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: NICHOLAS HAYDEN HERRON, BROOKS S. MANN, MARK D. KORICH, CINDY CHOU, DAVID TANG, DOUGLAS S. CARLSON, ALAN L. BARRY
  • Publication number: 20110068661
    Abstract: A motor controller includes a first circuit board having a top side, a bottom side, and a first edge. The first circuit board includes a power module extending from the top side of the first circuit board. The motor controller also includes a second circuit board having a top side, a bottom side, and a first edge. The second circuit board includes a plurality of electrical components extending from the top side of the second circuit board. The second circuit board is electrically coupled to the first circuit board by at least one conductor. The first circuit board is physically coupled to the second circuit board such that the bottom side of the second circuit board is adjacent the bottom side of the first circuit board.
    Type: Application
    Filed: September 23, 2009
    Publication date: March 24, 2011
    Inventor: David A. Clendenen
  • Publication number: 20110069465
    Abstract: A printed circuit board (PCB) assembly includes two function boards which can be separated from each other. The PCB assembly can satisfy electronic devices of different dimensions, by arranging the separated function boards in appropriate available space in the electronic devices.
    Type: Application
    Filed: October 15, 2009
    Publication date: March 24, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Ming-Chih HSIEH
  • Publication number: 20110063815
    Abstract: A microcircuit article of manufacture comprises an electrical conductor electrically connected to both a first microcircuit element at a site comprising a first connector site having a first connector site axis and a second microcircuit element at a site comprising a second connector site having a second connector site axis. The first microcircuit element and the second microcircuit element are separated by and operatively associated with a layer comprising a first electrical insulator, whereas the conductor and the first microcircuit element are separated by and operatively associated with a layer comprising a second electrical insulator. At least one of the first electrical insulator layer and the second electrical insulator layer comprise a polymeric electrical insulator. In another embodiment, both electrical insulator layers comprise polymeric insulator layers. The microcircuit includes a UBM and solder connection to a FBEOL via opening.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 17, 2011
    Applicant: International Business Machines Corporation
    Inventors: Minhua Lu, Eric D. Perfecto, David L. Questad, Sudipta K. Ray
  • Publication number: 20110063816
    Abstract: A wired circuit board includes a first wired circuit board provided with a first conductive pattern which has first terminals comprising placement surfaces for placing a meltable metal and first wires continuous with the first terminals; and a second wired circuit board provided with a second conductive pattern which has second terminals connected with the first terminals through the meltable metal and second wires continuous with the second terminals. The first wired circuit board and the second wired circuit board are arranged so that a first plane containing the first terminals and a second plane containing the second terminals are intersected with each other, and the placement surfaces are zoned so as to gradually widen toward the second terminals.
    Type: Application
    Filed: August 25, 2010
    Publication date: March 17, 2011
    Applicant: Nitto Denko Corporation
    Inventors: Hiroyuki Tanabe, Toshiki Naito
  • Publication number: 20110058346
    Abstract: A method provides a first substrate with a conductive pad and disposes layers of Cu, TaN, and AlCu, respectively, forming a conductive stack on the conductive pad. The AlCu layer of the first substrate is bonded to a through substrate via (TSV) structure of a second substrate, wherein a conductive path is formed from the conductive pad of the first substrate to the TSV structure of the second substrate.
    Type: Application
    Filed: November 11, 2010
    Publication date: March 10, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bo-I Lee, Dean Wang
  • Publication number: 20110058348
    Abstract: A semiconductor device includes a first substrate having a power-source line, an IC device mounted on the first substrate and having a power-source line, a second substrate mounted on the IC device and having a base material, a power-source layer formed inside or on a surface of the base material, an insulation layer formed on the power-source layer, and a pad formed on the insulation layer, and a via conductor connecting the power-source layer and the pad. A first route connects the power-source line of the first substrate and the power-source line of the IC device. A second route connects the power-source line of the first substrate and the power-source layer of the second substrate. A third route connects the power-source layer of the second substrate and the power-source line of the IC device.
    Type: Application
    Filed: June 7, 2010
    Publication date: March 10, 2011
    Applicant: IBIDEN CO., LTD.
    Inventors: Atsushi SAKAI, Shinobu Kato, Naoyuki Jinbo
  • Patent number: 7903424
    Abstract: In one embodiment, a holder for holding a flexible printed circuit board includes a main body and at least one securing member. The main body includes a hook portion and a holding member, wherein one of the securing member and the holding member comprises at least one magnet, and the other comprises at least one magnetic portion, at least one magnet or combination thereof such that the securing member capable of being magnetically attached to the holding member.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: March 8, 2011
    Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., Foxconn Advanced Technology Inc.
    Inventors: Cheng-Bin Wu, Ching-Hung Pi
  • Publication number: 20110051389
    Abstract: A board terminal includes a metal wire and concave portions formed on peripheral surfaces along the length of the wire. The metal wire is cut to a predetermined length, and the concave portions are formed by pressing the peripheral surfaces of the wire at intermediate portions along the length thereof.
    Type: Application
    Filed: July 26, 2010
    Publication date: March 3, 2011
    Applicant: SUMITOMO WIRING SYSTEMS, LTD.
    Inventor: Hideki GOTO
  • Patent number: 7897878
    Abstract: A circuit package is provided. The circuit package includes a plurality of electrically conductive pads located on a bottom surface of the circuit package, wherein at least one pad of the plurality of bottom surface pads has a recession for receiving an electrically conductive protrusion located on a substrate to which the circuit package is to be mounted.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: March 1, 2011
    Assignee: International Business Machines Corporation
    Inventors: Paul Coteus, Gareth Geoffrey Hougham, Brian R. Sundlof
  • Patent number: 7897877
    Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: March 1, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Frank D. Egitto, John M. Lauffer, How T. Lin, Voya R. Markovich
  • Patent number: 7894210
    Abstract: Apparatus for retaining a plurality of circuit boards includes a chassis that defines an array of mounting surfaces. Each mounting surface is configured to receive a bracket attached to one of the plural circuit boards. A retention bar is hingingly attached to the chassis at a first axis oriented transversely to the array. A lever is configured to rotate the bar about the first axis from an open position in which the brackets may be engaged with the mounting surfaces, to a closed position in which the bar retains the brackets against the mounting surfaces. An arm is configured to hinge at a second axis and to actuate the lever as the arm is rotated about the second axis.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: February 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Tom J Searby
  • Patent number: 7889512
    Abstract: A technique for observing signaling on the traces between ICs on a PC board without introducing significant signal degradation is provided. A route-through connector footprint allows the use of a standard connector without the use of stub traces. The route-through connector footprint allows a standard connector to be introduced directly into the line traces routed between ICs. Because stub traces are not used, this technique for mechanical interconnection into the line traces on a PC board allows for a single board layout to be used for both test and production. Additionally, because stub traces are not used, signal quality is minimally impacted and testing can be performed at operational speeds improving the reliability of the test function. The use of a route-through connector footprint additionally saves PC board space and cost.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: February 15, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael J. Borsch, Steven R. Klassen, Sanjiv Lakhanpal
  • Publication number: 20110032688
    Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
    Type: Application
    Filed: August 6, 2010
    Publication date: February 10, 2011
    Applicant: ADVANCED PROCESSOR ARCHITECTURES, LLC
    Inventors: Louis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
  • Publication number: 20110032687
    Abstract: A plasma display device is disclosed. In one embodiment, the device includes 1) a plasma display panel (PDP) configured to display an image, 2) a chassis base having first and second surfaces opposing each other, wherein the first surface of the chassis base supports the PDP and 3) a printed circuit board assembly (PBA) formed on the second surface of the chassis base. The PBA includes i) a plurality of electrode pads formed on a surface of the PBA and ii) a plurality of dummy pads interposed between and not electrically connected to neighboring electrode pads. The device further includes a flexible printed circuit (FPC) configured to electrically connect the PBA and the PDP, wherein the surface of the PBA faces the FPC, wherein the FPC contacts i) at least one of the dummy pads and ii) the electrode pads, and wherein the least one dummy pad and the electrode pads have substantially the same height defined from the surface of the PBA to the FPC.
    Type: Application
    Filed: June 23, 2010
    Publication date: February 10, 2011
    Applicant: Samsung SDI Co., Ltd.
    Inventor: Keun-Young SONG
  • Patent number: 7884287
    Abstract: A connecting device for the electrically conductive connection of electronic components and a substrate. The connecting device is formed as a film composite formed of at least one insulating film and at least two electrically conductive films disposed on opposite sides of the insulating film. The film composite is formed as a layer construction of a conductive film alternating with an insulating film, wherein at least one conductive film is structured and thus forms conductor tracks. Furthermore, at least one conductive film of a main area of the film composite is made of a first metal and has at least one film section having a layer of a second metal that is thinner in comparison with the thickness of the first layer.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: February 8, 2011
    Assignee: SEMIKRON Elektronik GmbH & Co. KG
    Inventors: Christian Göbl, Karlheinz Augustin, Thomas Stockmeier
  • Patent number: 7881072
    Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: February 1, 2011
    Assignee: Molex Incorporated
    Inventors: Joseph Ted Dibene, II, David H. Hartke, Carl E. Hoge, Edward J. Derian
  • Patent number: 7881071
    Abstract: A multilayer printed wiring board includes: a build-up layer that is formed on a core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; lands that are disposed on an upper surface of the low elastic modulus layer and connected via solder bumps to a IC chip; and conductor posts that pass through the low elastic modulus layer and electrically connect lands with conductor patterns. The conductor posts have the aspect ratio Rasp (height/minimum diameter) of not less than and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts, which are positioned at external portions of the low elastic modulus layer, is greater than or equal to the aspect ratio Rasp of internal conductor posts, which are positioned at internal portions of the low elastic modulus layer.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: February 1, 2011
    Assignee: IBIDEN Co., Ltd.
    Inventors: Takashi Kariya, Toshiki Furutani
  • Publication number: 20110019384
    Abstract: A printed circuit board assembly includes a central board and a peripheral board. The central board comprises a first connector, and is mounted with one or more of a CPU, memory, a north bridge chipset, and a south bridge chipset. The peripheral board is separated from the central board. The peripheral board comprises a second connector, and is mounted with a power source connector, a video chipset, an audio chipset, and a network card. The second connector is connected to the first connector to achieve communication between the central board and the peripheral board. The first connector and the second connector transmits one or more of DVP signals, VGA signals, SATA signals, LCD controlling signals, audio signals, speaker output signals, PCIE signals, LPC signals, PCI signals, video general input/output signals, USB signals between the central board and the peripheral board.
    Type: Application
    Filed: October 29, 2009
    Publication date: January 27, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIEN-CHIH KAO, CHIA-WEN HUANG
  • Patent number: 7876573
    Abstract: A stacked mounting structure includes a first substrate, a second substrate, and an intermediate substrate which has a space accommodating therein components to be mounted. A first contact (connecting) terminal and a second contact (connecting) terminal are formed on the first substrate and the second substrate, and have a wire which is formed on a side surface of the intermediate substrate. By formation of the intermediate substrate to be on an inner side than an edge surface of the substrates, a part of the two contact terminals respectively are exposed. One end of the wire is connected to an exposed portion of the first contact terminal, and the other end of the wire is connected to an exposed portion of the second contact terminal.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: January 25, 2011
    Assignee: Olympus Corporation
    Inventors: Hiroyuki Motohara, You Kondoh, Mikio Nakamura, Takanori Sekido, Shinji Yasunaga
  • Patent number: 7876578
    Abstract: An insertion slot shielding mechanism for an electronic device is used to shield an insertion slot provided in an opening of a casing of an electronic device. The insertion slot shielding mechanism includes a shielding means and an elastic pushing piece. The shielding means corresponds to the opening and is slidably connected to the opening of the casing. One end of the elastic pushing piece is connected to a side wall within the electronic device corresponding to the opening of the casing, and the other end thereof is kept to abut against the shielding means. The elastic force of the elastic pushing piece allows the shielding means to be located in a position to shield the opening of the casing.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: January 25, 2011
    Assignee: Altek Corporation
    Inventor: Feng Chang
  • Patent number: 7875805
    Abstract: The invention provides a warpage-proof circuit board structure, including: an inner layer circuit board; at least one dielectric layer formed on at least one surface of the inner layer circuit board; at least one first groove formed in the at least one dielectric layer corresponding in position thereto; a solder mask formed on the surface of the dielectric layer, a second groove formed in the solder mask and corresponding in position to the first groove formed in the dielectric layer; and a metal frame formed in the first and second grooves and protruding from the surface of the solder mask, thereby strengthening the circuit board to prevent it from warping in thermal processing and further using the metal frame as a heat-dissipating means for the package structure.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: January 25, 2011
    Assignee: Unimicron Technology Corp.
    Inventor: Wei-Hung Lin
  • Patent number: 7869223
    Abstract: A multilayered module board with mounted high-frequency electronic components such as a CPU and a graphic circuit is mounted on one face of a base board with mounted low-frequency electronic components. The multilayered module board is a squared multilayered board smaller than the base board. The electronic components are wired with an inner layer-wiring pattern. Connector terminals are solder-jointed to four sides of the multilayered module board. The multilayered module board is mounted to the base board via the connector terminal.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: January 11, 2011
    Assignee: Xanavi Informatics Corporation
    Inventor: Hirohisa Miyazawa
  • Publication number: 20100331738
    Abstract: A sensing insert device (100) is disclosed for measuring a parameter of the muscular-skeletal system. The sensing insert device (100) can be temporary or permanent. Used intra-operatively, the sensing insert device (100) comprises an insert dock (202) and a sensing module (200). The sensing module (200) is a self-contained encapsulated measurement device having at least one contacting surface that couples to the muscular-skeletal system. The sensing module (200) comprises one or more sensing assemblages (1802), electronic circuitry (307), and communication circuitry (320). An interconnect stack within the sensing module (1700) couples at least one circuit board (1612 and 1616) to one or more sensing assemblages (1802). The interconnect stack includes at least one flexible interconnect (1506) that couples to the circuit board (1612 and 1616). The flexible interconnect (1506) can be in a path for conducting an energy wave through the sensing assemblage (1802).
    Type: Application
    Filed: June 29, 2010
    Publication date: December 30, 2010
    Applicant: OrthoSensor
    Inventors: Marc Stein, James Ellis
  • Publication number: 20100328920
    Abstract: A high-speed transmission circuit board connection structure includes a first high-speed transmission circuit board including a laminated substrate including a first signal transmission wiring formed on a surface thereof and a ground plane formed inside thereof, a second high-speed transmission circuit board including a circuit substrate and a second signal transmission wiring formed on a surface of the circuit substrate, a conductive board connecting member for fixing the first and second high-speed transmission circuit boards to a surface thereof, and a bonding wire for electrically connecting the first signal transmission wiring and the second signal transmission wiring. The ground plane is exposed on a side end face of the laminated substrate, and a conductive film is formed on the side end face such that the ground plane of the first high-speed transmission circuit board is electrically connected to the board connecting member with the conductive film.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 30, 2010
    Applicant: Hitachi Cable, Ltd.
    Inventors: Masayuki Nikaido, Yoshiaki Ishigami, Kenichi Tamura, Takehiko Tokoro
  • Patent number: 7859856
    Abstract: A protocol analyzer for analyzing traffic on a bus. A tap card is used to tap into a bidirectional bus. The tap provides a pass through connection from the card to the host and taps off of the bus. While tapping off the bus, stubs lengths are minimized and input capacitance is minimized. A repeater that preferably has no internal termination provides a differential input and a differential output or a single ended output. The bus lines are input to one of the inputs in the differential inputs and a reference voltage is provided to the other differential input. The reference voltage enables the tap to determine if the data is high or low. A jumper is also included in the tap such that the reference voltage can be selected from the host or from the pod.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: December 28, 2010
    Inventor: Eric J. Lanning
  • Patent number: 7859858
    Abstract: In accordance with an example embodiment, there is disclosed herein an apparatus comprising a top case having a top surface and a side surface and a bottom case having a bottom surface and a side surface. The top case comprises a flange protruding from the side surface, the flange having at least one extended surface. The bottom case has an aperture having portions extending from the bottom surface to the side surface. The portion of the aperture extending along the bottom surface is configured to have sufficient width to allow the entire flange to pass through. The side surface of the bottom case has a vertical post such that the base section of the flange passes through the portion of the aperture on the side surface while vertical post retains the at least one extended surface.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: December 28, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: George Youzhi Yi, Po-Chiang Tseng, Ming-Chien Chiu
  • Publication number: 20100321916
    Abstract: An FPC and another circuit board having terminals parts where a plurality of conductive interconnects are arranged are prepared. An adhesive film is arranged between the terminal part of the FPC and the terminal part of the circuit board to form a stack. A rigid head having a pushing face on which a plurality of convex parts are formed is used to hot-press the stack from the FPC side to soften the adhesive film and locally expel the softened adhesive film at the locations pressed by the convex parts of the rigid head.
    Type: Application
    Filed: February 4, 2009
    Publication date: December 23, 2010
    Inventor: Yasuhiro Yoshida
  • Publication number: 20100321915
    Abstract: An arrangement including a first circuit board having a contact surface for contacting of a connecting element, a second circuit board, and a connecting element. The contact surface has a central contact point and a concentric ring surrounding the central contact point. The connecting element which is electrically contacted at a first side with the second circuit board and which at a second side in opposite relationship to the first side includes a first spring element at least one second spring element. The first spring element is electrically contacted with the central contact point of the first circuit board and the at least one second spring element is electrically contacted with the concentric ring of the first circuit board.
    Type: Application
    Filed: November 3, 2008
    Publication date: December 23, 2010
    Applicant: CINTERION WIRELESS MODULES GMBH
    Inventors: Ralf Wendler, Jorg Romahn, Annette Bolcke
  • Publication number: 20100296258
    Abstract: An electronics module is provided for utilization onboard an airborne object. In one embodiment, the electronics module includes a housing having a cavity therein, a first printed circuit board (PCB) disposed in the cavity, a second PCB disposed in the cavity above the first PCB, and a supportive interconnect structure. The supportive interconnect structure includes a substantially annular insulative body and a plurality of vias. The substantially annular insulative body extends around an inner circumferential portion of the housing between the first PCB and the second PCB to support the second PCB and to axially space the second PCB from the first PCB. The plurality of vias is formed through the substantially annular insulative body and electrically couples the first PCB to the second PCB.
    Type: Application
    Filed: May 21, 2009
    Publication date: November 25, 2010
    Applicant: RAYTHEON COMPANY
    Inventor: Chris E. Geswender
  • Patent number: 7839657
    Abstract: A circuit board assembly includes a mother board and a daughter board. The daughter board is defined by a plurality of frangible connections to the mother board and is disposed on a common plane with the mother board. After all the electronic devices are installed to the mother board and the daughter board on a common plane the frangible connections are broken to allow the daughter board to be moved to a desired position relative to the mother board. The electrical conductors that connect the daughter board to the mother board are semi-rigid to provide movement while maintaining a desired position of the daughter board relative to the mother board.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: November 23, 2010
    Assignee: Continental Automotive Systems US, Inc.
    Inventor: Thomas H. Nodine
  • Publication number: 20100289500
    Abstract: A substrate includes a first plate member; a plurality of first electrodes provided on the major surface of the first plate member, the first electrodes including at least one electrode for circuit connection and at least one monitor electrode separate from the electrode for circuit connection; a second plate member; a plurality of second electrodes provided on the major surface of the second plate member; a plurality of solder members provided between the first electrodes and the second electrodes for electrical connection therebetween, repeatedly; and a detector for detecting an electrical disconnection between at least one of the monitor electrode and the second electrode.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 18, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Nobutaka Itoh, Makoto Sakairi, Mami Nakadate
  • Publication number: 20100284161
    Abstract: There is provided a stacked mounting structure in which, it is possible to carry out testing of each substrate after the formation of (after manufacturing) the stacked mounting structure.
    Type: Application
    Filed: July 21, 2010
    Publication date: November 11, 2010
    Applicant: OLYMPUS CORPORATION
    Inventor: Hiroyuki MOTOHARA
  • Publication number: 20100277885
    Abstract: A circuit connecting material which is situated between mutually opposing circuit electrodes and, upon pressing the mutually opposing circuit electrodes, electrically connects the electrodes in the pressing direction, the circuit connecting material having a laminated construction comprising an anisotropic conductive adhesive layer A with conductive particles 21 dispersed therein and an insulating adhesive layer B, wherein the adhesive force of the insulating adhesive layer B for glass substrates is greater than the adhesive force of the anisotropic conductive adhesive layer A for glass substrates.
    Type: Application
    Filed: December 16, 2008
    Publication date: November 4, 2010
    Applicant: HITACHI CHEMICAL COMOANY, LTD.
    Inventors: Takashi Tatsuzawa, Kouji Kobayashi, Akihiro Ito
  • Publication number: 20100277884
    Abstract: The circuit-connecting material of the invention is a circuit-connecting material for connection between a first circuit member having a first circuit electrode formed on the main side of a first board, and a second circuit member having a second circuit electrode formed on the main side of a second board, with the first circuit electrode and the second circuit electrode laid facing each other, the circuit-connecting material comprising a film-forming material, a curing agent that generates free radicals upon heating, a radical-polymerizing substance, an isocyanate group-containing compound and a ketimine group-containing compound represented by the following general formula (I), wherein the isocyanate group-containing compound content is 0.1-5 parts by weight and the ketimine group-containing compound content is 0.1-5 parts by weight with respect to 100 parts by weight as the total of the film-forming material and radical-polymerizing substance.
    Type: Application
    Filed: September 29, 2008
    Publication date: November 4, 2010
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Motohiro Arifuku, Kouji Kobayashi, Kazuyoshi Kojima, Nichiomi Mochizuki, Sunao Kudou
  • Publication number: 20100265685
    Abstract: The present invention provides a wiring-connecting material comprising from 2 to 75 parts by weight of a polyurethane resin, from 30 to 60 parts by weight of a radical-polymerizable substance and from 0.1 to 30 parts by weight of a curing agent capable of generating a free radical upon heating, and a process for producing a wiring-connected board by using the wiring-connecting material. The wiring-connecting material of the present invention may preferably further contain a film-forming material and/or conductive particles.
    Type: Application
    Filed: June 28, 2010
    Publication date: October 21, 2010
    Inventors: Tohru Fujinawa, Masami Yusa, Satoyuki Nomura, Hiroshi Ono, Itsuo Watanabe, Motohiro Arifuku, Hoko Kanazawa
  • Publication number: 20100254109
    Abstract: A mount assembly includes a member in which a mount component is mounted at least on one main face of the member and at which a member connecting electrode is formed; and a connection member that has a pillar-shaped parallel portion arranged so that a longitudinal direction of the parallel portion is parallel to the main face of the member, one end side of the parallel portion being connected to the member connecting electrode.
    Type: Application
    Filed: March 19, 2010
    Publication date: October 7, 2010
    Applicant: OLYMPUS CORPORATION
    Inventors: Mikio Nakamura, Takanori Sekido
  • Patent number: 7804695
    Abstract: The present invention relates to an interconnection system of a first substrate (1) comprising at least one first transmission line (3) with a second substrate (10) comprising at least one second transmission line (11), the orientation of the first substrate with respect to the second substrate being arbitrary. The first substrate (1) comprises at least one metallized hole at one extremity of said first line and the second substrate (10) comprises a projecting element extending said second line and a ground saving, said projecting element being inserted into the metallized hole. The invention notably applies in the domain of microwaves and can interconnect a substrate comprising a printed antenna with a substrate receiving the processing circuits of the signal.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: September 28, 2010
    Assignee: Thomson Licensing
    Inventors: Julian Thevenard, Dominique Lo Hine Tong, Ali Louzir, Corinne Nicolas, Christian Person, Jean-Philippe Coupez
  • Patent number: 7800919
    Abstract: A programmable routing module is disclosed for interconnecting field wiring with a control system. The routing module includes a field connection to connect field signals from a controlled process to the routing module, an I/O connection to connect I/O signals from the control system to the routing module, and a configurable interconnection system that selectively couples particular field and I/O signals with one another.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: September 21, 2010
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: John D. Crabtree, Jerry L. Penick, Gregg M. Sichner, David S. Wehrle
  • Patent number: 7800918
    Abstract: There is provided a memory module that facilitates meeting the needs of high-speed performance and large capacity. It comprises first module substrates (101 through 108), each with multiple DRAM devices (11), and a second module substrate whereon the first modules (101 through 108) are mounted, signal line groups connected to the multiple first modules respectively are provided in parallel, and a controller LSI (50), connected to the multiple first modules respectively via the signal line groups provided in parallel, that converts the signal lines into fewer signal lines than the total number of the signal line groups and outputs the result is provided, and the second module substrate (20) is mounted on a motherboard (40).
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: September 21, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Takanori Saeki
  • Patent number: 7796399
    Abstract: A multichip module comprises a multilayer substrate circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The conductive patterns include a series of electrical contacts adjacent to one edge of the substrate. The substrate is bonded to two rigid frames, one on each opposite surface. Each substrate has a series of castellations on one edge that are aligned and electrically connected to the respective contacts on the substrate, preferably by soldering. The castellations can serve as a self-aligning mechanism when the module is brought into contact with a low-profile pin array, and the module may be held in place on a motherboard by guide rails in a socket that engages the edges perpendicular to the castellated edge of the module. The module may further be provided with protective heat spreading covers.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: September 14, 2010
    Assignee: Microelectronics Assembly Technologies, Inc.
    Inventors: James E. Clayton, Zakaryae Fathi
  • Patent number: 7796400
    Abstract: An apparatus and method is disclosed that allows for the arranging in a three dimensional array semiconductor chips on a circuit board. A unique chip carrier is disclosed on which any IC chip can be positioned on above the other on a circuit board. Additionally, the carrier allows for the testing of IC chips on the carrier and underneath it without having to remove the carrier and chips from the system even if they are of the BGA or CSP type. The carrier includes exposed test points to allow an on site test.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: September 14, 2010
    Assignee: Legacy Electronics, Inc.
    Inventors: Kenneth J. Kledzik, Jason C. Engle
  • Publication number: 20100225364
    Abstract: A stacked semiconductor device includes a plurality of stacked chips, each having a plurality of elements to receive a signal. At least one first ladder main signal line for receiving the signal is arranged to pass through the chips. At least one second ladder main signal line is arranged to pass through the chips. A plurality of ladder buffers buffer the signal applied from the first ladder main signal line to the second ladder main signal line. The signal is uniformly distributed to the stacked chips using a ladder type circuit network technique.
    Type: Application
    Filed: May 17, 2010
    Publication date: September 9, 2010
    Inventor: Young-Don Choi
  • Patent number: 7791900
    Abstract: A galvanic isolator having a split circuit element, a polymeric substrate, a transmitter and receiver is disclosed. The split circuit element has first and second portions, the first portion being disposed on a first surface of the substrate and the second portion being disposed a second surface of the substrate. The transmitter receives an input signal and couples a signal derived from the input signal to the first portion. The receiver is connected to the second portion of the circuit element and generates an output signal that is coupled to an external circuit. The galvanic isolator can be economically fabricated on conventional printed circuit board substrates and flexible circuit substrates.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: September 7, 2010
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Julie E. Fouquet, Gary R. Trott
  • Patent number: 7791891
    Abstract: A module includes an electrical component having an inner enclosure which surrounds the electrical component and which has first electrical contact means at least on one outer side; having an outer enclosure in the interior of which the inner enclosure is situated, the outer enclosure having second electrical contact means, the second electrical contact means extending from the interior to at least one outer side of the outer enclosure. The first and second contact means are interconnected.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: September 7, 2010
    Assignee: Robert Bosch GmbH
    Inventors: Christian Ohl, Frieder Haag, Juergen Kurle, Ingbert Gerngross
  • Publication number: 20100220457
    Abstract: To provide a connecting portion of a circuit board and a circuit board-connecting structure, in which connecting portions can be positively connected together, and also a connecting process can be simplified. In a circuit board-connecting portion 10, a first connecting portion 15 and a second connecting portion 20 are disposed in facing relation such that first conductors 14 contact second conductors 19, and also a first substrate 12 and a second substrate 17 are fixed to each other by an adhesive 22. The first connecting portion 15 has rigid members 24 provided at a reverse surface 12B of the first substrate 12 which is a soft substrate, and the rigid members 24 are disposed along a direction of a thickness of the first substrate 14, and are provided at positions corresponding to at least parts 14A of the first conductors 14.
    Type: Application
    Filed: February 3, 2006
    Publication date: September 2, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Hidetsugu Mukae, Hiroyuki Suzuki
  • Patent number: 7787254
    Abstract: A multichip module comprises: a first rigid member defining one outer wall of a chamber; a second rigid member defining the opposite wall of the chamber; a sealable interface joining the first and second rigid members at their peripheries, whereby a hollow chamber is formed; a flex circuit having a plurality of integrated circuit chips disposed thereon, the flex circuit affixed to at least one of the first and second rigid members; electrical contacts at least partially extending outward through the sealable interface; and, a fluid inlet and a fluid outlet configured to permit fluid to flow through the chamber whereby heat generated by the integrated circuit chips may be removed from the module.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: August 31, 2010
    Assignee: Microelectronics Assembly Technologies, Inc.
    Inventors: James E. Clayton, Zakaryae Fathi
  • Publication number: 20100208444
    Abstract: The circuit-connecting material for connection between circuit members each having a board and a circuit electrode formed on the primary surface of the board, comprising an adhesive composition that cures in response to light or heat and an organic compound containing a urethane group and an ester group.
    Type: Application
    Filed: April 29, 2010
    Publication date: August 19, 2010
    Applicant: Hitachi Chemical Company, Ltd.
    Inventors: Motohiro Arifuku, Nichiomi Mochizuki, Takashi Nakazawa, Kouji Kobayashi, Tohru Fujinawa, Takashi Tatsuzawa
  • Patent number: 7778042
    Abstract: A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: August 17, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Jun Lee, Joo-Sun Choi, Kyu-Hyoun Kim, Kwang-Soo Park
  • Patent number: 7778041
    Abstract: A power interconnection system is provided including a printed circuit board (10), a voltage regulator package (30), and an electrical connection socket (20) adapted for receiving a chip package (40) therein. The electrical socket and the voltage regulator package are mounted and electrically coupled to opposite surfaces of the printed circuit board. Thus, the voltage regulator package and the chip package are held in a substantially opposed relationship relative to the printed circuit board after the chip package is mounted onto the socket. Therefore, with such configuration, a lower impedance connection is achieved between the chip package and the voltage regulator package in comparison with the conventional configuration.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: August 17, 2010
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: David Gregory Howell, Genn-Sheng Lee