Abstract: A digital converter including a first adjustment unit and a first transient detection unit. The first adjustment unit adjusts amplitude of an electrostatic discharge (ESD) pulse to generate a first adjustment signal when an ESD event occurs in a first power line and a second power line is at a complementary level. The first transient detection unit generates a first digital code according to the first adjustment signal.

Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.

Abstract: A device for protecting electronic modules in a multivoltage on-board electrical wiring system comprising a first accumulator of a low on-board electrical wiring system voltage, against short circuits after a high on-board electrical wiring system voltage, consisting of a transistor whose drain-source path is inserted between the control device connection and the electronic module connection. The source connection of the transistor is linked to the electronic module connection. A gate resistor and a diode guiding the current in the direction of the plus pole of the first accumulator are parallel-mounted between the gate connection of the transistor and the plus pole of the accumulator. A Zener diode is arranged between the gate connection and source connection of the transistor.

Abstract: A method and apparatus for mitigating dynamic overvoltage (DOV) in an AC network. A distribution and power transformer has its primary connected to the high voltage bus of the network and its secondary connected to a switching device. Upon the occurrence of a condition known to cause a DOV and the DOV a control system cause the switching device to change from a nonconductive mode to a conductive mode in less than the time for one cycle of the operating frequency of the AC network. This change in switching device conduction places a short circuit across the transformer secondary.

Abstract: A system includes a driving device operating at first supply voltage Vdd1 and having a CMOS output. A driven devise operates at a second supply voltage Vdd2 lower than the first supply voltage Vdd1, and has a CMOS input with an NMOS pull-down transistor. A protection circuit includes a first resistor coupled to the CMOS output of the driving device and a gate of the NMOS pull-down transistor. A parasitic NPN bipolar junction transistor has a drain connected to the gate of the NMOS pull-down transistor sad a source coupled to a lower-voltage supply rail VSS. A second resistor connects a gate of the parasitic NPN bipolar junction transistor to Vss. The second resistor has a resistance sized for controlling a trigger voltage of the parasitic NPN bipolar junction transistor for protecting a gate oxide layer of the NMOS pull-down transistor from an electrostatic discharge.

Abstract: The present invention provides an ESD protection circuitry in a semiconductor integrated circuit (IC) having protected circuitry to prevent false triggering of the ESD clamp. The circuitry includes an SCR as an ESD clamp having an anode adapted for coupling to a first voltage source, and a cathode adapted for coupling to a second voltage source. The circuitry also includes at least one noise current buffer (NCB) coupled between at least one of a first trigger tap of the SCR and the first voltage source such that the first trigger tap of the SCR is coupled to a power supply.

Abstract: A circuit for protecting a semiconductor device from electrostatic discharge by protecting an internal circuit from electrostatic current flowing into an input/output pad includes a first discharge unit that discharges the electrostatic current to a first power supply line or a second power supply line. A second discharge unit protects the internal circuit from electrostaticity flowing from the input/output pad or the second power supply line. A power clamp unit discharges the electrostatic current, which is discharged to the first power supply line or the second power supply line by the first discharge unit, to the opposite power supply line. A trigger unit drives the first discharge unit and the power clamp unit with first and second detection voltages generated in response to a voltage drop of the discharged electrostatic current.

Abstract: A method includes receiving an activation signal at a semiconductor device and generating an output power signal at the semiconductor device in response to receiving the activation signal. The output power signal has a duty cycle. The method also includes providing the output power signal to a load. The output power signal provides power to the load. An amount of power provided to the load is based on the duty cycle of the output power signal. In addition, the method includes adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device.

Abstract: A bus driver device is provided with a bus driver circuit connected to a bus line and a overvoltage protection section connected between the bus line and a power supply line. The overvoltage protection section has an overvoltage protection function for the bus line. Further, the bus driver device is provided with a switching circuit for on/off-controlling the overvoltage protection function based on a voltage of the bus line and a voltage of the power supply wiring.

Abstract: A circuit for electrostatic discharge (ESD) protection includes a resistor a capacitor connected in series with the resistor, a first transistor including a gate, the gate being connected to a first power supply providing a first voltage to the gate via the resistor and a first terminal connected to the first power supply, a second transistor including a gate, the gate being connected to a second power supply, the second power supply providing a second voltage smaller than the first voltage, the second transistor having a first terminal connected to a second terminal of the first transistor, and a third transistor including a gate, the gate being connected to the second power supply, a first terminal of the third transistor being connected to a second terminal of the second transistor, and a second terminal being connected to a reference voltage different from the first voltage and the second voltage.

Abstract: A secondary battery protection circuit may include an over voltage detector circuit configured to monitor a voltage level of an associated cell of a rechargeable battery and provide an output signal to a switch in response to a comparison of the voltage level of the cell to an over voltage threshold level. The switch may be coupled between the rechargeable battery and a DC power source and capable of moving between conducting and non-conducting states. The switch may also be responsive to the output signal to protect the rechargeable battery if the voltage level of said cell is greater than the over voltage threshold level for a time interval less than or equal to a transient time interval.

Abstract: The present invention discloses a tie-off circuit coupled between a first potential and a gate of a MOS device whose source is connected to a second potential. The tie-off circuit includes at least one resistor and at least on diode. The resistor is coupled between the gate of the MOS device and the first potential for preventing the gate of the MOS device from floating during a normal circuit operation. The diode is coupled between the gate of the MOS device and the first potential, in parallel with the resistor, for reducing a voltage difference across a gate oxide layer of the MOS device during an electrostatic discharge (ESD) event, thereby protecting the same from ESD damage.

Abstract: The overvoltage and/or undervoltage protection device (1, 2) of this invention provides a novel way in solving the problems faced by user of an existing electrical installation zone when the user adds overvoltage and/or undervoltage protection feature into the existing electrical installation. One of the key features of the invention is the tripping initiation circuit (11) that simulates an earth leakage condition to trip the earth leakage protection device (41, 42) installed in the existing electrical installation zone when an overvoltage and/or undervoltage condition is detected by the decision logic (12) of the overvoltage and/or undervoltage protection device (1, 2) of this invention. The single phase overvoltage and/or undervoltage protection device (1) of this invention can be packaged as a three-prong plug to facilitate the use of the device while, the three phase overvoltage and/or undervoltage protection device (2) can be packaged as a single DIN rail mounted device.

Abstract: In a composite electrical circuit protection device, thermal coupling between a planar PPTC element and a planar MOV element is controlled by insertion of a thermal mass material for regulating heat transfer from the MOV element to the PPTC element, such that a PPTC resistor hot zone forms consistently away from the planar major foil electrode confronting the MOV thereby regulating heat transfer from the MOV to the PPTC resistor.

Abstract: A circuit for voltage transient protection is provided. The circuit includes a voltage divider, a low-voltage reset circuit, and an input transistor. The input transistor receives an input voltage at the source of the input transistor, and provides a protected input voltage at the drain of the input transistor. The voltage divider provides a threshold voltage from the input voltage. The low-voltage reset circuit receives the threshold voltage. The low-voltage reset circuit causes the gate and source of the input transistor to short together when the low-voltage reset circuit is not in a reset state.

Abstract: Disclosed are an electric energy storage device having a good cycle characteristic and a temperature characteristic and a method of charging and discharging the electric energy storage device. The electric energy storage device including a capacitor and a secondary battery combined in series is provided. When the capacitor of the electric energy storage device is an electric double layer capacitor, the capacitor is used to the voltage of OV or less to increase an available energy usage.

Abstract: Included are a Zener diode D2 having a cathode connected onto a voltage output line, dividing resistors having one terminal connected to the anode of the Zener diode D2 and having the other terminal grounded, a transistor Q1 having a base connected to the junction point between the dividing resistors via a resistor and having an emitter grounded, a transistor Q2 having a base connected to the junction point between the dividing resistors and having an emitter grounded, and a microcomputer having an undervoltage detection terminal 10a which is connected to the collector of the transistor Q1 and to which 3.3 V is externally applied and a power supply terminal 10b which is connected to the collector of the transistor Q2 and via which a P-ON-H signal of 3.3 V that starts a power supply circuit 126 when the power supply is turned on is transmitted.

Abstract: An IC power protection circuit functions as a surge protection circuit and reverse connection protection circuit. The IC power protection circuit includes an error amplification circuit, positioned and integrated within an integrated circuit and a transistor positioned as a stand-alone element that is separate from the integrated circuit. The integrated circuit includes a sensor signal processing circuit that processes a signal of a sensor. A transistor protects the integrated circuit against a surge voltage from a battery terminal. A resistor is positioned between an output terminal of an error amplifier and a base terminal of the transistor to provide reverse connection protection. Another resistor is connected between a ground and a connection point between the above resistor and the output terminal to provide overvoltage protection for the integrated circuit. A starting resistor is connected between a collector and base of the transistor.

Abstract: An overvoltage protection device is adopted, which is provided with a conductive polymer that runs away thermally when the resistance value becomes V2/P or higher, given that the power consumption when actuated is P and the voltage of the secondary battery cell when fully charged is V.

Abstract: Systems, circuits, and methods are described for providing efficient, monitoring capabilities for providing output reactive to monitored conditions. According to the disclosed methods, steps are included for providing a floating gate monitoring circuit in association with a monitored circuit and programming the floating gate to a selected charge level. The programmed floating gate charge level is then compared with a signal level in a monitored circuit. In an additional step, selected comparison criteria are used for selectably activating output. Exemplary embodiments of methods and associated circuits and systems employing the methods are also disclosed, in which protection for a monitored circuit is provided in the event of undervoltage, undercurrent, overvoltage, or undervoltage.

Abstract: An ESD protection substrate is disclosed. The ESD protection substrate includes a first conductor, a second conductor, a pointed structure, and an ESD protection material. The pointed structure is electrically connected to the first or the second conductor. The ESD protection material is disposed between the first and the second conductors.

Abstract: An apparatus and method for high-voltage transient blocking employing a transient blocking unit (TBU) that has at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the p-channel device and a bias voltage Vn of the n-channel device in concert. Specifically, the bias voltages are altered such that the p-channel device and n-channel device mutually switch off to block the transient. The depletion mode n-channel device employs a set of cascaded low-voltage depletion mode field effect transistors (FETs) such as metal-oxide-silicon field effect transistors (MOSFETs) connected source-to-drain to achieve the desired high-voltage operation of the TBU.

Abstract: A protection circuit for intrinsically safe electromagnetic actuators operating on the voltage from a power unit (1) approved for underground mining, for switching electrohydraulic valves (5) in underground mining, comprising at least two spaced-apart short-circuit means (14, 16 or 16A) connected in parallel with the electromagnetic actuator coil (11) for short-circuiting the coil in the event of a reversal of the coil voltage. According to the invention, at least one of the short-circuit means comprises a short-circuit semi-conductor switch (16 or 16A) and a voltage-reversal detecting circuit (30) for activating the short-circuit semiconductor switch (16).

Abstract: A pair of back-to-back-coupled zener diodes is coupled from the input to the output of each leg of a common mode choke used in a LC circuit for reducing EMI into the power supply of an electrical device. The reversed biased zener diode of each pair breaks down when ringing voltage amplitude resulting from a voltage surge applied at the inputs of the common mode choke exceeds the breakdown threshold voltage of the zener diode. Transorb devices may be substituted for the back-to-back-coupled diode pairs.

Abstract: Various embodiments of an input protection circuitry may be configured with a variable tripping threshold and low parasitic elements, which may prevent a signal from propagating into the protected equipment/device if the voltage of the input signal exceeds a certain limit. The input protection circuit may operate to protect a measurement instrument, which may be an oscilloscope, early in the signal path leading into to the instrument, to avoid exposing sensitive circuitry to damaging voltage levels, and without introducing significant parasitic elements that would degrade the performance of the instrument. The protection circuit may be configured to include clamping to provide protection during the circuit response delay time. The input protection threshold of the protection circuit may be adaptive to a selected voltage range on the instrument without trading-off instrument performance and features.

Abstract: The present invention discloses a computer apparatus with over-voltage protection function, wherein the over-voltage protection device is electrically connected between the central processing unit (CPU) and the power supply to protect the CPU from damage under the condition of over-voltage failure.

Abstract: An over-voltage protection circuit assembly includes a connector and an over-voltage protection circuit. The connector includes a power terminal. The over-voltage protection circuit includes a voltage input terminal, and a voltage output terminal. The voltage output terminal connected to the voltage input terminal via a resistor. A relay includes an inductance coil and a switch. The inductance coil is connected between the voltage input terminal and ground. A warning unit is connected in series with the switch of the relay between the voltage input terminal and ground. A voltage regulating diode is connected between the voltage output terminal and ground. The anode of the voltage regulating diode is connected to ground, and the cathode of the voltage regulating diode is connected to the voltage output terminal.

Abstract: An overvoltage protection element, with a housing, at least one overvoltage-limiting component in the housing, two connecting elements for electrical connection of the overvoltage protection element to the path to be protected, and an electrically conducting disconnection element in electrically conductive contact with the first connecting element at one end and with a solder connection to the overvoltage-limiting component at another end, the solder connection separating when a temperature threshold of the overvoltage-limiting component is exceeded so that a resulting disconnection point, formed electrically isolates it.

Abstract: A driver circuit includes an output, at least one transistor including a load section coupled between the output and a supply voltage, and a circuit coupled to a control terminal of the at least one transistor to apply a control voltage to the control terminal in at least one operation mode of the driver circuit. The control voltage is within a predetermined voltage range de-pending on a first predetermined voltage below a nominal voltage range of the output.

Abstract: An analog or digital circuit that senses both low and high input voltage and operates to disconnect both line and neutral electrical power connections to a protected device when abnormally low or high voltages are received from a single- or multi-phase power source, and reconnects the protected device when input power has stabilized. The sensing circuit and power supply is functional with voltages up to at least 240 Vac. The nominal 120 Vac circuit is designed to withstand a 6 kilovolt surge without damage. The apparatus does not disconnect the ground line during an out-of-tolerance voltage condition.

Abstract: A system and method for conditioning an alternating current (“AC”) power transmission for supply to a load circuit.

Abstract: A method and apparatus for embedding over-limit voltage detector and recording mechanisms on the silica wafer of integrated circuits to detect, protect and record voltage overages of pre-set voltage limits is presented. A detector circuit and a recorder circuit are placed in series or in parallel on the electrical connections between the integrated circuit devices and the voltage pins connected to outside power sources. When a voltage source is connected and an over-voltage condition is detected, the detector circuit short-circuits the connection while the recorder circuit records the event for later investigation.

Abstract: A surge protection circuit comprises a surge detection circuit 14 for detecting a surge applied to a semiconductor integrated circuit, and a protection element 15 for absorbing the surge. The protection element is connected between a signal terminal for supplying a signal to the semiconductor integrated circuit and a power source terminal for supplying a power source voltage. When the power source voltage is not larger than a voltage enough to normally operate the semiconductor integrated circuit and the surge detection circuit does not detect the surge, the protection element is set in a current limiting state. When the power source voltage is not larger than a voltage enough to normally operate the semiconductor integrated circuit and the surge detection circuit detects the surge, the protection element is set in a current non-limiting state.

Abstract: An embodiment of a protection circuit, comprising a first PNP-type bipolar transistor and a second NPN-type bipolar transistor, the base of the first transistor being connected to the collector of the second transistor and the collector of the first transistor being connected to the base of the second transistor, in which a MOS transistor is connected between the collector and the emitter of the second transistor.

Abstract: An electrostatic discharge protection circuit includes a high-voltage supply terminal (VDD), an input/output (IO) pad, and a first shunting transistor that can discharge electrostatic charges between the IO pad and VDD in response to a control signal. A trigger circuit can output the control signal in response to an electrostatic voltage between the IO pad and VDD. The electrostatic discharge protection circuit also includes a first group of serially connected diodes, which includes a first end connected to the IO pad and a second end configured to supply power to the trigger circuit.

Abstract: In an active matrix type liquid crystal display panel of the invention, an inner shorting line that is thicker than the scan lines and picture lines is disposed so as to surround the periphery of a display area included in the liquid crystal display panel; the scan lines are each connected to first electrostatic prevention circuits and bundled by a first shorting wire; the first shorting wire is connected to the inner shorting line via at least one among second electrostatic prevention circuits; a common potential line that is thicker than the inner shorting line is disposed around the outer periphery of the inner shorting line; and at least one connection is provided between the inner shorting line and common potential line, electrically connecting each to the other.

Abstract: A current-limiting surge protection device is provided. The current-limiting surge protection device includes a pair of series connected normally on MOSFET's and a pair of voltage controlled normally off switches that are disposed to monitor a voltage across the normally on MOSFET pair. Here, the voltage controlled normally off switches close according to an excess threshold voltage across the MOSFET pair and reduces a gate drive potential of the normally on MOSFET pair to limit a current through the normally on MOSFET pair.

Abstract: In a semiconductor device including a semiconductor element to be protected having first and second electrodes, and a protection circuit coupled between the first and second electrodes, a switch circuit is inserted between the first and second electrodes in series to the protection circuit. The switch circuit is turned ON by such a voltage that turns ON the semiconductor element.

Abstract: An ESD protection circuit for a transistor having a drain and source coupled to high-speed signaling pins of an integrated circuit includes a first string of clamping elements and a second string of clamping elements. The first string of clamping elements has a collective capacitance less than the capacitance of a single clamping element. The first string of clamping elements is operably coupled to the drain and source of the transistor and conducts when a first polarity ESD voltage is applied to the high-speed pins. The second string of clamping elements has a collective capacitance less than the capacitance of one clamping element. The second string of clamping elements is operably coupled to the drain and source of the transistor and conducts when a second polarity ESD voltage is applied to the high speed signaling pins.

Abstract: An interface system may be used to connect an electrical device to an electrical bus. The interface system may include a first end and a second end in electrical communication with the first end. Where the interface system is used to connect an electrical device to an electrical bus, the first end may be connected to the electrical bus and the second end may be connected to the electrical device. The interface system may also include a reverse current blocking circuit configured to block current from flowing from the second end to the first end. Additionally, the interface system may include a discharge circuit electrically connected between the first end and the second end for discharging the blocked current.

Abstract: A surge protection apparatus connected between an electrical power line source and a load includes a voltage input, an inductor, and a protective barrier. The voltage input is coupled to the electrical power line. The inductor is coupled between the voltage input and the load. The protective barrier is interposed between the inductor and the load, and is configured to physically isolate the inductor from the load.

Abstract: A power supply controller method and apparatus measuring impedance is disclosed. An apparatus according to aspects of the present invention includes a sense circuit coupled to a sense terminal. A regulation circuit coupled to the sense circuit and coupled to regulate the sense terminal to a first voltage level when a current flowing through the sense terminal is less than a first threshold current level. The regulation circuit is further coupled to regulate the sense terminal to a second voltage level when the current flowing through the sense terminal reaches the first threshold current level. A response circuit is coupled to the sense circuit and is responsive to the current flowing through the sense terminal when the sense terminal is regulated at the second voltage level.

Abstract: A switching device for disconnecting and switching at least one line of a power supply is disclosed. The switching device may be, for example, a residual-current-operated protective device or a combination switch and includes a line-voltage-independent trigger device, a trigger element, such as a trigger relay, associated with the line-voltage-independent trigger device, as well as a line-voltage-dependent trigger device. The line-voltage-dependent trigger device has means for triggering the trigger element that is associated with the line-voltage-independent trigger device. The switching device has a simple construction, a reduced number of components, and also an enhanced functional reliability compared to a conventional switching device.

Abstract: An electrostatic discharge (ESD) protection circuit and a method for reducing capacitance in the ESD protection circuit. A pair of gated diodes are connected in series, wherein the anode of one of the gated diodes is coupled to a lower voltage supply node and the cathode the other gated diode is connected to the upper voltage supply node. The commonly connected anode and cathode of the series connected gated diodes are connected to an input/output pad and to receiver and driver circuitry. The gates of the gated diodes are connected together. A gate biasing circuit is connected to the gates of the gated diodes. The gate biasing circuit applies a voltage to the gates of the gated diodes and depletes their channel regions of charge carriers, which lowers the capacitances of each gate diode.

Abstract: An electronic system can include a switch and a regulator coupled to the switch. The switch can be used to deliver electricity from a first terminal to a second terminal. The switch can also be used to prevent the second terminal from having a level that is higher than a predefined operation level limit by controlling the status of the switch according to a supply signal at the first terminal. The regulator can be used to adjust a regulated signal at the second terminal according to the supply signal.

Abstract: A power semiconductor device is provided with an output transistor, a load control circuit, and a pull-up circuit. The output transistor is connected between a power supply terminal provided to receive a power supply voltage and an output terminal to be connected with a load. The load control circuit is adapted to feed the gate voltage to the gate of the output transistor. When short-circuiting of the load occurs, the load control circuit stops feeding the gate voltage to the output transistor. The pull-up circuit is connected between the power supply terminal and the gate of the output transistor. The pull-up circuit is adapted to discharge electric charges on said gate of said output transistor, when short-circuiting of the load occurs with the voltage level on the power supply terminal lowered than the power supply voltage.

Abstract: A power amplifier protection circuit that includes protection circuitry to variably shunt an input radio frequency (RF) signal to AC ground, turn off bias to an output transistor of a power amplifier, and turn off the output transistor. The power amplifier protection circuit features an asymmetrical control that can quickly shut off a power amplifier, and turn on the power amplifier at a steady, controlled rate when an output transistor exceeds a predetermined threshold voltage.

Abstract: An electronic trip unit for a circuit breaker, the electronic trip unit includes a rating plug having a plurality of switches each configured to indicate a specified current rating for the rating plug and for selectively supplying a current rating for the electronic trip unit, a processing unit which receives and reads a value of the selected current rating from the rating plug upon power-up, and a gain control unit including a plurality of gain circuits. Each of the gain circuits including a plurality of gain switches set by the processing unit based upon the selected current rating, to control a gain of input current of the electronic trip unit.

Abstract: A safety switch device for switching a power supply for a load on and off, having at least one driveable switching element, in particular a relay, and a safety circuit for checking a switching state of the switching element. The switching element is in the form of a changeover switch in such a manner that a first contact is electrically connected to either a second contact or a third contact by means of a switching operation. A method for operating a safety switch device is also provided.

Abstract: An ESP protecting circuit and a manufacturing method thereof are provided. The ESP protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a third high-concentration impurity region of a complementary type, first and second conductive wells, and a fourth conductive impurity region. The ESD protecting circuit is configured as a field transistor without a gate electrode, and the high breakdown voltage characteristics of the field transistor are lowered by implanting impurity ions, providing an ESD protecting circuit with a low breakdown voltage and low leakage current. Because the leakage current is reduced, the ESD protecting circuit can be used for an analog I/O device that is sensitive to current fluxes. Also, an N-type well may protect a junction of the field transistor.