Abstract: Circuitry on integrated circuits usually includes protection against electrostatic discharge (ESD) events. A second ESD current path may be provided in addition to a first ESD current path for shunting ESD current away from circuitry to be protected during an ESD event. In addition to the standard power and ground buses used to provide power and ground voltages to the protected circuitry, one or more extra power and/or ground buses and associated circuitry may be added for improved ESD protection.

Abstract: An integrated circuit chip comprising a number of semiconductor components exhibiting parasitic components through which a short-circuit between the circuit supply voltage and ground could occur, wherein said semiconductor components are distributed in elementary blocks, each elementary block being independently connected, for its power supply, to the supply or ground lines of the main supply network of the integrated circuit by a current-limiting device capable of stopping a short-circuit starting in the considered block, and each block being sized so that logic errors occurring in this block are correctable by error-correction means.

Abstract: An electrostatic discharge (ESD) protection device includes an I/O terminal structure and a current discharge structure. The current discharge structure includes a conductive region separated from a bridge region by a gate electrode, a well region formed below the conductive region, another well region separated from the well region by another conductive region, and multiple additional conductive regions implementing dual current discharge paths through another well region.

Abstract: Stacked SCR's are disclosed with a resistor connecting an internal portion of the upper SCR to an internal portion of the lower SCR. The anode of the protective circuit is connected to a contact on a target circuit to be protected and the cathode of the protective circuit is connected to ground or a reference voltage on the target circuit. The anode voltage is directed to the lower SCR via the resistor such that when the voltage on the anode reaches the triggering voltage of the lower SCR, that SCR triggers and that triggering triggers the upper SCR, such that the stacked SCR's both trigger and thereby limit the voltage between the anode and the cathode and thereby protecting the target circuit.

Abstract: An auto-detecting input circuit is operative to sustain relatively high voltages applied to an input pad and generate corresponding signal levels at a native supply voltage range. The input circuit includes floating wells, corresponding bias selectors, and input biasing transistors to ensure that no gate oxide exposed to external voltages sustains a voltage greater than a predefined value. Bias selectors select an available highest voltage to reverse bias corresponding floating wells and ensure transistors are not electrically overstressed. As input-related terminals experience switching related voltages, the bias selectors select alternate terminals to continue selection of the highest voltage available and provide correct reverse biasing conditions. A resistor and clamp generate translated output voltage levels limited to the native supply voltage range. A latch is triggered by a first input signal excursion above the native supply voltage.

Abstract: The present invention is an overvoltage protection and automatic re-strike circuit for an electronic ballast. The electronic ballast has an inverter, a shut-down circuit, a safety circuit, a monitoring circuit, and an overvoltage protection circuit. The inverter provides an appropriate alternating current power supply to operate the lamp. The shut-down, safety, monitoring, and overvoltage protection circuits are coupled to the inverter and provide the overvoltage protection and automatic re-striking functions. During an overvoltage condition, the overvoltage protection circuit will temporarily disable the inverter. Subsequent to the overvoltage condition, the overvoltage protection circuit permits the inverter to attempt to re-ignite the lamp. After a predetermined number of unsuccessful re-ignition attempts, the safety circuit will permanently disable the inverter to avoid damage to the ballast.

Abstract: A circuit arrangement for protection against electrostatic discharges comprises a diverting element, which is connected between a first and a second terminal and has a control input, via which the diverting element can be controlled into the conducting state. Moreover, trigger elements are provided, which have a trigger output for outputting a trigger signal in a manner dependent on a voltage between the first and the second terminal. The circuit arrangement furthermore comprises at least one amplifier unit, which is coupled to one of the trigger outputs on the input side and to the control input on the output side.

Abstract: A multi-mode electrostatic discharge (ESD) circuit for a semiconductor chip comprises first and second ESD diodes. In a first mode, a body voltage greater than a power source voltage of the semiconductor chip is applied to the first ESD diode and a body voltage less than a ground voltage of the semiconductor chip is applied to the second ESD diode. In a second mode, a body voltage substantially equal to the power source voltage of the semiconductor chip is applied to the body of the first ESD diode and a body voltage substantially equal to the ground voltage of the semiconductor chip is applied to the second ESD diode.

Abstract: Problems can be solved about reducing the maximum voltage, reducing the size and cost, and so on. According to the invention, three or more discharge units are connected in series between two conductors. Two or more clamping type overvoltage protective units (hereinafter referred to as “clamping units”) are connected in parallel to the discharge units except one or more of the discharge units. The overall operating voltage of the discharge units arranged in parallel to all the clamping units is set lower than any voltage obtained by subtracting from the operating voltage of each clamping unit, the spark-over voltages of the other discharge units connected in parallel to the clamping unit. The overall operating voltage of the discharge units connected in parallel to all the clamping units is set higher than the operating voltage of each discharge unit connected in series to any one of the clamping units.

Abstract: An electronic apparatus that includes: a circuit board; a switch attached to the circuit board; an electronic part mounted on the circuit board; a wiring pattern extending between the switch and the electronic part; and a protrusion protruding from a surface of the wiring pattern, the protrusion being disposed adjacent to the switch on the circuit board and overlapping the wiring pattern.

Abstract: A circuit that protects from high power-on in-rush currents and short circuits. The circuit has a pass transistor and a parallel smaller transistor. A comparator senses when an output voltage crosses a reference and turns off the pass transistor and turns on the parallel smaller transistor. The parallel smaller transistor has a higher “on” resistance so that the short circuit or the in-rush current does not harm the electronics. When the short circuit or in-rush current condition is removed, the comparator senses this condition and returns to the normal operation where the pass transistor is on and the parallel small transistor is off.

Abstract: To prevent an electrostatic damage on a display device formed with a driving circuit. Protective circuits are provided not only at input terminal parts, but also at intermediate parts of a circuit or at the ends of wiring lines. Otherwise, the protective circuits are provided at the ends of the wiring lines and at the places immediately before and after the input terminals, respectively, and then the circuit is interposed therebetween. Further, the protective circuits are provided around a circuit with a large current consumption.

Abstract: A device for protection against voltage surges, comprising: a first spark gap (E1); a first pre-triggering system (2), electrically connected to the first spark gap (E1), so as to enable its being primed; a control device (4) electrically connected to the first pre-triggering system (2) so as to activate same. The invention is characterized in that it comprises at least a second spark gap (E2) mounted parallel to the first spark gap (E1), and electrically connected to a second pre-triggering system (3), such that the control device simultaneously activates the first and the second pre-triggering systems (2, 3), so as to trigger simultaneously the first and second spark gaps (E1, E2). The invention also concerns devices against voltage surges.

Abstract: In one embodiment, a protection circuit includes a linear regulator remains enabled during a portion of a time while limiting an output voltage of the linear regulator to a first value.

Abstract: An ESD protection circuit (710) is guarded by a parallel first precharge elimination circuit (720) relative to an I/O pad (721) and a parallel second precharge elimination circuit (730) relative to a VDD pad (731). The precharge elimination circuits are synchronized with the ESD protection circuit to eliminate any precharge voltage to ground before an ESD pulse affects the I/O pad or VDD pad. A diode (722) is connected between I/O pad and VDD. Circuit (720) is between I/O pad and ground (740) and is powered by the same VDD. Circuit (720) includes a first resistor (723), a first nMOS transistor (724), and a first RC timer including a second resistor (725) and a first capacitor (726). Circuit (730) includes a third resistor (733), a second nMOS transistor (734), and a second RC timer including a fourth resistor (735) and a second capacitor (736).

Abstract: According to an exemplary embodiment, an integrated circuit includes a first circuit block having a first power bus. The integrated circuit further includes a second circuit block having a second power bus, where the first power bus is isolated from the second power bus. The integrated circuit further includes a first dedicated ESD bus, where the first dedicated ESD bus provides a discharge path from the first power bus to the second power bus and from the second power bus to the first power bus. The first power bus can be coupled to the first dedicated ESD bus by a first pair to bi-directional diodes, and the second power bus can be coupled to the first dedicated ESD bus by a second pair of bi-directional diodes.

Abstract: An ESD protective circuit having a contact terminal, a first supply voltage terminal for a first supply potential, a second supply voltage terminal for a second supply potential, a transistor chain having several transistors, wherein drain terminals of the transistors are connected to one of the supply voltage terminals, wherein the control terminal of a first transistor of the transistor chain is connected to the other supply voltage terminal, wherein the source terminal of the last transistor of the transistor chain is connected to the contact terminal, and a current source which is connected to a source terminal of at least one of the transistors of the transistor chain and is able to provide a current which compensates, up to a maximum tolerable voltage deviation from the first or second supply potential at the contact terminal, a current flowing into or from the source terminal.

Abstract: A load drive circuit which can operate at high speed with low consumption current while performing the gate-to-source over voltage protection for its load driving field-effect transistor. A Zener function device is connected between the gate and the source of the load driving field-effect transistor, and an on/off-switch circuit to supply either on-potential or off-potential to the gate of the field effect transistor is provided. The current flowing through the Zener function device when the load driving field-effect transistor is conductive is limited by the on/off-switch circuit.

Abstract: A device for providing transient voltage suppression on a Power over Ethernet system is provided. The device includes a transient voltage suppression module. The transient voltage suppression module includes a circuit module, which includes a circuit board and input and output connectors. One or more transient voltage suppression modules may be mounted to a frame to form a transient voltage suppression patch panel, which, in turn, may be mounted to a rack for use in a telecommunications room. The circuit board combines a frequency-variable impedance connected between conductors in a pair and a voltage-variable impedance connected to the frequency-variable impedance, where the voltage-variable impedance is also connected to a chassis and/or an electrical ground.

Abstract: A method and a circuit for preventing snap-back current in NMOS transistors of MOS integrated circuits are provided. Example embodiments may include preventing snap-back current in a circuit including a first NMOS transistor having an associated parasitic bipolar transistor. A second NMOS transistor may be connected in series with the first NMOS transistor. A gate node of the second NMOS transistor may be coupled to a bias node, such that the second NMOS transistor in conductive (ON) state. An auxiliary circuit coupled to a source node of the first NMOS transistor may be configured to provide a bias potential at the source node of the first NMOS transistor, when the first NMOS transistor is in a non-conducting state (OFF).

Abstract: A circuit arrangement for protecting an integrated semiconductor circuit includes a protection circuit connected between an element to be protected and a reference potential. The protection circuit includes a thyristor structure. The circuit arrangement also includes a control circuit configured to drive the protection circuit by generating a plurality of control signals drive an active element of the protection circuit.

Abstract: A battery circuit includes a monitoring circuit, an integrator circuit, and a comparator. The monitoring circuit can be used to monitor a cell and generate a monitoring signal indicating a cell voltage of the cell. The integrator circuit accumulates a difference between the monitoring signal and a first predetermined threshold over a time period to generate an integrating output. The comparator compares the integrating output to a second predetermined threshold and generates a control signal.

Abstract: Disclosed herein is a power switching module for a battery module assembly constructed in a structure in which a plurality of rectangular battery modules, each having a plurality of battery cells or unit modules connected in series to each other, are stacked in the width direction (the longitudinal direction) and the height direction (the transverse direction) by at least twos such that the rectangular battery modules generally constitute a hexahedral structure (hexahedral stack), outer edges of the hexahedral stack are fixed by a frame member, and input and output terminals of the rectangular battery modules are oriented such that the input and output terminals of the rectangular battery modules are directed toward one surface (a) of the hexahedral stack, wherein the power switching module comprises an insulative substrate mounted to the surface (a) of the hexahedral stack in a coupling fashion, elements mounted on the insulative substrate for controlling voltage and current during the charge and discharge o

Abstract: An electrostatic discharge device includes a first protection element including a MOS transistor type first diode, which provides a first capacitor including a first insulation layer, and provides a first path between an input/output pad and a power supply voltage line using the first diode, for discharging static electricity, a second protection element providing a second path between the input/output pad and a ground voltage line for discharging the static electricity, a trigger circuit including a resistor that is connected in series to the first capacitor, and a power clamp element providing a third path for discharging the static electricity between the power supply voltage line and the ground voltage line by a voltage applied to the resistor.

Abstract: An energy storage cell pack cradle assembly for holding multiple rows of energy storage cells oriented along a dominant axis of vibration includes a first cradle member including a plurality of energy storage cell body supporting structures including respective holes; a second cradle member including a plurality of energy storage cell body supporting structures including respective holes; and one or more fasteners connecting the first cradle member and the second cradle member together. The energy storage cell body supporting structures are configured to structurally support the energy storage cells, with the energy storage cells oriented along a dominant axis of vibration, by energy storage cell bodies of the energy storage cells with respective electrically conductive terminals extending through the respective holes without structural support of the electrically conductive terminals by the cradle members.

Abstract: A semiconductor device includes an output transistor which controls a power supply to a load according to a control voltage applied to a gate thereof, a voltage control circuit coupled between the gate and a drain of the output transistor, the voltage control circuit having a conduction state controlled according to a potential difference between a source and the drain of the output transistor, and a voltage control detection circuit which outputs a voltage control detection signal on a basis of the conduction state of the voltage control circuit.

Abstract: A method of tripping a circuit breaker including sampling an AC line voltage at regular intervals during a first time period to generate a plurality of AC line voltage samples. Each sample of the set of AC line voltage samples is summed to generate a voltage area value. A controller determines whether the voltage area value exceeds a threshold. In response to the voltage area value exceeding the threshold, an amount determined as a function of the voltage area value is added to a count value. The circuit breaker is caused to trip in response to the count value equaling or exceeding a maximum count value. An improper line-to-neutral voltage can be detected by monitoring the line-to-neutral voltage and comparing it to a function such as a trip curve. Thus, components downstream from a circuit breaker, as well as the circuit breaker itself, can be protected from prolonged exposure to improper voltages, which can lead to component failure.

Abstract: A battery protection and monitoring system includes a plurality of MAFET (Mechanically Actuated Field Effect Transistor) switches, wherein each MAFET switch among the MAFET switches is capable of switching from an open switch condition to a closed switch condition or vice versa, such that the plurality of MAFET switches are connectable to a battery. Such a system further includes one or more transistors associated with and which communicate electrically with at least one MAFET switch among the MAFET switches. A PPTC (Polymeric Positive Temperature Coefficient) device is also associated with the transistors and the MAFET switches, such that the PPTC device, the MAFET switches and the transistors operate in association with one another and the open switch condition or the closed switch condition of the plurality of MAFET switches to identify, monitor and thus prevent at least one dangerous condition associated with the battery.

Abstract: The invention provides a novel broadband power limiter having improved frequency characteristics and power capacity, suitable for use with GaAs low-noise amplifier circuits. The power limiter includes a shunt diode circuit and two impedance transformers. The first transformer is a step-down impedance transformer connected between the shunt diode circuit and the input to the limiter, and the second transformer is a step-up impedance transformer connected between the shunt diode circuit and the output of the limiter. The invention further provides a method for limiting the power of an input signal, comprising the steps of: transforming the input signal from the input impedance to an intermediate impedance; shunting a portion of the input signal to ground; and transforming a remaining portion of the input signal from the intermediate impedance to an output impedance.

Abstract: A disclosed overvoltage protection circuit includes a power source input terminal of an electronic device, the power source input terminal being configured to receive a power source voltage; an internal power source terminal configured to supply power to internal circuits of the electronic device; a voltage blocking circuit connected between the power source input terminal and the internal power source terminal, the voltage blocking circuit being configured to prevent the power source voltage received at the power source input terminal from being provided; and a constant voltage output unit connected in parallel with the voltage blocking circuit, the constant voltage output unit being configured to output a constant voltage. In the event that the power source voltage received at the power source input terminal is higher than or equal to a predetermined voltage, the voltage blocking circuit blocks the power source voltage received at the power source input terminal.

Abstract: Methods and apparatus for enabling internal circuitry associated with a device to be efficiently replaced in an operating environment for the device are disclosed. According to one aspect of the present invention, a device includes an enclosure that defines an interior of the device, and a circuit arrangement that is located in the interior. A data port interface is located in the interior, and the device also includes a receptacle and a protection circuitry arrangement. The receptacle is coupled to the circuit arrangement, and the protection circuitry arrangement provides protection to the circuit arrangement. The protection circuitry arrangement has an interface that is removably coupled to the receptacle such that at least a portion of the protection circuitry arrangement is contained in the interior of the device.

Abstract: A safety device can provide electrical shock protection for an electrical appliance. Voltage sensors can monitor voltage levels among a power conductor, a neutral conductor, and a ground conductor. When sensed voltages indicate that these conductors are properly wired to an electrical power utility, inline switches can close to allow power to pass through the safety device to the appliance. When one or more of the sensed voltages indicates that the power level is too low to operate the appliance, one or more switches of the safety device can open to block power from passing through to the appliance. When one or more of the sensed voltages indicates that an electrical problem posing a shock hazard exists in the electrical appliance, one or more switches of the safety device can open to interrupt power from transmitting to the appliance.

Abstract: To provide an overcurrent protection apparatus which can surely protect a load circuit from an overcurrent with a simple configuration.

Abstract: A powered device includes a first supply terminal, a second supply terminal, and at least one input pin coupled to the first supply terminal. The powered device further includes an external capacitor having a first terminal coupled to the first supply terminal, a switch coupled to the second supply terminal and coupled to a second terminal of the external capacitor, and power surge detection logic coupled to the switch. The external capacitor is charged in response to a detected power surge that exceeds a threshold.

Abstract: An electro-static discharge protection circuit including: a first input terminal and a second input terminal; a first output terminal coupled to the first input terminal, and a second output terminal coupled to the second input terminal; a first circuit branch connected between the first input terminal and the second input terminal, said first circuit branch including at least one first Zener diode having a cathode terminal and an anode terminal; a second circuit branch connected between the first output terminal and the second output terminal, wherein the first circuit branch comprises a load element coupled between the second input terminal and the anode terminal of the at least one first Zener diode; the second circuit branch includes a first transistor having a control terminal adapted to receive a transistor control voltage, the first transistor being coupled to the load element so as to receive from the load element the transistor control voltage.

Abstract: Over-voltage indicator and related circuit and method. The over-voltage indicator can work with an I/O circuit of a chip for detecting over-voltage in an I/O pad and providing an indication signal accordingly. When over-voltage does not happen, the over-voltage indicator continues to detect a signal level of the I/O pad and keeps the indication signal low. Once over-voltage is detected, the over-voltage indicator pauses detecting, asserts a high level in the indication signal, and periodically resumes detecting until end of over-voltage is detected. With informing provided by the indication signal, a core cell of the chip can perform proper operation to reduce potential damage caused by over-voltage.

Abstract: This invention discloses a charging/discharging protective circuit for a secondary battery pack, having an over-charging/discharging voltage comparator, a reference voltage source and a battery status decision circuit. There is also a sampling circuit having a sequential pulse generator for generating pulses for selecting one of the batteries in the battery pack for testing purposes. The pulse generator provides M-channel gating pulses to the selection circuit of the battery under test and provides sampling pulses to the over-charging/discharging voltage comparators. The reference voltage source has a regulated output circuit. This invention uses time division inspection methods to provide a cost-effective solution for inspecting batteries in a battery pack.

Abstract: An overvoltage protection element, provided as a component of a medical device (3) used on or in a human or animal body, reduces power absorption upon application of an external overvoltage signal having chronological rising and/or decay characteristic at an interface (15) of the medical device (3). The overvoltage protection element has reshaping means (17) which convert the external overvoltage signal at the interface (15) into an internal voltage pulse, and limiting means (19) which limit a voltage drop on at least one electronic component of the medical device to a predetermined limiting value.

Abstract: A power supply device having an overvoltage cutoff function, an image display device, and a method of cutting off overvoltage are provided. The power supply device includes a switch unit which cuts off a power supply to the power supply device; and an overvoltage sensing unit which compares a voltage of the power supply device with a specified reference voltage, and if the voltage of the power supply device is higher than the specified reference voltage, generates an overvoltage cutoff signal to control the switch unit. The overvoltage cutoff signal is used to report a power supply cutoff state. Accordingly, the damage of the power supply device due to an unstable AC input voltage can be prevented and the user can be alerted to the overvoltage through the display of the power supply cutoff state.

Abstract: Device for protecting an integrated circuit, comprising a device for detecting a latch-up condition, and a supply voltage control device for controlling a supply voltage of the integrated circuit, to modify a parameter of the supply voltage of the integrated circuit in order to prevent the latch-up from becoming permanently established.

Abstract: A circuit capable of providing electrostatic discharge (ESD) protection, the circuit comprising a first set of power rails comprising a first high power rail and a first low power rail, a first interface circuit between the first set of power rails, the first interface circuit having at least one gate electrode, a first ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, and a second ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, the first ESD device and the second ESD device being configured to maintain a voltage level at the at least one gate electrode of the first interface circuit at approximately a ground level when ESD occurs.

Abstract: An over-voltage protection circuit (i.e., a limiter), includes: a first switching block having a plurality of semiconductor elements, serially connected to each other and turned on in sequence according to the magnitude of an input voltage; and a plurality of second switching blocks, in which each of the second switching blocks includes a pair of serially connected semiconductor elements having different current properties. The second switching blocks are connected in parallel to the first switching block. By minimizing a leakage current when an input voltage is below a reference voltage and by maximizing a leakage current when the input voltage is above the reference voltage, the limiter prevents excessive current from flowing into the RF tag circuit when the input voltage is below the reference voltage, and ensures that a sufficient amount of current is supplied to a regulator when the input voltage is below the reference voltage.

Abstract: In a wireless tag with which a wireless communication system whose electric power of a carrier wave from a R/W is high, an overvoltage protection circuit is provided to prevent from generating excessive electric power in the wireless tag when the wireless tag receives excessive electric power. However, as noise is generated by operation of the overvoltage protection circuit, an error of reception occurs in receiving a signal whose modulation factor is small. To solve the problem, the maximum value of generated voltage in the wireless tag is held in a memory circuit after the overvoltage protection circuit operates, then the overvoltage protection circuit is controlled in accordance with the maximum value of generated voltage. The voltages at which the overvoltage protection circuit starts and stops operating are different from each other, and hysteresis occurs between the timing when the overvoltage protection circuit starts and stops operating.

Abstract: A system and method for efficient input/output (I/O) port overvoltage protection of a high-speed port. An interfacing system for connecting peripheral devices to a computing system comprises ports for conveying serial communications bidirectional signals and an overvoltage protection circuit. The protection circuit prevents an overvoltage condition on one port in response to an overvoltage event on a corresponding second port. In one embodiment, the interfacing system connects USB peripheral devices to an automotive infotainment system comprising an automotive battery potiential greater than a USB power supply. In addition, the overvoltage protection circuit is able to transmit signals between the two ports without signal attenuation defined by an industry standard specification such as Universal Serial Bus (USB) Implementers Forum (IF) eye pattern diagram test.

Abstract: A test plug for use with protective relays has a circuit that when it detects an overvoltage on the secondary side of a current transformer limits the overvoltage amplitude and the occurrence of the overvoltage to a predetermined number of peaks that are less than all of the peaks that occur when the secondary side is open circuited and the test plug is connected to the relays. The test plug also ensures that there is a continuous flow of current in the relays. The test plug further that has an indicator visible external to the plug to indicate the occurrence of an open circuit transformer secondary and that indicator remains illuminated when the test plug is disconnected from the protective relays.

Abstract: The present invention pertains to a closed loop over-voltage protection for audio/video connection interfaces of devices especially of mobile devices.

Abstract: An on-chip circuit for protection against electrostatic discharge (ESD) is disclosed. Unlike conventional ESD protection circuit using high turn-on voltage diode string, the circuit uses a plural of enhancement-mode HEMT/MESFET triggered by a shorter diode string to shunt large ESD current for protected susceptive RF circuit. Further, by using dual-gate technology of enhancement-mode HEMT/MESFET, the on-chip ESD protection circuit has the less parasitic capacitance without expanding device size for vulnerable RF circuit.

Abstract: A method and a device for operating a transmission line are provided. The device includes a line driver circuit and a protective circuit. The line driver circuit converts an input signal of the device into a current or a voltage for the transmission line while the protective circuit prevents an overvoltage and/or an overcurrent on the transmission line. The line driver circuit and the protective circuit are integrated in a common package.

Abstract: An input/output device comprises a bonding pad, a signal transport circuit, and a blocking unit. The signal transport circuit has a first terminal connected to the bonding pad and a second terminal connected to a core circuit of an IC product. The signal transport circuit is capable of transporting a signal either from the bonding pad to the core circuit or from the core circuit to the bonding pad. The blocking unit has a control terminal and is coupled between the bonding pad and the signal transport circuit. The control terminal is coupled to receive an enable signal. The blocking unit ties the bonding pad to a predetermined voltage level when the enable signal is de-asserted, thereby blocking the signal transport provided by the signal transport circuit. The blocking unit unties the bonding pad from the predetermined voltage level when the enable signal is asserted.

Abstract: The present invention discloses a selective independent overload and group overload protection circuit of a power supply. In the power supply, each of a plurality of loads that require a larger power output has an independent overload protection circuit, and the load is connected to a group overload protection circuit, such that a user can select to turn on the independent overload protection circuit or a group overload protection circuit that allows a larger power output and facilitates the user to select an appropriate power output according to the capacity requirement of the load.