Abstract: The present invention relates to a discharge structure for an overvoltage and/or overcurrent protection, in particular to a discharge structure for an electrostatic discharge (ESD) protection, for an integrated circuit (IC), and to an ESD protection device for an IC comprising such a discharge structure and to a method for making such a structure. The present invention particularly relates to such a discharge structure (50, 52) which comprises at least two discharge paths (40, 80) provided to conduct a current to a terminal (60), whereas substantially all of the discharge paths (40, 80) present substantially the same resistance for the current.

Abstract: An overvoltage protector for an electrical consumer in a motor vehicle, includes an input for connection to the electrical system of a motor vehicle, an output for connection to the electrical consumer to be protected, and a ground terminal which is connected via a line to a branch point between the input and the output, wherein at least one component that blocks below a threshold voltage and conducts above the threshold voltage, and a switch connected in series with the component are located in the line, wherein the switch is controlled by a control circuit that closes the switch when a voltage spike occurs and subsequently reopens it.

Abstract: The invention relates to a surge arrestor comprising at least one arrestor element, for example a varistor, and a disconnecting device for disconnecting the arrestor element or elements from the grid, wherein the disconnecting device comprises a thermal disconnect point that is incorporated into the electrical connection path within the arrestor, wherein a moving conductor section or a moving conductive bridge is connected to the arrestor element by way of the disconnect point on one side and the conductor section or the bridge is connected to a first external electrical connection of the arrestor on the other side, and comprises a means for generating a pre-stressing force, such as a spring, wherein the force vector associated therewith acts on the conductor section or the bridge in the disconnect direction directly or indirectly by way of a moving disconnection bracket, wherein further a conducting element is disposed in or at the end of the path of motion of the conductor section or of the bridge, said con

Abstract: In some embodiments, a method is disclosed that includes measuring a waveform of a power source side voltage of a circuit breaker; measuring a waveform of a transmission line side voltage of the circuit breaker; calculating a waveform of a voltage between contacts of the circuit breaker that is a difference between the waveform of the power source side voltage and the waveform of the transmission line side voltage; calculating a waveform of an absolute value of the waveform of the voltage between contacts; extracting a waveform of a component in a frequency band which is lower than a frequency of the power source and higher than a frequency of a DC component from the waveform of the absolute value; detecting a cycle of the extracted waveform; and closing the circuit breaker based on the cycle.

Abstract: Various disclosed aspects provide for protecting components (e.g., integrated circuits) from spurious electrical overvoltage events, such as electrostatic discharge. Embedded components with voltage switchable dielectric materials may protect circuits against electrostatic discharge.

Abstract: To reduce the leak current in the MOSFET connected between the pad and the ground. There are provided a pad PAD for an input or output signal, an n-type MOSFET M1a connected between the pad PAD and the ground and having its gate terminal and backgate connected in common, and a potential control circuit 10 that controls a potential Vb of the gate terminal and the backgate of the n-type MOSFET M1a based on a potential Vin of the pad PAD. The potential control circuit 10 comprises n-type MOSFETs M2 and M3; the n-type MOSFET M1a has its gate terminal and backgate connected to backgates and drains of the n-type MOSFETs M2 and M3; the n-type MOSFET M2 has its source grounded and its gate terminal connected to the pad PAD via a resistance R; and the n-type MOSFET M3 has its source connected to the pad PAD and its gate terminal grounded.

Abstract: Methods and apparatus for over-voltage protection of device inputs are disclosed. An example apparatus to protect a device from an over-voltage condition disclosed herein comprises a switch coupled between a device input and at least one component of the device, and a voltage compensator to pull a control input of the switch to a voltage associated with the device input to open the switch to protect the device component from the over-voltage condition.

Abstract: An interface circuit for connecting with a universal serial bus (USB) data cable includes a USB connector for connecting with the USB data cable, an over voltage protection (OVP) circuit connected to the USB connector, and a time delay circuit connected to the USB connector and the OVP circuit to control the OVP circuit. The OVP circuit is switched off in a predetermined delay time of the time delay circuit when the USB data cable is connected to the USB connector, and is then switched on after the delay time of the time delay circuit.

Abstract: An overvoltage protection circuit includes a shunt circuit adapted for connection to at least one circuit node to be protected from an overvoltage condition and a voltage generator coupled to the shunt circuit. The shunt circuit is selectively activated as a function of a control signal supplied to the shunt circuit. The voltage generator is operative to generate the control signal for activating the shunt circuit during the overvoltage condition. The control signal has a level which varies in a manner that at least partially changes offsets in activation threshold of the shunt circuit.

Abstract: A semiconductor integrated circuit includes an external pad, a ground line, a first protection circuit between the external pad and the ground line, and a second protection circuit between the external pad and the ground line. The second protection circuit is formed by a first protection element, a second protection element, and a resistor. With this structure, the resistance value of the resistor is set to an arbitrary value, so that an unnecessary current which would be generated at the time of power-off of the LSI can be decreased to a value which does not deteriorate the reliability of the LSI.

Abstract: An overvoltage protection element with a housing, with at least one overvoltage limiting component which is located in the housing, with terminal elements for electrical connection of the overvoltage protection element to the current or signal path which is to be protected, and with a state display which has a display element for display of the state of the overvoltage protection element. A conclusion about the state of the overvoltage protection element is easily possible as a result of a thermally activatable, endothermic material being both in thermal contact with the overvoltage limiting component and also in mechanical contact with the display element of the state display. When the overvoltage limiting component is heated above a certain minimum temperature, expansion of the thermally activatable, endothermic material produces a change in position of the display element whose magnitude is a measure of the heating of the overvoltage limiting component.

Abstract: A surge protector includes a housing with connectors for passing through an electrical lead that is to be protected, whereby a surge voltage discharge device is located inside the housing and a mounting base for placement on a mounting rail is located on the outside of the housing. The mounting base on the housing exhibits a power surge proof discharge contact for contacting the mounting rail with the discharge contact being connected to the discharge connector of the surge protector. An attachment is connected in a removeable fashion to the mounting base which includes a contact component which contacts the discharge contact of the mounting base and is connected in an electrically conducting manner with a lead that exits the attachment.

Abstract: Provided is a battery protection circuit and a battery device which may be manufactured at lower cost. Before all terminals of a battery protection circuit are each connected to batteries, even when a logical circuit malfunctions by an operation of a parasitic bipolar transistor formed by P-wells due to a connection order in which the batteries are connected, the logical circuit is reset by an operation of a parasitic bipolar transistor formed by the P-wells. For this reason, a charge/discharge path of the batteries is not interrupted due to the connection order. Accordingly, no limitation is placed on the connection order.

Abstract: An overvoltage protection control circuit includes a voltage conversion circuit, a voltage comparison circuit, and a switching circuit. The voltage conversion circuit generates a first voltage and a second voltage based on a power supply voltage. The voltage comparison circuit generates a control signal based on a comparison between the first voltage and the second voltage. The switching circuit determines whether to apply the power supply voltage to a chip in response to the control signal. The overvoltage protection control circuit is formed inside the chip.

Abstract: A power supply cell for distributing power supplied from a first voltage supply to an integrated circuit is disclosed.

Abstract: The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to predictive, pre-fabrication methodologies for determining inefficiencies in an integrated circuit (IC) design. The present invention, in one or more implementations, provides an effective pre-production methodology for predicting the efficiency and behavior of a designed ESD protective circuit and testing the ESD protective circuit with a simulated IC. The method of the present invention yields predictive results that have been comparatively tested.

Abstract: A first protection circuit includes a first diode and a first transistor. The anode of the first diode is connected to a terminal to be protected. The first transistor is configured as an N-channel MOSFET, and arranged such that the first terminal of the conduction channel thereof is connected to the cathode of the first diode, and the second terminal of the conduction channel thereof, and the gate and the back gate thereof are connected to a fixed voltage terminal. The first transistor is configured as a floating MOSFET formed within an N-type well formed in a P-type semiconductor substrate. The first diode is formed in the shared N-type well in which the first transistor is formed. The cathode of the first diode and the first terminal of the conduction channel of the first transistor are connected to the N-type well.

Abstract: A driver circuit includes a driver module having a first transistor for receiving a driver voltage signal. In response to the driver voltage signal, the first transistor conducts current through an electronic device. A protection module includes a second transistor in electrical communication with the first transistor for receiving a logic voltage signal and for inhibiting current flow through the first transistor in response to receiving the logic voltage signal. The protection module further includes a digital logic gate having at least one input in electrical communication with the first transistor for detecting a short-circuit voltage signal. At least one output of the digital logic gate is in electrical communication with the second transistor for outputting the logic voltage signal in response to receiving the short-circuit voltage signal.

Abstract: An integrated electrostatic discharge (ESD) protection circuitry for a signal electrode. Coupled in shunt between the signal electrode and the positive and negative power supply electrodes are opposing sets of multiple diodes coupled in series. Each set includes a diode across which is applied a nominal reverse bias voltage. These opposing reverse bias voltages are maintained at substantially constant predetermined nominal magnitudes in relation to the voltage at the signal electrode, thereby ensuring minimal leakage current via the signal electrode over the full dynamic range of the signal.

Abstract: An interface circuit is provided between a first circuit block and a second circuit block that operates using a power supply system differing from that of the first circuit block. An electrostatic discharge protection circuit that include a PN diode and a diffused resistor is formed in order to prevent electrostatic discharge destruction of a gate insulating film of a transistor that forms the interface circuit. The electrostatic discharge protection circuit may be formed using the remaining basic cells of a gate array that forms the second circuit block. An electrostatic discharge protection circuit formed of a bidirectional diode may be connected between a first low-potential power supply and a second low-potential power supply.

Abstract: An ESD protection circuit for a differential I/O pair is provided. The circuit includes an ESD detection circuit, a discharge device, and four diodes. The first diode is coupled between the first I/O pin and the discharge device in a forward direction toward the discharge device. The second diode is coupled between the second I/O pin and the discharge device in a forward direction toward the second I/O pin. The third diode is coupled between the discharge device and the positive power line in a forward direction toward the positive power line. The fourth diode is coupled between the discharge device and the negative power line in a forward direction toward the discharge device. Via an output end, the ESD detection circuit triggers the discharge device during ESD events.

Abstract: A semiconductor device which can achieve high breakdown voltage and high ESD tolerance of a current drive output terminal at the same time, and can quicken the response speed of a current flowing through the current drive output terminal. The inventive semiconductor device is provided, between the current drive output terminal and a first transistor or a low breakdown voltage element, with a second transistor having a breakdown voltage higher than that of the first transistor or that of the low breakdown voltage element. Furthermore, the inventive semiconductor device is provided with a diode having an anode connected with a path between the first transistor or the low breakdown voltage element and the second transistor, and a cathode connected with an ESD protection circuit.

Abstract: A driver circuit including a pre-driver B1 that operates by receiving operating power from a first power supply VDDI, and a main-driver B2 that receives operating power from a second power supply VDDE, amplifies an output signal from the pre-driver B1, and outputs the amplified signal. It also includes a first switch B4 between the first power supply VDDI and the pre-driver B1. It also includes a second switch B5 between the second power supply VDDE and the main-driver B2. A overvoltage protection sequence circuit B3 controls the On/Off states of the first switch B4 and the second switch B5 to controls the On/Off order of the pre-driver B1 and the main-driver B2. By doing so, the overvoltage protection sequence circuit B3 prevent an overvoltage from being applied to the driver circuit, especially to the main-driver B2.

Abstract: One embodiment includes an integrated circuit including an input circuit, a first diode including a first anode and a first cathode, with the first cathode coupled to a first voltage, the first anode coupled to the input circuit at a node via a first mechanical switch, a second diode including a second anode and a second cathode, with the second cathode coupled to the node via a second mechanical switch, the second anode coupled to a ground and a resistor coupled to the input circuit between the integrated circuit and the node, wherein in a first mode of operating, the first mechanical switch and the second mechanical switch are conducting, and in a second mode of operating, the first and second mechanical switches are nonconducting.

Abstract: An active loading-reduction device is provided for a circuit. The circuit has functional circuitry coupled to a terminal to receive an alternating voltage. The circuit also has an electrostatic discharge protector that is coupled to the terminal. The active loading-reduction device includes active circuitry that is adapted to be coupled to a power supply to provide a reactance to counteract a reactance provided by the electrostatic discharge protector at the terminal of the circuit.

Abstract: The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the integrated circuit and patterned to form a transmission line. The metallic layers are generally already present in the integrated circuit for signal routing. The transmission line is coupled between the circuit node and a terminal of an ESD protection device, with a transmission line return conductor coupled to a high-frequency ground. The transmission line is formed with an electrical length that transforms the impedance of the ESD protection device substantially into an open circuit at the circuit node at an operational frequency of the integrated circuit. The other terminal of the ESD protection device is coupled to the high-frequency ground.

Abstract: A protection circuit includes a diode chip, and a switching device integrated with the diode chip, the switching device being isolated, optically triggered, optically powered, and the diode chip connected between a high side terminal of the switching device and an input to a first inverting amplifier, the diode chip further supplying a current when an overvoltage occurs between a drain and a source of the switching device.

Abstract: A method and apparatus to provide electrostatic discharge (ESD) protection to electronic circuits using a gate clamp circuit.

Abstract: An embodiment of the invention relates to a switch-mode power converter including an inductor and an external rectifying diode. A series arrangement of a resistor and a switch are coupled in parallel with the external rectifying diode. The resistor and the switch enable continuous conduction mode, even at substantially no output current. A comparator senses a current level in the resistor. When the current level crosses a threshold level, the power converter is shut down. The current level is sensed with a second resistor coupled to a current source to produce a current sensing arrangement dependent on a ratio of resistances. Advantageously, the current level is sensed with clamp circuits coupled to the comparator, each clamp circuit including a series circuit arrangement of a field-effect transistor with a gate coupled to a voltage source.

Abstract: The invention relates to a speed controller comprising: a rectifier module (12) for generating a direct voltage on a power bus (10, 11) from an alternating voltage available on an electrical power-supply network (A); a bus capacitor (Cb) connected between a positive line and a negative line of the power bus; and an inverter module (13) powered by the power bus and controlled to deliver an alternating voltage to an electrical load (2); a protection device (14) for protecting the controller against overcurrents linked with voltage variations on the electrical power-supply network (A).

Abstract: A high voltage tolerance circuit includes a first transistor, a second transistor, a third transistor, and a latch-up device. The first transistor and the second transistor are controlled by a control signal. The gate of the third transistor is coupled to a ground through the first transistor. The gate of the third transistor is coupled to an I/O pad through the second transistor. The third transistor is coupled between a power supply and a node. The latch-up device is coupled between the node and the I/O pad.

Abstract: A circuit breaker is provided for protecting dynamoelectric machinery. The circuit breaker includes a feeder input connection connected to a feeder line. The feeder line is connected to a dynamoelectric machine. A substation connection is connected to a substation bus. An interrupting breaker is connected between the feeder input connection and the substation connection. A shorting switch is connected to the feeder input connection, and an impedance device is connected to the shorting switch and a ground or neutral. The impedance device, shorting switch and ground/neutral reduces excessive voltages on the feeder line when the feeder line is isolated from the substation by the circuit breaker, and the impedance device is selected to reduce a torque transient experienced by the dynamoelectric machine.

Abstract: A differential current output driver and a method for overvoltage protection of a differential current output driver circuit are provided. The output driver includes a differential current output driver circuit operable by a power supply voltage and including first and second driver transistors in a differential current configuration and first and second output pads, and an overvoltage protection circuit configured to generate a protected voltage in response to a voltage on at least one of the first and second output pads and an absence of the power supply voltage, and to apply the protected voltage to at least one transistor of the differential current output driver circuit.

Abstract: A display apparatus current discharging method, includes steps of: providing a potential difference between a first line and a second line; switching on a first switching element; generating a voltage drop of a resistance element having a first end and a second end; switching on a second switching element; providing a first discharging path through the first line, the first switching element, the resistance element, the second switching element, and the second line; and discharging a first current via the first discharging path. A display apparatus current leakage reducing method is also disclosed.

Abstract: A semiconductor laser device has a cathode grounded and an anode connected to a collector of a transistor. The transistor has an emitter grounded and a base connected to a first external terminal via a first resistor. A digital transistor has a collector connected to the base of the transistor, an emitter grounded, and a base connected to a second external terminal via a resistor. When a voltage equal to or higher than the predetermined first voltage is applied to the base of the transistor, the transistor is put into a conducting state, and the semiconductor laser device is grounded via the transistor and thereby protected from static electricity and leak current.

Abstract: An over-voltage protection circuit is disclosed herein for protection against over-voltage of an energy storage device while charging. The circuit operates within the operational limits of a battery-operated device, such as a mobile or handheld device. The over-voltage protection circuit comprises an over-voltage protection device, and an over-voltage protection controller. The controller allows current to flow to the over-voltage protection device only when an energy storage device is experiencing over-voltage. In allowing current to flow to the over-voltage protection device only when the voltage across the energy storage device is above a predetermined voltage, power conservation is achieved.

Abstract: A protection circuit which is capable of preventing a faulty operation resulting from an abnormal control signal a method for operating the same, a flat display device using the same, and a method for driving the flat display device using the same are disclosed. The protection circuit includes a reference voltage output circuit for outputting a first reference voltage corresponding to a minimum allowable voltage of a control signal and a second reference voltage corresponding to a maximum allowable voltage of the control signal, and a comparison circuit, comparing a level of the control signal with the first reference voltage and second reference voltage and supplying a output control voltage corresponding to the control signal representing the a high-logic state to the controller when the level of the control signal has a value between the first reference voltage and the second reference voltage.

Abstract: Electrical distribution systems implementing micro-electromechanical system based switching devices. Exemplary embodiments include a method in an electrical distribution system, the method including determining if there is a fault condition in a branch of the electrical distribution system, the branch having a plurality of micro electromechanical system (MEMS) switches, re-closing a MEMS switch of the plurality of MEMS switches, which is furthest upstream in the branch and determining if the fault condition is still present. Exemplary embodiments include an electrical distribution system, including an input port for receiving a source of power, a main distribution bus electrically coupled to the input port, a service disconnect MEMS switch disposed between and coupled to the input port and the main distribution bus and a plurality of electrical distribution branches electrically coupled to the main distribution bus.

Abstract: An electrostatic protection circuit includes a first impurity region, a second impurity region, a first electrode, a third impurity region, a fourth impurity region, a second electrode, a fifth impurity region, a sixth impurity region, a third electrode, a gate insulating film, and a fourth electrode.

Abstract: A latch-control protection circuit applied in a power converter is provided. The protection circuit has a comparing circuit unit and a logic gate. The comparing circuit unit is utilized to selectively output a default signal or a comparing signal according to a state signal from the logic gate, wherein the default signal is utilized for latching the state signal and the comparing signal is corresponded to the power condition of the power converter. The logic gate generates the state signal according to the output signal of the comparing circuit unit and a system judging signal. The output signal may be the default signal or the comparing signal. The system judging signal indicates the condition of the power converter.

Abstract: A power semiconductor arrangement including conditional active clamping (CAC). One embodiment includes a power semiconductor arrangement. A controllable power semiconductor switch includes a load path. A driver unit for switching the load path to either an ON-state or an OFF-state. An active clamping (AC) unit configured to switch the load path in the ON-state if the voltage affecting the controllable power semiconductor switch is higher than or equal to an allowable voltage. A switching unit includes a control input, and configured to activate and/or to deactivate the AC unit dependent on a signal applied to the control input.

Abstract: A mother substrate for a display device includes a display cell, a test pad, an electrostatic preventing pattern and a connecting line. The display cell includes a pad and a signal line. The signal line is extended from the pad and is electrically connected to a pixel. The test pad is disposed out of the display cell and is electrically connected to the signal line of the display cell and receives a test signal. The electrostatic preventing pattern electrically connected to the test pad is disposed adjacent to the test pad and includes a plurality of edges. The electrostatic preventing pattern is formed from a metal pattern. The connecting line is extended from the electrostatic preventing pattern and is electrically connected to the pad of the display cell.

Abstract: An electrostatic discharge protection circuit device includes a discharge circuit, a trigger circuit and a trigger control circuit. The discharge circuit is connected to a predetermined circuit node of a semiconductor device, and makes discharge when surge voltage is applied to the circuit node. The trigger circuit triggers the discharge circuit to start a discharge operation by the discharge circuit. The trigger control circuit controls a trigger voltage at which the trigger circuit starts a discharge operation by the discharge circuit.

Abstract: An electronic device can be used with a system, such as an ignition system, that operates a relatively high voltage. The device can include a signal clamping control module that can include a signal reference module and a feedback control module. The signal reference module is operable to provide a reference signal to the feedback control module. The feedback control can be configured to receive a scaled signal from a signal scaling module, wherein the scaled signal is representative of a signal at a current carrying electrode of a power transistor. Based on the comparison of the reference signal to the scaled signal, the measurement module provides one or more signals to a control signal drive module. The feedback control module provides a control electrode signal to a control electrode of the power transistor.

Abstract: A main transistor and a reverse current prevention transistor are provided in series between an input terminal and an output terminal. An input diode is provided between a connection point of the reverse current prevention transistor and the main transistor and a reference voltage terminal in such a direction that the anode becomes the reference voltage terminal side. A control unit controls the gate voltage of the main transistor according to a DC voltage. The reverse current prevention transistor is arranged in such a direction that the anode of its body diode becomes the input terminal side. The reverse current prevention transistor is biased to be turned on in a normal state that the input terminal becomes high potential and the reference voltage terminal becomes low potential.

Abstract: An integrated circuit can include an I/O pad, an internal circuit, an inductor, an electrostatic discharge (ESD) protection circuit, and an ESD clamp. The internal circuit can be biased with a first voltage supply and a second voltage supply, where the internal circuit is connected to the I/O pad at a first node. The ESD protection circuit can be connected between the first node and a second node. The inductor can be connected between the second node and a third voltage supply. Further, the ESD clamp can be connected between the second node and the second voltage supply.

Abstract: A controller chip provides protection to a power converter by using a high-voltage start-up device in the controller chip, without additional pins or external elements of the controller chip. A JFET is used as the high-voltage start-up device connected between a high-voltage pin and a power input pin of the controller chip, to charge a power capacitor connected to the power input pin at power on. The controller chip monitors the voltage at the power input pin and turns off the JFET once the voltage at the power input pin increases to reach a threshold. Thereafter, the source voltage of the JFET will reflect the voltage at the high-voltage pin, and a protection circuit monitors the source voltage of the JFET to trigger a protection signal.

Abstract: Apparatus and method are described, illustratively in an LVLS master/slave system, for detecting a circuit failure, shutting down the system as if a normal power down function has occurred, but restarting the system. Signals, including power and ground lines are monitors, mal-functions detected and the apparatus put into a power down sequence. Illustratively in the LVLS system, driving a signal line to either the power or ground rails is used as a signal to the apparatus to enter the power down sequence. The present invention, after a programmable time, then drives the signal line to the opposite rail thereby signaling the system to restart—a wake up mode. After a programmable time, the signal line is released and the system resumes normal operation.

Abstract: A travel outlet device is for connecting between an adapter and a power cable. The travel outlet device includes a case, a PCB and at least one power outlet unit. The case is connected with a power input portion and a power output portion. The PCB has a surge-protected circuit and is disposed inside the case. The PCB is electrically connected with the power input portion and the power output portion. The power outlet unit is disposed with the case and electrically connected with the PCB. Accordingly, the travel outlet device can provide the adapter surge-protected function so that users can get more power outlet units to connect to other electric equipments for convenient use.

Abstract: A cascode I/O driver is described that includes a barrier formed in the shared region between the two transistors. The barrier region allows the I/O driver to be designed to primarily meet I/O requirements. Accordingly, improved operating speeds are achieved. An system is described that includes an I/O driver in parallel with an ESD device. In an embodiment, the I/O driver may assist the ESD device in discharging electrostatic, after the ESD begins conducting.