Abstract: A method for receiving packet data at a communication channel and transmitting the packet data over serial links of the communication channel. The packet data is sliced into n-bit data portions which are concatenated with a header prior to transmitting an n-bit portion across one of the serial links of the communication channel. The header may include an invert bit to alter the majority sign of an n-bit portion. Other aspects of the present invention are also described herein.

Abstract: In one example, a network device includes a network interface that receives a packet, a storage card that stores session data for monitored network sessions, a plurality of service processing cards that process packets of respective subsets of the network sessions, wherein each of the service processing cards comprises a respective memory to store session data for the respective subset of the network sessions processed by the corresponding service processing card, and a switch fabric coupled to the network interface, the storage card, and the plurality of service processing cards. One or more of the plurality of service cards process the received packet based on the session data stored by the storage card. The one or more of the plurality of service cards retrieve the session data for the network session to which the packet corresponds from the storage card and store the retrieved session data in the respective memory.

Abstract: A storage network includes at least one storage processor. At least one switch is coupled to the at least one storage processor. At least one nontransparent bridge is coupled to the at least one switch. The at least one nontransparent bridge includes at least one addressable endpoint. At least one storage device is coupled to the nontransparent bridge. At least one baseboard management controller is coupled to the at least one addressable endpoint.

Abstract: Methods and apparatuses are provided for managing a performance level of a processing circuit, such as a modem, by making adjustments to one or more operating parameters provided to the processing circuit, such as a voltage supplied to the processing circuit and/or a clock frequency of the processing circuit. The processing circuit is adapted to monitor wireless wide area network (WWAN) protocol information. The processing circuit may adjust at least one operating parameter provided to the processing circuit in response to the monitored wireless wide area network (WWAN) protocol information.

Abstract: A context-free (stateless) dataport may allow multiple processors to perform read and write operations on a shared memory. The operations may include, for example, structured data operations such as image and video operations. The dataport may perform addressing computations associated with block memory operations. Therefore, the dataport may be able, for example, to relieve the processors that it serves from this duty. The dataport may be accessed using a message interface that may be implemented in a standard and generalized manner and that may therefore be easily transportable between different types of processors.

Abstract: Management of congestion level, in a computer-related context, is disclosed. Also disclosed is a system generating a plurality of computer network-related tables during system operation. A number of the tables are each separately indexed by a different index. The system includes at least one tangible computer-readable medium adapted to store, at each indexed location, a swap count providing an indication of the congestion level of the indexed location. The system also includes insert logic stored as instructions on the at least one medium for execution. When executed, the insert logic is operable to: i) insert, when a predetermined condition has been satisfied, a new entry by overwriting the current entry stored in the indexed location having the lowest swap count; and ii) update the swap counts in each of the indexed locations in a manner that maintains the total swap count at least substantially constant over time.

Abstract: A method and apparatus for receiving packets from a node within a first network in accordance with a first protocol. A descriptor associated with each received packet is read by a direct memory access (DMA) controller that stores the received packet. A value for a controllable parameter is selected to efficiently communicate the content of the received packet over a second network that operates in accordance with a second protocol. The information in the received packet is then organized into newly formed packets, the size of which makes them efficient for communication over the network in the second protocol. The newly formed packets are stored in a transmit line buffer and associated with a Protocol Descriptor. The Protocol Descriptor provides information to a transmit controller to allow the transmit controller to select and aggregate packets from the transmit line buffer in order to make efficient use of the second protocol.

Abstract: A method and apparatus for updating stored data structures representing network forwarding information used for network route lookup is described. By making sure there is only one level of dependency between data structures storing forwarding information, these data structures may be updated quickly and with minimal overhead.

Abstract: Non-destructive data storage is disclosed. An information change is stored that is associated with a business object such that tracking of the information change is enabled with respect to one a transaction time and/or an effective time. The stored information change is accessed with respect to a time.

Abstract: A router for switching data packets from a source to a destination in a network in which the router includes a distributed memory. The distributed memory includes two or more memory banks. Each memory bank is used for storing uniform portions of a data packet received from a source and linking information for each data packet to allow for the extraction of the uniform portions of a data packet from distributed locations in memory in proper order after a routing determination has been made by the router.

Abstract: A wide-area network (“WAN”)-based service enables remote data access transactions between participating endpoints within a group of participating endpoints that includes at least one server and at least one portable electronic device. Each participating endpoint is configured for communication via one or more communication networks and stores the same or different data items on behalf of a user. The WAN-based service maintains information about each participating endpoint in the group and its network accessibility, and also maintains one or more catalogs of available data items. The WAN-based service identifies a communication network available to both participating endpoints, and a direct or proxied communication session is established between the portable electronic device and the other participating endpoint via the communication network. Selected data items are downloaded, uploaded, accessed or synchronized via the communication session.

Abstract: Examples are disclosed for forwarding cells of partitioned data through a three-stage memory-memory-memory (MMM) input-queued Clos-network (IQC) packet switch. In some examples, each module of the three-stage MMM IQC packet switch includes a virtual queue and a manager that are configured in cooperation with one another to forward a cell from among cells of partitioned data through at least a portion of the switch. The cells of partitioned data may have been partitioned and stored at an input port for the switch and have a destination of an output port for the switch.

Abstract: In one embodiment, a method includes receiving a packet flow associated with a click-through from an end user node destined for an advertiser server; extracting information from the packet flow; analyzing the extracted information to determine one or more characteristics of the packet flow; and classifying the packet flow based on the determined one or more characteristics; modifying the packet flow to include classification information to provide classification information indicating a quality level of the click-through. The packet flow may include a hypertext transfer protocol GET request. Modifying the packet flow may include adding a tag with classification information that indicates a likelihood of fraudulent click behavior associated with the packet flow.

Abstract: The present invention relates to a protocol accelerator module for a data transmission protocol level of a transceiver, particularly but not exclusively for rapid forwarding of data packets in wireless sensor networks using the time-division multiple access method according to the IEEE 802.15.4 standard. The invention also relates to a method of transceiver operation for rapid forwarding of data packets, likewise particularly, but not exclusively, in wireless sensor networks using the time-division multiple access method according to the IEEE 802.15.4 standard. The core of the invention is a reference table which stores references from identifiers of second transceivers to identifiers of third transceivers as well as references from specific messages to identifiers of third transceivers. A transceiver can check during reception of a data packet whether it is a data packet to be forwarded, and can take appropriate precautions for rapid sending of a data packet to be forwarded.

Abstract: Certain embodiments of the invention may be found in a method and system for an adaptive cache for caching context and for adapting to collisions in session lookup table. A network processor chip may comprise an on-chip cache that stores transport control blocks (TCB) from a TCB array in external memory to reduce latency in active transmission control protocol/Internet protocol (TCP/IP) sessions. The on-chip cache may comprise a tag portion implemented using a content addressable memory (CAM) and a data portion implemented using a random access memory (RAM). When a session collision occurs the context of a subsequent network connection may be stored in a data overflow portion of an overflow table in the on-chip cache. A search key associated with the subsequent network connection that comprises network connection parameters may be stored in a tag overflow portion of the overflow table.

Abstract: A distributed memory architecture for a layer 2 processing circuit chip (50) is described. In one implementation, the layer 2 processing circuit chip (50) comprises an external memory interface configured to provide access to data packets stored in an external memory (52), a layer 2 processor (54) coupled to the external memory interface (56) and configured to process data packets retrieved from the external memory (56) to generate RLC SDUs, and an on-chip memory (58) coupled to the layer 2 processor (54) and configured to store the RLC PDUs generated by the layer 2 processor (54) prior to their transmission. Upon a request to retransmit an RLC PDU, the layer 2 processor (54) is configured to selectively read the RLC PDU to be retransmitted from the on-chip memory (58) or a data packet comprising the RLC PDU to be retransmitted from the external memory (52).

Abstract: A router for switching data packets from a source to a destination in a network in which the router includes a distributed memory. The distributed memory includes two or more memory banks. Each memory bank is used for storing uniform portions of a data packet received from a source and linking information for each data packet to allow for the extraction of the uniform portions of a data packet from distributed locations in memory in proper order after a routing determination has been made by the router.

Abstract: A method and apparatus for detecting a queue depth of a memory queue in a memory system is described. The method includes estimating a start position of the queue by examining a portion of a queue start identifier of the memory queue, estimating an end position of the queue by examining a portion of a queue end identifier of the memory queue, and utilizing the start position and the end position to estimate the queue depth of the memory queue. The apparatus applies the method. One embodiment of the method and apparatus may be suitable for implementation on look-up tables of field general programmable gate arrays.

Abstract: Methods and apparatus for minimizing resources for handling time-outs of read requests to a work queue in a work queue memory are described. According to one embodiment of the invention, a work queue execution engine receives a first read request when the work queue is configured in a blocking mode and is empty. A time-out timer is started in response to receiving the first read request. The work queue execution engine receives a second read request while the first read request is still pending, and the work queue is still empty. When the time-out timer expires for the first read request, the work queue execution engine sends an error response for the first read request and restarts the time-out timer for the second read request taking into account an amount of time the second read request has already been pending.

Abstract: A base station (BS) apparatus in a broadband wireless communication system is provided. The base station apparatus includes at least one function board for processing a baseband digital signal; at least one processor board for controlling the at least one function board; and at least one switch for routing a signal between the at least one function board and the at least one processor board.

Abstract: Deadlock is avoided in a grid storage system having superior scalability. Provided is a storage subsystem connected to a host computer for receiving a write or read access from the host computer. This storage subsystem includes a plurality of modules respectively having a storage resource, a switch for connecting the plurality of modules, a controller for controlling the transfer of a packet based on the write or read access from the host computer to a target module among the plurality of modules via the switch, and a memory storing a transfer rule of the packet. The controller controls the transfer of the packet based on the transfer rule.

Abstract: A network device for processing data on a data network includes a port interface, in communication with a plurality of ports, configured to receive data packets from a data network and to send processed data packets to the data network and a bookkeeping memory, in communication with the port interface. The port interface is configured to store values associated with a data packet when a head of the data packet is received by a port of the plurality of ports and utilize the stored values, if needed, when a tail of the data packet is received by the port.

Abstract: A protocol is provided for communicating data between two applications. The protocol can support communication of an extensible markup language (XML) document over hypertext transfer protocol (HTTP) by associating the XML document with a data envelope and sending the data envelope to a disparate application. The data envelope can comprise a header, which can specify supported compression methods, encryption keys, and/or data specific to the disparate application and/or the sending application. The protocol adds a layer of security to the communication and can prevent malicious requests and other attacks. This protocol can also be used in conjunction with a health integration network.

Abstract: The present invention discloses a method of accessing stored information in multi-framed data transmissions, comprising at least one control interface and at least one elastic store, wherein the control interface accesses the elastic store through a mailbox communications method.

Abstract: A context-free (stateless) dataport may allow multiple processors to perform read and write operations on a shared memory. The operations may include, for example, structured data operations such as image and video operations. The dataport may perform addressing computations associated with block memory operations. Therefore, the dataport may be able, for example, to relieve the processors that it serves from this duty. The dataport may be accessed using a message interface that may be implemented in a standard and generalized manner and that may therefore be easily transportable between different types of processors.

Abstract: A method and system is provided to enable quality of service across a backplane switch for multicast packets. For multicast traffic, an egress queue manager manages congestion control in accordance with multicast scheduling flags. A multicast scheduling flag is associated with each egress queue capable of receiving a packet from a multicast ingress queue. When the multicast scheduling flag is set and the congested egress queue is an outer queue, the egress queue manager refrains from dequeueing any marked multicast packets to the destination ports associated with the congested outer queue until the congestion subsides. When the congested egress queue is a backplane queue, the egress queue manager refrains from dequeuing any marked multicast packets to the destination ports on the destination blade associated with the congested backplane queue until the congestion subsides.

Abstract: The present invention discloses a method of accessing stored information in multi-framed data transmissions, comprising at least one control interface and at least one elastic store, wherein the control interface accesses the elastic store through a mailbox communications method.

Abstract: A method is provided for address mapping in a network processor. The method includes the steps of (1) determining a port number of a port that receives a data cell; (2) determining a virtual path identifier and a virtual channel identifier for the data cell; and (3) creating a first index based on at least one of the port number, the virtual path identifier and the virtual channel identifier. The method further includes (1) accessing one of a plurality of entries stored in a first on-chip memory using the first index; (2) creating a second index based on the accessed entry of the first on-chip memory; and (3) accessing an entry of a second memory based on the second index. Numerous other aspects are provided.

Abstract: A method of sending data through a network from a first computing device to a second computing device is described, where the computing devices adhere to a packet-based network protocol. A connection between the first computing device and the second computing device is established for a session according to the network protocol. A packet header template is defined having a plurality of static fields filled with static values valid for all packets sent during the session and variable fields that can acquire packet-dependent values for different packets sent during a session. A packet header is created based on the header template by defining, in a central processing unit, at least one value of a variable field and by reusing the static values for the static fields. The packet header is pre-pended to payload data to form a packet, and the packet is sent to the second computing device.

Abstract: A method for transmitting data is disclosed, whereby data are transmitted in packets between a first device and a second device, whereby a further device disposed between the first device and the second device analyzes the packets at most for regeneration purposes. The second device transmits data between itself and a third device using DSL technology. During the data transmission between the first device and the second device a comparison of transmission rates takes place.

Abstract: An RDMA Network Interface Controller (NIC) is operated to accomplish an RDMA WRITE operation initiated by an application operating on a host computing device to which the RDMA NIC is coupled for RDMA communication over a network with a peer device. The RDMA NIC receives an RDMA WRITE request from the host device, for writing data from a memory associated with the host device to a memory associated with the peer device using an RDMA protocol. The RDMA NIC initiates an RDMA WRITE operation from the memory associated with the host device to the memory associated with the peer device. Furthermore, the RDMA NIC automatically generates a completion indication for the RDMA WRITE operation to the host computing device by performing an RDMA READ operation and converting a READ COMPLETION for the RDMA READ operation to the completion indication for the RDMA WRITE operation.

Abstract: Source and destination fiber channel devices are coupled to a fiber channel fabric. Hosts communicate with the fiber channel devices using fiber channel addresses. All data is copied from the source fiber channel device to the destination fiber channel device. Source port names and LUN names are exchanged with destination port names and LUN names so that the source device has the destination port and LUN names and the destination device has the source port and LUN names. The fabric reloads its name server database for use by the host(s) so that the database associates the source port and LUN names with the destination port and LUN names and the destination port and LUN names with the source port and LUN names. The names known to the host have not changed and the destination fiber channel device now appears to the host as the source fiber channel device.

Abstract: An efficient switching device and a method for fabricating the same using multiple shared memories are provided. The switching device includes: an output time determination unit to determine an output time to an output port; an output time administration unit to administer a possible data output time for each output port; a memory bank selection unit to select a memory bank with an empty data output time position; a memory bank utilization information administration unit to administer utilization information per output time; a connection unit to deliver transmission data to an output time position; a shared memory unit to store the data in the output time position, to administer dispersed shared memory banks according to an output time, and to read and output transmission data; and an output port connection unit receiving output data to read and transmit output port information of the data to a corresponding output port.

Abstract: A method for controlling burst assembly, device, and communication equipment thereof are provided. In the present invention, an assembly time and a predetermined time threshold are compared to determine a load change in a cache queue. If the load is increased or decreased suddenly, a length threshold is directly increased or decreased. If the load is to be increased, the length threshold is randomly increased according to a certain probability. If the load is to be decreased, the length threshold is randomly decreased according to a certain probability. If the load is in a normal state, the length threshold is maintained. Therefore, the length threshold is dynamically adjusted with the load change. The method and device provided by the present invention ensure an end-to-end (E2E) delay of the services and optimize the network performance.

Abstract: Methods, systems and computer program products for an N-port network adaptor that is interchangeable between a network switch and a network adaptor. Embodiments of the invention include a method in a network device having a random access memory, a nonvolatile random access memory and a flash memory, the method including operating in a network switch/router mode of operation, operating in a network adapter mode of operation and switching in between the network switch/router operation and the network adapter operation in response to receiving a device configuration signal.

Abstract: A technique controls a network switch having a set of ports. The technique involves configuring the network switch to provide an initial set of communications paths between the ports. The initial set of communications paths defines an initial communications path topology within the network switch. The technique further involves receiving a configuration command which identifies a particular operating mode of the data storage system after configuring the network switch to provide the initial set of communications paths within the network switch. The technique further involves reconfiguring the network switch to provide a new set of communications paths between the ports in response to the configuration command. The new set of communications paths (i) defines a new communications path topology within the network switch, the new communications path topology being different than the initial communications path topology, and (ii) supports the particular operating mode of the data storage system.

Abstract: A packet network device includes a packet network processor memory system for storing information used to process and forward packets of information in and through the network device. The information is included in look-up tables whose entries can be mapped either horizontally or vertically into the memory system. In the event that the entries are mapped horizontally, a complete entry can be access at a single memory location and in the event that the entries are mapped vertically, the entries can be accessed at one or more memory locations.

Abstract: Methods, systems, and products are disclosed for pacing a data transfer between compute nodes on a parallel computer that include: transferring, by an origin compute node, a chunk of an application message to a target compute node; sending, by the origin compute node, a pacing request to a target direct memory access (‘DMA’) engine on the target compute node using a remote get DMA operation; determining, by the origin compute node, whether a pacing response to the pacing request has been received from the target DMA engine; and transferring, by the origin compute node, a next chunk of the application message if the pacing response to the pacing request has been received from the target DMA engine.

Abstract: A system and method of recording packets and packet streams to random-access block-oriented recording media, and retrieving the packets and packet streams from said recording media is disclosed. Incoming packets are copied into very large fixed sized blocks, which in turn are distributed to a plurality of disk drives for recording. Supplementary blocks of index data constructed as packets are received and recorded. The index data reduces the time required to locate and read specific packets and packet streams from the recording media. Recorded packets are retrieved and converted to standard pcap format files.

Abstract: A switch includes a reserved pool of buffers in a shared memory. The reserved pool of buffers is reserved for exclusive use by an egress port. The switch includes pool select logic which selects a free buffer from the reserved pool for storing data received from an ingress port to be forwarded to the egress port. The shared memory also includes a shared pool of buffers. The shared pool of buffers is shared by a plurality of egress ports. The pool select logic selects a free buffer in the shared pool upon detecting no free buffer in the reserved pool. The shared memory may also include a multicast pool of buffers. The multicast pool of buffers is shared by a plurality of egress ports. The pool select logic selects a free buffer in the multicast pool upon detecting an IP Multicast data packet received from an ingress port.

Abstract: Creating a low-bandwidth channel in a high-bandwidth channel. By taking advantage of extra bandwidth in a high-bandwidth channel, a low-bandwidth channel is created by inserting extra packets. When an inter-packet gap of the proper duration is detected, the extra packet is inserted and any incoming packets on the high-bandwidth channel are stored in an elastic buffer. Observing inter-packet gaps, minimal latency is introduced in the high-bandwidth channel when there is no extra packet in the process of being sent, and the effects of sending a packet on the low-bandwidth channel are absorbed and distributed among other passing traffic.

Abstract: A network device including at least one rate-limited-queue and multiple timer modules, the network device being operable to receive and/or transmit data flows from and/or to a communication network. Each data flow includes multiple data packets. The network device being further operable to limit the predetermined transmission rate of the respective data flow dependent on whether a data congestion in the communication network has been indicated, in such a way, that in case of an indicated congested communication network a respective timer module is associated to each of the data flows and/or each group of data flows, whereas the data packets of the respective data flows and/or group of data flows are buffered in the rate-limited-queue. Each data packet in the rate-limited-queue is transmitted with a limited transmission rate predetermined by the respectively associated timer module when the data packet is at the head of the rate-limited-queue.

Abstract: A networking device employing memory buffering in which a first memory is logically configured into blocks, and the blocks are logically configured into particles, where a second memory is configured to mirror the first memory in which a fixed number of bits in the second memory are allocated for each particle in the first memory so that scheduling and datagram lengths of packets stored in the first memory may be stored in the second memory. Other embodiments are described and claimed.

Abstract: A memory subsystem includes Data Store 0 and Data Store 1. Each data store is partitioned into N buffers, N>1. An increment of memory is formed by a buffer pair, with each buffer of the buffer pair being in a different data store. Two buffer pair formats are used in forming memory increments. A first format selects a first buffer from Data Store 0 and a second buffer from Data Store 1, while a second format selects a first buffer from Data Store 1 and a second buffer from Data Store 0. A controller selects a buffer pair for storing data based upon the configuration of data in a delivery mechanism, such as switch cell.

Abstract: In order to provide an ATM cell?packet switch which can easily maintain the band for the normality confirmation packet of the user data transfer path without influencing the user band at a state of in?band, and a communication control method using the switch, at least provided in the switch are: an SDRAM for storing the user data; a normality confirmation packet generator; a timing generator for generating the timing of a refresh cycle of the SDRAM; a selector for transferring the normality confirmation packet at the time of the refresh; and a packet reception unit for extracting the packet identifying information from the received packet data, and comparing the normality confirmation packet directly received from the packet generator to the normality confirmation packet received via the switch unit thereby to confirm the normality when the packet data is the normality confirmation packet.

Abstract: Systems and methods for monitoring high-speed network traffic via sequentially multiplexed data streams. Exemplary embodiments include a switch module system, including a first switch module configured to be coupled to a first server chassis, a first data port disposed on the first switch module and a set of first port data links configured to be coupled to a set of data port data links, each data link configurable to channel at least one of a normal data stream and a monitored data stream.

Abstract: A memory subsystem includes a master controller that includes a pseudo random bit sequence (PRBS) generator having a plurality of output taps and an exclusive-OR (XOR) unit. The memory subsystem also includes a memory device that is coupled to the master controller via a plurality of single ended bidirectional data paths. The master controller may scramble a plurality of data bits using the PRBS generator and the XOR unit prior to writing the plurality of data bits to the memory device. In addition, the master controller may perform an XOR between each bit of the plurality of data bits and a respective output tap of the PRBS generator prior to conveyance on a respective path of the plurality of single ended bidirectional data paths.

Abstract: A network device switches variable length data units from a source to a destination in a network. An input port receives the variable length data unit and a divider divides the variable length data unit into uniform length data units for temporary storage in the network device. A distributed memory includes a plurality of physically separated memory banks addressable using a single virtual address space and an input switch streams the uniform length data units across the memory banks based on the virtual address space. The network device further includes an output switch for extracting the uniform length data units from the distributed memory by using addresses of the uniform length data units within the virtual address space. The output switch reassembles the uniform length data units to reconstruct the variable length data unit. An output port receives the variable length data unit and transfers the variable length data unit to the destination.

Abstract: A system for providing a substantially balanced distribution of traffic over an aggregation of output lines carrying digital information makes use of m random or pseudo-random bits substantially greater in number than the number of bits (n) used for selection of individual lines. The m bits address a table populated with n-bit entries whose bit combinations correspond with the respective output lines, with the relative numbers of the bit combinations being such as to provide substantially equal loads on the individual lines.

Abstract: A pipeline-based matching scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with matching schemes, such as CRRD and CMSD. In the new approach, arbitration may operate in a pipelined manner. Each sub-scheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides a matching result(s). The sub-scheduler can use a matching scheme such as CRRD and CMSD.