Abstract: A modified approach to detecting the start frame delimiter (SFD) is disclosed. A receiving system scans a decoded but not yet de-scrambled received signal for a scrambled version of the SFD associated with the preamble format being used. Using this approach, it is not necessary to use any bits intended for use in synchronization to initialize a de-scrambler so as to be able to de-scramble the SFD portion of the preamble for detection. The bits that otherwise would have been dedicated to initializing the de-scrambler may then be used for synchronization, as intended. Detecting fewer than all bits comprising a start frame delimiter is described. Bits not used for SFD detection may be used for other purposes, such as synchronization.

Abstract: The invention relates to a method and a device for identifying a data packet in a data stream, in which by means of a d.c. voltage quota determining circuit (30) the d.c. voltage quota (dc) for a demodulated digital input signal (Sin) is calculated, in which a k-bit word is allocated to the input signal (Sin), in that for each symbol of the input signal (Sin) corresponding to a bit a bit value (1 or 0) is determined by a decoding circuit (37) as a function of the d.c. voltage quota (dc), in which the k-bit word corresponding to the input signal (Sin) is compared by a comparison and correlation calculating circuit (41) with an expected k-bit synchronization word in order to determine a correlation value (cv) and in which a packet identification signal (Pd) is generated by a correlation value comparison circuit (43) if the correlation value (cv) is greater than a correlation threshold value (cth). Calculation of the d.c.

Abstract: Technology for detecting a frame synchronous pattern that includes a data switch section for performing data rearrangement processing of parallel data having a given frame synchronous pattern; a temporary region detection section for temporarily detecting a candidate of region data containing the frame synchronous pattern from the parallel data; a frame synchronous pattern detection section for detecting the frame synchronous pattern from the temporary region data of the temporary region detection section; and a data switch control section for controlling data rearrangement processing by the data switch section according to the detection state of the temporary region data by the temporary region detection section and to the detection state of the frame synchronous pattern by the frame synchronous pattern detection section, in order to detect precisely the frame synchronous pattern in m parallel data without enabling the detection of m ways of frame synchronous patterns in in parallel data.

Abstract: A user equipment which receives a CDMA communication signal that is wirelessly transmitted includes a system for correcting phase errors in an information signal which has been transmitted. The correction system comprises circuitry for generating a correction signal and for combining the correction signal with the information signal to produce a corrected information signal. An analyzer analyzes the phase of the corrected information signal and generates an error signal based on the deviation of the analyzed phase from a reference phase. A bandwidth controller recursively adjusts the phase of the corrected information signal such that the phase of said corrected information signal is substantially equal to said reference phase. The bandwidth controller selects a bandwidth within an adjustable range based on the error signal, estimates an offset based on the error signal, and modifies the correction signal using the offset.

Abstract: In a method for synchronizing a mobile radio receiver with a radio signal time slot structure a first portion, detected during a first time slot period, and a second portion, detected during a later time slot period, of a received time slot synchronization code sequence is correlated with the known time slot synchronization code sequence sent out by the base station in the receiver. From the two obtained coxrelation results, the position of the time slots in time is determined.

Abstract: A method of a receiver determining the timing of a signal transmitted in a time-slotted manner, the signal comprising a sequence of information which is repeated at a known interval and has at least a known minimum length. The method performs correlation operations between groups of received slots of information, the groups spaced by the known interval. The groups are moved through the received signal, adding and removing slots, to locate a maximum correlation value sum for the group which should correspond to the timing of the slot. The method also can be used to determine a frequency offset at the receiver and/or an initial phase.

Abstract: Techniques to search for pilots over code space in a CDMA system. In one aspect, the pilot search is performed using a number of substages, and the search windows for each substage are selected such that the relevant code space is searched while reducing search time. In one specific implementation, two substages are used to search for pilots. The detect substage searches through (e.g., fixed-size) search windows to detect for peaks in the received signal. The dwell substage then searches through (e.g., variable-size) search windows to re-evaluate the detected peaks and remove noise peaks. The dwell windows may be formed such that a code space as small as possible is searched (to reduce search time) but large enough to account for possible drift in the detected peaks. Variable number of peaks may be provided by the dwell substage for the variable-size dwell windows.

Abstract: A new method for synchronizing transmissions of real time synchronous data packets over an asynchronous network between two terminal nodes is disclosed. The synchronization procedure is implemented within intermediating communication devices, which connect between the terminal nodes TDM equipment and the asynchronous network. Each communication device comprises local clocks, which are activated by a Stratum 2/3/3e/4/4e pulse generator. The local clocks synchronization is based on the transmission of a reference timestamp packet through an asynchronous network. Based on this timestamp references, an internal digital PLL is used for attenuating the jitter/wander in data transmission signal in accordance to Stratum 2/3/3e/4/4e accuracy standards. The DPLL data result is then processed to be used by the local clock of the receiving terminal.

Abstract: A system and method for fast synchronization of an incoming signal with a UWB receiver rapidly. The present invention synchronizes with a UWB receiver with an incoming signal. The present invention correlates a local pulse generated at the receiver with the incoming signal, finds a phase angle in the correlation function that would correspond to a high signal to noise ratio, thereby matching the receiver to the incoming signal phase, and operates the receiver at that phase. Exemplary options of fast synchronization include using multiple detection arms to compare one parameter of the correlation function to a predetermined threshold.

Abstract: A method and radio communication system for synchronizing subscriber stations, wherein a time slot is assigned to a number of base stations for transmitting at least one synchronization sequence and adjacent base stations use a different time offset with respect to the beginning of the time slot for transmitting the synchronization sequence. Thus, superposition can be precluded even in the case of a synchronized operation of the base stations. So that the subscriber station can still determine the beginning of the time slot, the time offset is transmitted. The time offset corresponds to the choice of one or more synchronization sequences and/or the sequence of a number of synchronization sequences. The information relating to the time offset is transmitted coded in this manner.

Abstract: A mobile wireless communications device and methods therefore, including receiving a signal (710), storing a portion of the received signal (730), identifying all possible pilot signals by determining slot boundary information for the stored signal portion (720), determining frame boundary information and/or scrambling code information (760) of the stored signal portion by correlating the stored signal portion with the scrambling codes based on the slot boundary information. In other embodiments, the search is performed in real-time without storing the signal.

Abstract: Briefly, in accordance with one embodiment of the invention, a verifier and a method for verifying synchronization of at least one pilot signal pattern of a wireless communication system are disclosed. A method and a module of frequency acquisition are also disclosed.

Abstract: A communicating apparatus performs an asynchronous communication with a base station. The communicating apparatus is provided with: a receiving device for receiving a down link signal, which is transmitted from the base station and in which a division signal is inserted for each of constant time intervals; a detecting device for detecting division signals out of the received down link signal, in phase to the constant time intervals; an adding device for adding the detected division signals over a predetermined time duration, which is longer than the constant time interval, with matching phases for each of the constant time intervals, so as to generate accumulated additional values; and a memory device for storing the accumulated additional values generated by the adding device, to thereby perform synchronization capturing with the base station on the basis of the accumulated additional values added over the predetermined time duration and stored in the memory device.

Abstract: The invention relates to a method for performing measurements in a wireless terminal comprising a receiver for receiving radio frequency signals, means for taking samples from the received signals and means for performing measurements on the basis of said samples. The samples taken from the received signal are stored. Measured values are calculated for the stored samples after a set of samples has been stored.

Abstract: A method is provided for organizing a communications frame structure with selectable synchronization words. The frame structure includes a header section for overhead bits. The number of bits, position of those bits, and the content of the bits used for synchronization of the frame structure are selected from the header section for use in transmitting information. On the receiving end of the transmission, the same number, position, and content of bits are selected to synchronize the received information stream. A communications repeater and system using the above-described selectable frame synchronization structure method is also provided.

Abstract: Data synchronization detection is provided between data identification and code demodulation in a data reproduction system, which performs data synchronization detection using code-modulated data. A specified bit pattern generated in a data codeword is calculated in each phase (bit), using a specified bit sequence pattern that is not generated in a specified phase of the data codeword. For example, a specified bit sequence pattern is generated only in a specified phase of the codeword). The positions of the data codeword partitions are thereby identified. Scrambling is then applied to the write data as required in order to ensure accurate synchronization detection.

Abstract: A first initialization pattern signal is a signal in which a maximum signal level and a minimum signal level appear alternately, and a second initialization pattern signal is a signal in which all signal levels appear in a predetermined arrangement. In a ring-shaped network including plural stages of data transmission apparatuses (100), a transmission unit (110) of each data transmission apparatus outputs the first initialization pattern signal successively to a next-stage data transmission apparatus at turn-on of power or immediately after reset, and a reception unit (120) establishes clock synchronization on the basis of the first initialization pattern signal received.

Abstract: The invention generally relates to a modem connected via a digital interface to a switched public telephone network and to a method for probing the line properties. The modem communicates with a second modem also connected via a digital interface to the same switched public telephone network. The public telephone network may incorporate voice compression devices (ADPCM G.726, G.723 etc.), digital pads (digital attenuators), robbed bit signalling and echo cancelling devices. The probing sequence of the invention uses large amplitude changes in a symbol sequence (each symbol having a duration of 125 ?s). After that single amplitude change, the signal may return to the previous value or continue with the new amplitude value for a number of symbols. The number of symbols is selected to be larger than any expected impulse response of a digital impairment of the channel.

Abstract: Systems and methods are disclosed for time synchronization of operations in a control system. Synchronization networks and devices are provided for transferring synchronization information between controllers in a distributed or localized control system, which is employed in order to allow operation of such controllers to be synchronized with respect to time. Also disclosed are synchronization protocols and hardware apparatus employed in synchronizing control operations in a control system.

Abstract: A method of producing a correction signal includes receiving a predetermined data sequence (500). The data sequence is sampled at predetermined times, thereby producing a sampled data sequence (522, 532). The sampled data sequence is separated into first and second sampled data sequences. A ratio is calculated (550, 558) from the first and second sampled data sequences. A correction signal is produced (556, 564) in response to the ratio.

Abstract: A communications channel detector which determines the availability of a desired type of communications channel in a communication system having at least one communications channel, the communications channels including data streams comprising a number of data symbols. The channel detector includes a phase detector, a phase comparator coupled to the phase detector, and a phase correlator coupled to the phase comparator. The phase detector is configured to provide a plurality of phase measurements for at least two consecutive data symbols comprising a selected one of the communications channels. The phase comparator is configured to determine the phase differences between the obtained phase measurements. The phase correlator is configured to determine the whether or not the determined phase differences exhibit a predetermined phase difference profile.

Abstract: Using an initial channel, it is indicated that a message is to be delivered over at least a further channel. The initial and further channels are each comprised of at least one time slot. An initial bit value is assigned to an initial portion of the time slot of the initial channel. After assigning the initial bit value, it is determined whether a corresponding portion of the further channel is available for the message. A further bit value is assigned to a further portion of the time slot of the initial channel. The further bit value is indicative of a result of the determination.

Abstract: A method and apparatus for direct sequence spread spectrum communication having low complexity. In the transmitter, the data bit is spreaded by a code sequence, a reference code is interleaved with the code sequence, and together they are transmitted by the transmitter. The corresponding receiver recovers the data signal from the received signal by transforming the received signal to a complex base band signal and differentially decoding the base band signal at the chip level. The spreaded signal is despreaded by the chip-level differential operation, thus eliminating the decorrelation operation, and so significantly reducing the cost of the overall system. Furthermore, this system is very robust to any carrier frequency drift since the chip-level differential operation is used, thus releasing the reference clock or crystal requirements, and so further reducing the cost of the system.

Abstract: In a data transmission network, such as SONET, a method and apparatus for the generation of a path Alarm Insertion Signal (AIS) at the output of each of a number of concatenated pointer processors in response to a failure at the input of any one of the pointer processors. Each of the pointer processors has an input, an output and a bidirectional terminal that is coupled to a common node. Each of the pointer processors includes circuitry coupled to the input, the output and the bidirectional terminal that causes a predetermined logic level to be asserted at the bidirectional terminal in response to the appearance of an error signal at its input and that causes an AIS to appear at its output in response to either an error signal at its input or the assertion of the predetermined logic level at its bidirectional terminal.

Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper, and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention permits the value of the frame synchronization bytes (FSBs) to be made programmable, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the quantity, the location, bandwidth, and the bit error rate (BER) of the FSBs.

Abstract: Described is a system and method related to the synchronization of a communication stream between two devices. A broadcast signal is a segmented information signal that includes a distributed synchronization pattern and a distributed frame index. Each segment of the segmented information signal further includes a header portion and a payload portion. The header portion of the segmented information signal includes a portion of the distributed synchronization pattern and a portion of the distributed frame index. The method includes generating the distributed synchronization pattern and the distributed frame index, distributing the synchronization pattern and frame index throughout the signal, and transmitting the signal.

Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper, and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention permits the bit error rate (BER) of the frame synchronization bytes (FSBs) to be made programmable, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the number, the location, bandwidth, and the value the FSBs.

Abstract: A subscriber communication machine is provided with an off-synchronous detector detecting off-synchronization of communication with an office communication machine, a correlation processor, when the off-synchronization is detected, correlatively processing received data received over a communication line and held data having been transmitted from the office communication machine, and a resynchronization controller specifying a synchronous timing by the correlation process in the correlation processor to establish resynchronization in the communication with the office communication machine. When the subscriber communication machine cannot keep synchronization with a transmission cycle in a predetermined transmission system such as TCM in steady communication, it is possible to promptly resume the communication without the necessity for initializing all over again.

Abstract: Embodiments of the present invention related generally to communication systems. One embodiment contemplates a method for operating a communication bus where the method includes detecting a start of frame symbol on the communication bus; determining a length of the start of frame symbol; detecting a start of a synchronization field on the communication bus; determining a length of an adjusted synchronization field; determining if the length of the adjusted synchronization field is less than the length of the start of frame symbol; and if the length of the adjusted synchronization field is less than the length of the start of frame symbol, concluding that the start of frame symbol is valid and concluding that the synchronization field is valid. Embodiments of the invention may be used, for example, with the Local Interconnect Network (LIN) protocol.

Abstract: A method for determining a status of a buffer for use in converting between a standard SONET and a non-standard SONET frame is presented. The method determines the buffer's almost empty or almost full status based on a length of a transport gap of the non-standard SONET frame, wherein the standard SONET frame is formatted as a STS-N, and the transport gap of the non-standard SONET frame has been rearranged to provide a longer non-data region at the beginning of the non-standard SONET frame. The method then uses the buffer's almost empty or almost full status to trigger positive or negative stuffing. The method is used for maintaining communications when using asymmetrical gapping structures.

Abstract: Burst transmissions in a burst-type communication system include a preamble synchronization sequence which allows detection and synchronization a burst transmission while at the same time providing information to a receiver, for example, on the subsequent burst payload data. Each burst transmission includes a preamble synchronization sequence which is one of a plurality of predetermined allowed preamble sequences in the system, according to the information desired to be transmitted. The system may also use differential encoding and decoding to eliminate the effects of frequency uncertainty. In that case, the allowed preamble sequences may be such that, after differential decoding, they differ from one another only by a polarity inversion such that a single matched filter may be used to detect two preamble sequences.

Abstract: A synchronizing signal processing circuit for use in a video apparatus such as a display apparatus and an information recording/reproducing is disclosed. The synchronizing signal processing circuit is capable of not only removing false synchronizing pulses included in incoming synchronizing signals and compensating for missing signals, but also causing its output to follow its input quickly after a phase of the incoming synchronizing signals has shifted abruptly.

Abstract: A communication system (1) comprises a transmitter (2), a receiver (3), and an up/down link communication channel (4, 6) arranged for data communication from the transmitter (2) through the up link communication channel (4) to the receiver (3). The communication system (1) is further arranged to feedback data from the receiver (3) through the down link communication channel (6) to the transmitter (2). The receiver (3) comprises a bad frame indicator (5) for providing a bad frame indication (BFI) upon receipt of a corrupted frame, which is present in synchronized data communicated over the up link communication channel (4); and the transmitter (2) comprises resynchronization means (7) coupled to the down link communication channel (6) for receiving BFI related data and in response thereto recommencing data communication over the up link communication channel (4), in accordance with a resynchronization procedure, which starts from a predetermined state.

Abstract: A method of generating a parity value is disclosed. The method includes reading a word from a data stream, determining if the word should be included in a parity calculation, and including the word in the parity calculation, if the word should be included in the parity calculation, and ignoring the word otherwise.

Abstract: The invention describes a method and a system for fast and economic synchronization of multiframe structures, such as PDH multiframe binary signals, by detecting a periodic binary signature in a binary signal using one final state machine (FSM) comprising a logical scheme interconnected with a memory block having a plurality of independent memory cells with serial numbers for cyclically connecting thereof to the logical scheme; the signature is detected by applying the signal to the FSM while synchronously switching the cells to the FSM. The arrangement is such that when the predetermined periodic binary signature occurs in the signal, one of the cells will reach its predetermined terminal state.

Abstract: A method and apparatus for time-shift extraction in a wideband transmitted signal containing strong narrowband interference or noise. The time-shift extraction is based on the time domain and frequency domain relation of symbol misalignment. The invention uses the sign of the product of a recieved signal sample and a reference symbol in the frequency domain to determine the time-shift. It does not rely on the signal magnitude and is therefore less dependent on the signal gain. It also does not rely on the soft phase values, which have ambiguity for values more than three hundred sixty (360) degrees.

Abstract: A method and apparatus for triggering data-path conversion utilizing PCM bit robbing signalling. The method and apparatus permits the pass-through of compressed voice packets over a PCM stream between dissimilar interconnected networks or dissimilar payload specifications in the interconnected networks, and also provides the capability to convert the packets to a different payload specification between the networks. Once a voice path is established between the two networks, the incoming PCM data stream is monitored for a voice synchronization pattern which appears periodically in a predetermined bit position in the PCM samples. Upon detection of a matching voice synchronization pattern, a pass-through mode for the voice data between the networks is initiated. A data or payload conversion operation may also be initiated on detection of the matching voice synchronization pattern.

Abstract: A technique for efficient implementation of pilot signals on a reverse link in a wireless communication system. An access channel is defined for the reverse link such that within each frame, or epoch, a portion is dedicated to sending only pilot symbols. Another portion of the frame is reserved for sending mostly data symbols; however, within this second portion of the frame, additional pilot symbols are interleaved among the data symbols. The pilot symbol or preamble portion of the access channel frame allows for efficient acquisition of the access signal at the base station, while providing a timing reference for determining the effects of multipath fading. In particular, a pilot correlation filter provides a phase estimate from the pilot symbols in the preamble portion, which is then used to decode the data symbols in the payload portion. An access acquisition portion of the receiver uses the phase estimates provided by the pilot correlation filter to process the output of a data symbol correlation filter.

Abstract: The invention is related to methods and apparatus that recover usable video data from partially corrupted data. Embodiments inspect corrupted data packets and identify the location or locations of an error, whether the corrupted data packet contains data expected to be error-free, and whether the error-free data should be used. Decoding of a packet in both the forward direction and the backward direction can be used to locate a position of an error. Intra-coded macroblocks can also be recovered. A decoder can elect to use or to drop an intra-coded macroblock recovered from a corrupted data packet according to further criteria that is applied to the recovered intra-coded macroblock. One embodiment inspects video bitstream data that has been encoded with an optional data partitioning feature enabled, and retrieves specified data in areas of a corrupted packet that are expected to be free from error.

Abstract: The invention relates to message signalling in a synchronous transmission apparatus using redundant pointer bits as a signalling channel within the apparatus. The preferred embodiment uses one or more of the new data flag (NDF) pointer bits as a signalling channel. The invention has particular, but not exclusive, application in the field of performance monitoring in a path protected telecommunications network, where the pointer bit signalling channel is used to communicate between data ports which transmission path is selected.

Abstract: A method increases the wireless information carrying capability of a single bit-limited message by providing a plurality of different training sequences TS, such as a conventional 41 bit TS and two new 41-bit TSs, each with low cross-correlation and high auto-correlation. One of the TSs is selected, appended to an 11-bit Packet Channel Request message, and transmitted. The message with TS is detected and the message is interpreted in light of the TS. In EGPRS, selection of TS1 indicates one of a one-phase access request (OPAR), a short access request (SAR), or a two-phase access request (TPAR) with 8-PSK modulation capability on the uplink. Selection of TS2 indicates one of OPAR, SAR, or TPAR with GMSK modulation capability only on the uplink. Selection of TS_GSM indicates one of GPRS, OPAR, SAR or TPAR, or one of a page response, cell update, mobility management procedure, or a single block without a TBF establishment message.

Abstract: A method and system for maintaining synchronization and identifying received codewords in a spread spectrum communication system is disclosed. According to the method and system, a spread spectrum transmitter divides information being transmitted into pairs of tetrads. The transmitter then substitutes modulating codes selected from first and second groups of modulating codes for each pair of tetrads. The bit stream consists of codewords alternatingly selected from the first and second code groups. The bit stream does not contain any codes from the first and second groups other than the selected codes in the selected positions. The transmitter modulates a carrier using the modulating codes and transmits the signal to a spread spectrum receiver. The spread spectrum receiver synchronizes itself with the incoming signal and identifies the transmitted information by detecting the alternating sequence of codewords from the first and second code groups.

Abstract: The present invention refers to methods and apparatuses for providing synchronization in a time division multiplexed network, wherein data is transferred on multi-access bitstreams in circuit-switched channels that are defined by respective time slots of regularly recurrent frames of said bitstreams, said frames being defined by regularly recurrent frame synchronization signals transferred on said bitstreams. According to the invention an auxiliary regularly recurrent frame synchronization signal is generated and selected as a basis for defining said frames on a bitstream if the frame synchronization signal that is used as a basis for synchronizing said frames during normal operation is not detected in accordance with an expected frame rate.

Abstract: There is provided an apparatus and method for generating a frame sync word and verifying the frame sync word in an asynchronous CDMA communication system. In the apparatus for generating a sync word for synchronization of frames each having a predetermined number of slots, each of at least two m-sequence generators generates the predetermined number of sequential elements, and a selector multiplexes the sequential elements received from the m-sequence generators and assigns the multiplexed elements in the slots.

Abstract: Selector circuits are connected in a hierarchical arrangement. Each of the selector receives two of synchronizing pattern detection signals and two of synchronizing pattern position signals and selects one of the received synchronizing pattern position signals in accordance with values of the received synchronizing pattern detection signals, so that the position of a synchronizing pattern on parallel data can be identified in a tournament fashion.

Abstract: A system and method are disclosed for parallel compression and decompression of a bitstream. For compression, the bitstream is separated into a plurality of components, and the components are encoded using a compression algorithm. Packets are then constructed from the encoded components. At least one packet is associated with each encoded component and comprises header information and encoded data. The packets are combined into a packetized encoded bitstream. For decompression, the packets are separated from the packetized encoded bitstream using the header information. The packets are then decoded in parallel using a decompression algorithm to recover the encoded data. The plurality of components are reconstructed from the recovered encoded data and combined to recover the bitstream.

Abstract: A method is described for transmitting/receiving STM-4 (SDH) or STS-12 (SONET) digital signals over two RF carriers in a radio regenerator section. The method provides for performing, in transmission, a de-interleaving operation of the standard frame to be transmitted in such a way as to subdivide it by columns into two sub-frames. The RSOH bytes of the standard frame are terminated and transmitted over the two working channels or over one service channel and one working channel so as to be protected in a 1+1 configuration: In reception, a column interleaving operation recombines together the two sub-frames and recovers and correctly rearranges the RSOH bytes so terminated as to obtain the standard frame originally received from the transmitter. The generated sub-frames are synchronized with the standard frame.

Abstract: Methods and apparatus for use in aligning frames in a receiver of a data transmission system include checking one or more bit positions associated with a received data stream to determine a number of bits in the bit positions, respectively, that match a predetermined bit pattern. The number for a bit position is compared to a first threshold value and a second threshold value. A bit position is identified as being associated with a false framing pattern or mimic when the number is not less than the first threshold value. A bit position is identified as a potential framing bit position or possible framing bit position when the number is not less than the second threshold value. The first threshold value is changed when a bit position is identified as a potential framing bit position and another bit position is identified as being associated with a false framing pattern.

Abstract: A method for clock recovery comprises a series of steps to be performed in a decoder to adaptively estimate the ratio P/S of the frequency of an encoder system time clock and the frequency of a decoder. The steps include performing a series of overlapping trials N which calculate time differentials dP(n), dS(n), respectively) between selected pairs of temporally separated clock references CRs and arrival times STCs. Each trial concludes by calculating an estimated ratio X according to the formula: X(N)=(&Sgr;dP(n))/(&Sgr;dS(n)) A preferred embodiment of the present invention also includes the step of adjusting the decoder clock in accordance with a damped version of the estimate, thereby “recovering” the encoder STC in the decoder.

Abstract: Methods and systems for a transceiver to acquire synchronization to a channel in a TDMA communications system by identifying a known synchronization word in a burst received at the transceiver over the channel are provided. Pursuant to these methods and systems a first uncertainty window and a second uncertainty window are defined within a burst that is received over the channel. The transceiver may search in these uncertainty windows for the known synchronization word, where the first uncertainty window is smaller than the second uncertainty window. The first uncertainty window is first searched for the known synchronization word. It may then be determined if the known synchronization word has been located within the first uncertainty window. If it has not been, the second uncertainty window is then searched for the known synchronization word.