Inspection Of Semiconductor Device Or Printed Circuit Board Patents (Class 382/145)
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Patent number: 8478022Abstract: A failure analysis method for a semiconductor integrated circuit includes deriving a coordinate in a device coordinate system in analysis data for abnormal signal data included in the analysis data of a semiconductor integrated circuit, deriving a correspondence between a coordinate in the device coordinate system and a coordinate in a design coordinate system in design data of the semiconductor integrated circuit for a plurality of reference points in the semiconductor integrated circuit, deriving a coordinate conversion formula between the device coordinate system and the design coordinate system, deriving a position error between a coordinate in the device coordinate system converted by the coordinate conversion formula and a coordinate in the design coordinate system, and extracting a circuit related to an abnormal signal in the design data based on coordinates of the abnormal signal in the device coordinate system using the coordinate conversion formula and the position error.Type: GrantFiled: February 16, 2010Date of Patent: July 2, 2013Assignee: Renesas Electronics CorporationInventor: Masafumi Nikaido
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Patent number: 8478808Abstract: Minimizing memory access by converting a given matrix computation into a set of low-order polynomials. The low-order polynomials can be used by dividing the domain of the polynomials into smaller subregions. If the domain is divided into equal intervals, the low-order polynomial can be used to approximate results from the matrix computation. The set of polynomials is processed using parallel computational hardware such as graphical processing units.Type: GrantFiled: October 19, 2007Date of Patent: July 2, 2013Assignee: Gauda, Inc.Inventor: Ilhami H. Torunoglu
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Patent number: 8472695Abstract: A method of analyzing of a semiconductor integrated circuit includes inspecting a physical defect in a semiconductor wafer, subjecting the semiconductor integrated circuit chip to a logic test and extracting a malfunctioning chip, analyzing a detected signal observed from the malfunctioning chip by an analyzer, obtaining the layer and coordinates of a circuit related the detected signal, collating the physical defect with the circuit, and identifying the physical defect associated with the circuit. The layer and coordinates of the circuit is extracted using design data. An inspection step identifying information is collated with the layer of the circuit, and an in-chip coordinates of the physical defect is collated with the coordinated of the circuit.Type: GrantFiled: July 23, 2009Date of Patent: June 25, 2013Assignee: Renesas Electronics CorporationInventor: Masafumi Nikaido
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Publication number: 20130156293Abstract: Methods and systems for evaluation of wafers are disclosed. One example method includes illuminating a multi-crystalline wafer according to a plurality of lighting parameters, capturing a plurality of images of the multi-crystalline wafer, stacking and projecting the plurality of images to generate a composite image, analyzing the composite image to identify one or more grains of the multi-crystalline wafer, and generating a report based on the analysis of the composite image. The multi-crystalline wafer is illuminated according to a different one of the plurality of lighting parameters in at least two of the plurality of images.Type: ApplicationFiled: December 19, 2011Publication date: June 20, 2013Applicant: MEMC Singapore, Pte. Ltd.(UEN200614794D)Inventors: Gang Shi, Thomas E. Doane, Steven L. Kimbel, Robert H. Fuerhoff
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Patent number: 8467592Abstract: Embodiments described herein are directed to detecting and/or measuring distortions of substrate media that can occur during a printing process. The distortion can be detected and/or measured using a composite image generated from a reference image having a first periodic pattern and print image, disposed on a test substrate media, having a second periodic pattern. The first and second periodic patterns are specified so that the composite image includes a moiré pattern having moiré fringes resulting from interference between the first periodic pattern associated with the reference image and the second periodic pattern associated with the print image. The moiré fringes can be used to detect and calculate an amount of distortion of the test substrate media.Type: GrantFiled: December 23, 2009Date of Patent: June 18, 2013Assignee: Xerox CorporationInventors: Shen-ge Wang, Beilei Xu, Robert P. Loce
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Publication number: 20130148877Abstract: A system and method for measurement of high aspect ratio through silicon via structures. A preferred embodiment includes a white light source and optical components adapted to provide a measurement beam which is nearly collimated with a measurement spot size of the same order of magnitude as the diameter (or effective diameter) of the TSV. These embodiments include a white light source with a variable aperture and other optical components chosen to control the angular spectrum of the incident light. In preferred embodiments the optical components include an automated XYZ stage and a system controller that are utilized to direct the illumination light so as to illuminate the top and bottom of TSV under analysis.Type: ApplicationFiled: January 23, 2012Publication date: June 13, 2013Inventor: Christopher L. Claypool
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Patent number: 8461527Abstract: In the case where a specimen is imaged by a scanning electron microscope, it is intended to acquire an image of a high quality having a noise component reduced, thereby to improve the precision of an image processing. The intensity distribution of a beam is calculated on the basis of an imaging condition or specimen information, and an image restoration is performed by using a resolving power deterioration factor other than the beam intensity distribution as a target of a deterioration mode, so that a high resolving power image can be acquired under various conditions. In the scanning electron microscope for semiconductor inspections and semiconductor measurements, the restored image is used for pattern size measurement, defect detections, defect classifications and so on, so that the measurements can be improved in precision and so that the defect detections and classifications can be made high precise.Type: GrantFiled: January 31, 2012Date of Patent: June 11, 2013Assignee: Hitachi High-Technologies CorporationInventors: Kenji Nakahira, Toshifumi Honda, Atsushi Miyamoto
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Publication number: 20130136334Abstract: A semiconductor inspecting apparatus which is provided with an inspecting unit, a detecting unit, and a processing unit, which processes an image on the basis of reflection light detected by the detecting unit, and which inspects the surface of the subject to be inspected. The processing unit is provided with an image distribution control unit, which distributes the image, and an image processing unit, which processes the image distributed by the image distribution control unit. The image distribution control unit has and image buffer counter, which counts the input image quantity of the image; a distribution control table, which stores information relating to the image; and a distribution timing control circuit, which determines distribution start timing of the image on the basis of the input image quantity and the information relating to the image obtained from the distribution control table.Type: ApplicationFiled: May 18, 2011Publication date: May 30, 2013Applicant: Hitachi High-Technologies CorporationInventors: Yuichi Sakurai, Tadanobu Toba, Hideki Yasumoto, Ken Iizumi, Yoshiyuki Momiyama
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Patent number: 8452075Abstract: One embodiment of the present invention provides a system that identifies hotspot areas in a layout. The system receives the layout and a via range pattern which indicates one or more vias and performs range-pattern matching (RPM) on the layout based on a via-free range pattern derived from the via range pattern. The system further identifies at least one candidate area and determines whether via(s) in the candidate area matches the via(s) in the via range pattern. The system can also receives a range pattern with don't care regions. The system determines a core pattern from the range pattern, performs RPM based on the core pattern, and identifies a candidate area. The system then determines whether areas surrounding the candidate area match a non-core effective pattern of the range pattern. The system further determines if the areas surrounding the candidate area satisfy the constraints associated with any vias and the don't care regions.Type: GrantFiled: April 11, 2007Date of Patent: May 28, 2013Assignee: Synopsys, Inc.Inventors: Jingyu Xu, Subarnarekha Sinha, Charles C. Chiang
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Patent number: 8452074Abstract: A pattern inspection apparatus includes a light source, a stage configured to mount thereon a substrate with a pattern formed thereon, a first laser measuring unit configured to measure a position of the stage by using a laser beam, a sensor configured to capture a pattern image obtained from the pattern, formed on the substrate, irradiated by light from the light source, an optical system configured to focus the pattern image on the sensor, a second laser measuring unit configured to measure a position of the optical system by using a laser beam, a correction unit configured to correct a captured pattern image by using a difference between the position of the stage and the position of the optical system, and an inspection unit configured to inspect whether there is a defect of the pattern by using a corrected pattern image.Type: GrantFiled: September 14, 2012Date of Patent: May 28, 2013Assignee: Nuflare Technology, Inc.Inventor: Shuichi Tamamushi
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Patent number: 8447095Abstract: A method for determining an image of a mask pattern in a resist coated on a substrate, the method including determining an aerial image of the mask pattern at substrate level; and convolving the aerial image with at least two orthogonal convolution kernels to determine a resist image that is representative of the mask pattern in the resist.Type: GrantFiled: November 24, 2009Date of Patent: May 21, 2013Assignee: ASML Netherlands B.V.Inventors: Yu Cao, Luoqi Chen, Antoine Jean Bruguier, Wenjin Shao
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Patent number: 8447097Abstract: When computation of a three-dimensional measurement processing parameter is completed, accuracy of a computed parameter can easily be confirmed. After a parameter for three-dimensional measurement is computed through calibration processing using a calibration workpiece in which plural feature points whose positional relationship is well known can be extracted from an image produced by imaging, three-dimensional coordinate computing processing is performed using the computed parameter for the plural feature points included in the stereo image used to compute the parameter. Perspective transformation of each computed three-dimensional coordinate is performed to produce a projection image in which each post-perspective-transformation three-dimensional coordinate is expressed by a predetermined pattern, and the projection image is displayed on a monitor device.Type: GrantFiled: February 24, 2010Date of Patent: May 21, 2013Assignee: Omron CorporationInventors: Shiro Fujieda, Atsushi Taneno, Hiroshi Yano, Yasuyuki Ikeda
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Patent number: 8442300Abstract: A specified position in an array structure in which a reference pattern is displayed repetitively through reference pattern counting is identified. In an array structure image, the pattern detection estimating area generated from a starting point, the address of the starting point, and a unit vector are compared with a pattern detected position found in pattern matching with the reference pattern image, to execute pattern counting while determining correct detection, oversights, wrong detection, etc. Array structure images are photographed sequentially while moving the visual field with the use of an image shifting deflector to continue the pattern counting started at the starting point to identify the ending point specified with an address. If the ending point is not reached only with use of the image shifting deflector, the visual field moving range of the image shifting deflector is moved with use of a specimen stage.Type: GrantFiled: February 8, 2007Date of Patent: May 14, 2013Assignee: Hitachi High-Technologies CorporationInventors: Ruriko Tsuneta, Tohru Ando, Junzo Azuma
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Publication number: 20130114879Abstract: A computer program product and method for performing automated defect detection of blades within an engine is disclosed. The method may include providing a storage medium for storing data and programs used in processing video images, providing a processing unit for processing images, receiving from a borescope an initial set of images of a plurality of members inside of a device, and using the processing unit to apply Robust Principal Component Analysis to decompose the initial set of images into a first series of low rank component images and a second series of sparse component images, wherein there are at least two images in the initial series.Type: ApplicationFiled: November 9, 2011Publication date: May 9, 2013Inventors: Paul Raymond Scheid, Richard C. Grant, Alan Matthew Finn, Hongcheng Wang, Ziyou Xiong
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Publication number: 20130100277Abstract: A workbench and an assistance method for manufacturing or checking electrical wiring harnesses. The workbench comprises: an assembly board; image projection devices on the assembly board; optical sensors arranged on the assembly board to provide information about its position; cameras arranged to capture gestures of the technician in charge of the workbench; a computer with a set of computer programs adapted to provide, through the image projection devices images in 1:1 scale of templates of the electrical wiring harness being manufactured or checked projected onto the assembly board and, superimposed on them, complementary images of aid requested by the technician, acting on virtual menus and/or buttons projected onto the assembly board.Type: ApplicationFiled: December 14, 2012Publication date: April 25, 2013Applicant: EADS CONSTRUCCIONES AERONAUTICAS, S.A.Inventor: EADS Construcciones Aeronauticas, S.A.
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Publication number: 20130100275Abstract: A method for estimating the efficiency of a solar cell to be manufactured from a wafer is disclosed, wherein the efficiency estimate is obtained from a density of crystallite boundaries on a surface of the wafer. In embodiments the density of crystallite boundaries is obtained from a digital image of the surface of the wafer, from which first a filtered image, and then a binary image is generated. The binary image is evaluated to obtain the density of crystallite boundaries. Alternatively, the efficiency estimate is obtained from the sizes of crystallites on the surface of the wafer. An apparatus for obtaining the efficiency estimate is also disclosed.Type: ApplicationFiled: July 25, 2012Publication date: April 25, 2013Applicant: KLA-TENCOR CORPORATIONInventors: Johan DeGreeve, Kristiaan VanRossen
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Publication number: 20130101205Abstract: The present disclosure provides a label detecting system, apparatus and a detecting label method for the label detecting system. The method includes steps whereby an image processing function for the image of the circuit board under test to obtain a binary image of the circuit board takes place, dividing the binary image of the circuit board into a number of areas and scanning the binary image of the circuit board, performing a generalization and correlation analysis between each area and the binary image of the standard label to obtain a matching value, acquiring a maximum and location information of the area associated with a maximum, comparing the maximum with two threshold values to detect a result of the determination as to the correctness of the location information of the area as compared to that of the standard label, and displaying the result.Type: ApplicationFiled: March 13, 2012Publication date: April 25, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HON FU JIN PRECISION INDUSTRY (Shenzhen) CO., LTD.Inventors: WEN-WU WU, MENG-ZHOU LIU
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Patent number: 8428337Abstract: A method and apparatus for wafer inspection is disclosed. The method and apparatus involve directing light substantially along a first axis towards a first surface of a wafer to thereby obtain light emanating along the first axis from a second surface of the wafer, wherein the first and second surfaces of the wafer are substantially outwardly opposing and substantially extending parallel to a plane. The method and apparatus further involve directing light substantially along a second axis towards the first surface of the wafer to thereby obtain light emanating along the second axis from the second surface of the wafer, the first axis being angled away from the second axis about a reference axis extending along the plane.Type: GrantFiled: May 15, 2009Date of Patent: April 23, 2013Assignee: Bluplanet Pte LtdInventor: Sok Leng Chan
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Patent number: 8426223Abstract: Wafer edge inspection approaches are disclosed wherein an imaging device captures at least one image of an edge of a wafer. The at least one image can be analyzed in order to identify an edge bead removal line. An illumination system having a diffuser can further be used in capturing images.Type: GrantFiled: September 8, 2009Date of Patent: April 23, 2013Assignee: Rudolph Technologies, Inc.Inventors: Christopher Voges, Ajay Pai, Antony Ravi Philip, Tuan D. Le
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Patent number: 8428336Abstract: A method for classifying defects, including: calculating feature quantifies of defect image which is obtained by imaging a defect on a sample; classifying the defect image into a classified category by using information on the calculated feature quantities; displaying the classified defect image in a region on a display screen which is defined to the classified category; adding information on the classified category to the displayed defect image; transferring the displayed defect image which is added the information on the classified category to one of the other categories and displaying the transferred defect image in a region on the display screen which is defined to the one of the other categories; and changing information on the category.Type: GrantFiled: May 11, 2006Date of Patent: April 23, 2013Assignee: Hitachi, Ltd.Inventors: Yoko Ikeda, Junko Konishi, Hisafumi Iwata, Yuji Takagi, Kenji Obara, Ryo Nakagaki, Seiji Isogai, Yasuhiko Ozawa
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Patent number: 8422762Abstract: An abnormality detecting apparatus includes an imaging device for obtaining image data of a TIM, a failure detecting section for detecting appearance failures of the TIM on the basis of the image data of the TIM obtained by the imaging device, and a determining device for determining whether an abnormality occurs at the TIM on the basis of a detection result by the failure detecting section.Type: GrantFiled: October 31, 2007Date of Patent: April 16, 2013Assignee: Advantest CorporationInventors: Masayoshi Ichikawa, Hiroki Ikeda
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Patent number: 8422760Abstract: A system for monitoring haze of a photomask includes an installation unit in which a photomask is mounted, a light emission unit emitting a light beam to the photomask installed on the installation unit, a detection unit detecting a diffraction pattern of the light beam emitted by the light emission unit and passed through the photomask, and an analysis unit analyzing the diffraction pattern detected by the detection unit.Type: GrantFiled: October 16, 2009Date of Patent: April 16, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-gun Lee, Seong-sue Kim, Jae-Hyuck Choi, Jin-sik Jung
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Patent number: 8421585Abstract: An alarm apparatus for sensing occurrence of abnormality in a plant that manufactures products by processing substrates, the alarm apparatus includes: means responsive to an inspection result of a surface of the substrates during manufacturing the products for aggregating degree of occurrence of defects for each monitoring unit region to produce an aggregation result, the monitoring unit region having a prescribed size configured for each type of the abnormality; means for comparing the degree of occurrence of defects in each of the monitoring unit regions with a reference; and means responsive to detection of the monitoring unit region with the degree of occurrence of defects being higher than the reference for transmitting an alarm and outputting the aggregation result.Type: GrantFiled: June 29, 2007Date of Patent: April 16, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Yasuo Namioka
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Patent number: 8422761Abstract: Apparatus and method evaluate a wafer fabrication process for forming patterns on a wafer based upon design data. Within a recipe database, two or more inspection regions are defined on the wafer for analysis. Patterns within each of the inspection regions are automatically selected based upon tendency for measurement variation resulting from variation in the fabrication process. For each inspection region, at least one image of patterns within the inspection region is captured, a reference pattern, represented by one or both of (a) one or more line segments and (b) one or more curves, is automatically generated from the design data. An inspection unit detects edges within each of the images and registers the image with the reference pattern. One or more measurements are determined from the edges for each of the selected patterns and are processed within a statistical analyzer to form statistical information associated with the fabrication process.Type: GrantFiled: December 14, 2009Date of Patent: April 16, 2013Assignee: NGR Inc.Inventors: Tadashi Kitamura, Akio Ishikawa
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Patent number: 8421803Abstract: This invention facilitates monitoring operation for checking whether or not quality of a substrate deteriorates as well as operation for identifying a cause of deterioration in quality. Identification information of constituent elements related to measurement target sections (pads) on a component-mounted substrate is arranged into hierarchal structure data. A first axis is arranged with the measurement target sections associated with this arrangement. A second axis is arranged with information (identification information of lots and squeegees) representing production conditions of the substrates according to an order of the substrates being processed. A two-dimensional area defined by the first axis and the second axis is set. A color map is generated, in which measured data of the measurement target sections on the substrates are arranged in colors at corresponding positions within the two-dimensional area.Type: GrantFiled: January 22, 2010Date of Patent: April 16, 2013Assignee: Omron CorporationInventors: Kazuto Kojitani, Keiji Otaka, Hiroyuki Mori
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Patent number: 8417019Abstract: In an image correction method, an image of an object is captured, and a standard image of the object is obtain from a storage system of a computing device. A target area contains most image characteristics of the object is determined from the standard image of the object, and a standard pixel block having N×N pixels is extracted from the target area. The captured image is divided into M pixel blocks having N×N pixels. Each of the pixel blocks of the captured image are analyzed with the standard pixel block. A pixel value of each pixel of the captured image is corrected according the analysis, and the corrected image is output to a display device of a computing device for display.Type: GrantFiled: July 28, 2011Date of Patent: April 9, 2013Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Guang-Jian Wang
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Patent number: 8416402Abstract: To provide a defect inspection apparatus for inspecting defects of a specimen without lowering resolution of a lens, without depending on a polarization characteristic of a defect scattered light, and with high detection sensitivity that is realized by the following. A detection optical path is branched by at least one of spectral splitting and polarization splitting, a spatial filter in the form of a two-dimensional array is disposed after the branch, and only diffracted light is shielded by the spatial filter in the form of a two-dimensional array.Type: GrantFiled: May 30, 2012Date of Patent: April 9, 2013Assignee: Hitachi High-Technologies CorporationInventors: Yukihiro Shibata, Yasuhiro Yoshitake
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Patent number: 8411928Abstract: An inspection region is specified using the design information to perform region division for measurement through a scatterometry method. The obtained detection data is classified by pattern into a periodic region and a non-periodic region. A spectroscopic characteristic is detected by an optical sensor to extract features. The extracted features are compared with features stored in a feature map database for each region to evaluate a state of a patterned medium.Type: GrantFiled: June 10, 2009Date of Patent: April 2, 2013Assignee: Hitachi High-Technologies CorporationInventors: Hideaki Sasazawa, Takenori Hirose, Minoru Yoshida, Keiya Saito, Shigeru Serikawa
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Patent number: 8410440Abstract: It is an object of the present invention to provide a specimen observation method, an image processing device, and a charged-particle beam device which are preferable for selecting, based on an image acquired by an optical microscope, an image area that should be acquired in a charged-particle beam device the representative of which is an electron microscope. In the present invention, in order to accomplish the above-described object, there are provided a method and a device for determining the position for detection of charged particles by making the comparison between a stained optical microscope image and an elemental mapping image formed based on X-rays detected by irradiation with the charged-particle beam.Type: GrantFiled: February 16, 2012Date of Patent: April 2, 2013Assignee: Hitachi High-Technologies CorporationInventors: Eiko Nakazawa, Masahiro Tomita, Hiroyuki Kobayashi
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Publication number: 20130071007Abstract: A system and method for restricting the number of layout patterns by pattern identification, matching and classification, includes decomposing the pattern windows into a low frequency component and a high frequency component using a wavelet analysis for an integrated circuit layout having a plurality of pattern windows. Using the low frequency component as an approximation, a plurality of moments is computed for each pattern window. The pattern windows are classified using a distance computation for respective moments of the pattern windows by comparing the distance computation to an error value to determine similarities between the pattern windows.Type: ApplicationFiled: November 13, 2012Publication date: March 21, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: International Business Machines Corporation
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Patent number: 8400503Abstract: A method and apparatus are provided for automatic application and monitoring of a structure to be applied onto substrate. A plurality of cameras positioned around an application facility are utilized to monitor the automatic application of a structure on a substrate by means of a stereometry procedure. Three-dimensional recognition of a reference contour position results in the overlapping area to be used for gross adjustment of the application facility prior to applying the structure.Type: GrantFiled: July 16, 2004Date of Patent: March 19, 2013Assignee: Quiss GmbHInventors: Jan Anders Linnenkohl, Andreas Tomtschko, Mirko Berger, Roman Raab
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Patent number: 8401273Abstract: A measurement tool apparatus for evaluating degradation of pattern features in a semiconductor device manufacturing process. The measurement tool apparatus detects variations in the patterns from SEM images thereof and extracts pattern edge points along the circumference of each pattern. The measurement tool apparatus compares the pattern edge points to corresponding edge points of an ideal shape so as to determine deviation of the patterns. Metrics are derived from analysis of the deviations. The measurement tool apparatus uses the metrics in calculating an index representative of the geometry of edge spokes of the pattern, an indicator of the orientation of the edge spokes, and/or anticipated effects of the edge spokes on device performance.Type: GrantFiled: January 21, 2010Date of Patent: March 19, 2013Assignee: Hitachi, Ltd.Inventors: Yoshinori Momonoi, Atsuko Yamaguchi, Taro Osabe
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Patent number: 8401274Abstract: A computer displays an image of an object which has been created by photographing by a photographing portion in a setting mode. Further, height threshold-value data is received according to an input from outside through a key board. Based on height information detected from the image created by photographing and based on the received threshold-value data, a partial image having height information specified by the threshold-value data is extracted from the image created by photographing and then is displayed. In a driving mode, the computer displays an image acquired by photographing the object, and extracts a partial image having height information specified by the threshold-value data, based on the height information detected from the image created by photographing and the threshold-value data preliminarily-received in the setting mode. The image data extracted in the driving mode is utilized for inspections of defects in the object.Type: GrantFiled: February 25, 2010Date of Patent: March 19, 2013Assignee: Omron CorporationInventors: Hiroyuki Hazeyama, Yuki Taniyasu, Shiro Fujieda
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Patent number: 8401272Abstract: A system for inspecting semiconductor devices is provided. The system includes a region system selecting a plurality of regions from a semiconductor wafer. A golden template system generates a region golden template for each region, such as to allow a die image to be compared to golden templates from a plurality of regions. A group golden template system generates a plurality of group golden templates from the region golden templates, such as to allow the die image to be compared to golden templates from a plurality of group golden templates.Type: GrantFiled: August 2, 2007Date of Patent: March 19, 2013Assignee: ASTI Holdings LimitedInventors: Ajharali Amanullah, Lin Jing, Chunlin Luke Zeng
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Patent number: 8391634Abstract: An image comprising varying illumination is selected. Instances of a repeating pattern in the image is determined. Illumination values for pixels at locations within instances of the repeating pattern are calculated responsive to pixel intensities of pixels at corresponding locations in other instances of the repeating pattern. The varying illumination is removed form the image responsive to the illumination values.Type: GrantFiled: April 28, 2009Date of Patent: March 5, 2013Assignee: Google Inc.Inventors: Vivek Kwatra, Mei Han, Shengyang Dai
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Patent number: 8390808Abstract: A semiconductor wafer may include a dummy field configured to enable overlay measurements. The enhanced dummy field may include a plurality of encoding blocs that enable OVL measurements to be made throughout the enhanced dummy field.Type: GrantFiled: July 13, 2012Date of Patent: March 5, 2013Assignee: KLA-Tencor CorporationInventors: Vladimir Levinski, Michael E. Adel, Mark Ghinovker, Alexander Svizher
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Patent number: 8392009Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a first plurality of semiconductor wafers; determining a sampling rate to the first plurality of semiconductor wafers based on process quality; determining sampling fields and sampling points to the first plurality of semiconductor wafers; measuring a subset of the first plurality of semiconductor wafers according to the sampling rate, the sampling fields and the sampling points; modifying a second process according to the measuring; and applying the second process to a second plurality of semiconductor wafers.Type: GrantFiled: March 31, 2009Date of Patent: March 5, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wang Jo Fei, Andy Tsen, Ming-Yu Fan, Jill Wang, Jong-I Mou
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Publication number: 20130051653Abstract: A system and method for spatial signature analysis, the system includes a memory unit for storing wafer defect density maps of multiple resolutions, derived from a defect map obtained by an inspection tool; an analyzer for analyzing the wafer defect density maps to identify zones of interest; and a spatial signature generator for generating spatial signatures in response relations between zones of interest of different density resolution.Type: ApplicationFiled: August 14, 2012Publication date: February 28, 2013Inventor: Ditza Auerbach
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Patent number: 8384029Abstract: A first instrument (230) is used to image a first semiconductor article having a trench (110) of defined cross-section, while a second instrument (220) is used to simultaneously prepare a second semiconductor article with a trench of defined cross-section. Furthermore, a method is disclosed to prepare a trench (110) of defined cross-section in a semiconductor article by rough milling and subsequent fine milling.Type: GrantFiled: June 16, 2009Date of Patent: February 26, 2013Assignee: Carl Zeiss NTS, LLCInventors: Rainer Knippelmeyer, Lawrence Scipioni, Christoph Riedesel, John Morgan, Ulrich Mantz, Ulrich Wagemann
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Patent number: 8385627Abstract: When an inspection apparatus of a semiconductor device repeatedly executes computation of prescribed area data, such as image processing for detecting defects, procedures for commanding, data load, computation, and data store need to be repeated the number of times of the computation. This may impose a limitation on the speeding up of the operation. In addition, when performing parallel computation by a high-capacity image processing system for handling minute images, a lot of processors are needed, resulting in an increase in cost.Type: GrantFiled: August 9, 2006Date of Patent: February 26, 2013Assignee: Hitachi High-Technologies CorporationInventors: Tadanobu Toba, Shuji Kikuchi, Yuichi Sakurai, Wen Li
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Patent number: 8379963Abstract: This solution relates to machine vision computing environments, and more specifically relates to a system and method for selectively accelerating the execution of image processing applications using a cell computing system. The invention provides a high performance machine vision system over the prior art and provides a method for executing image processing applications on a Cell and BPE3 image processing system. Moreover, implementations of the invention provide a machine vision system and method for distributing and managing the execution of image processing applications at a fine-grained level via a PCIe connected system. The hybrid system is replaced with the BPE3 and the switch is also eliminated from the prior in order to meet over 1 GB processing requirement.Type: GrantFiled: March 28, 2008Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventors: Moon J. Kim, Yumi Mori, Hiroki Nakano, Masakuni Okada
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Patent number: 8379229Abstract: Embodiments of the present invention enable generation of a simulated reference bitmap image that corresponds to a dot-pattern image. Certain applications of the present invention are its use in various embodiments of a system for inspection of a printed circuit board (“PCB”) substrate. In embodiments, a dot-pattern image and user-input configuration parameters are used to create an initialized simulated reference bitmap, and the dot pattern is mapped onto the reference bitmap using a scaling factor. In embodiments, reference bitmaps of individual sections of a dot-pattern image may be generated separately.Type: GrantFiled: February 14, 2008Date of Patent: February 19, 2013Assignee: Seiko Epson CorporationInventor: Ali Zandifar
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Patent number: 8379964Abstract: The present invention is directed to a method for detecting anomalies in a semiconductor substrate comprising the steps of providing a semiconductor substrate, making an inspection image I of the substrate, generating an image K from image I by image processing, generating image B by binarizing image K, and examining image I using image B, characterized in that generating image K comprises multiplying a high-pass convolution filtered image G(I) from image I and a first weight image W1. The present invention is also directed to an apparatus suitable for applying the method.Type: GrantFiled: August 29, 2008Date of Patent: February 19, 2013Assignee: KLA-Tencor CorporationInventors: Dominque Janssens, Luc Vanderheydt, Johan DeGreeve, Lieve Govaerts
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Patent number: 8379082Abstract: Methods and systems are provided for mapping substrates in a substrate carrier. The invention includes a substrate carrier including one or more windows; and an imaging system coupled to a substrate carrier handling robot and adapted to determine or image substrate positions in the substrate carrier via the one or more windows. Numerous other aspects are provided.Type: GrantFiled: March 4, 2009Date of Patent: February 19, 2013Assignee: Applied Materials, Inc.Inventors: Vinay K. Shah, Sushant S. Koshti, Eric A. Englhardt
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Patent number: 8369603Abstract: An inspection method for inspecting a device mounted on a substrate, includes generating a shape template of the device, acquiring height information of each pixel by projecting grating pattern light onto the substrate through a projecting section, generating a contrast map corresponding to the height information of each pixel, and comparing the contrast map with the shape template. Thus, a measurement object may be exactly extracted.Type: GrantFiled: July 2, 2010Date of Patent: February 5, 2013Assignee: Koh Young Technology Inc.Inventors: Joong-Ki Jeong, Yu-Jin Lee, Seung-Jun Lee
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Patent number: 8369602Abstract: Disclosed herewith is a length measurement system, which obtains a value closer to its true one when figuring out the size and edge roughness of a pattern from a noise-included pattern image. Among plural band-like regions representing a portion around an edge in an image respectively, the system calculates the dependency of the edge point position on the image processing parameter at each of a narrow width band-like portion and a wide width band-like portion to calculate an image processing condition that calculates each measured value closer to its true value or estimates the true value itself.Type: GrantFiled: August 13, 2008Date of Patent: February 5, 2013Assignee: Hitachi High-Technologies CorporationInventors: Atsuko Yamaguchi, Jiro Yamamoto, Hiroki Kawada
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Patent number: 8368881Abstract: An inspection system includes optics, an object support for mounting an object in a region of an object plane of the optics, a bright-field light source, and a dark-field light source. The inspection system also includes an image detector having a radiation sensitive substrate disposed in a region of an image plane of the optics and a beam dump.Type: GrantFiled: October 20, 2011Date of Patent: February 5, 2013Assignee: Nanda Technologies GmbHInventors: Lars Markwort, Rajeshwar Chhibber
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Publication number: 20130028506Abstract: A system for providing visualization of semiconductor wafer inspection data acquired during in a photovoltaic cell production process includes a display device, a user interface device, and a computer control system configured for: receiving one or more inspection data sets acquired from each of a plurality of semiconductor wafers using a plurality of wafer process tools of a photovoltaic cell production line; generating an aggregated hierarchical wafer data gallery utilizing the received one or more inspection data sets; and displaying at least a portion of the aggregated hierarchical wafer data gallery in the gallery display area of the display device.Type: ApplicationFiled: July 26, 2012Publication date: January 31, 2013Applicant: KLA-TENCOR CORPORATIONInventor: Robert J. Salter
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Patent number: 8363923Abstract: Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern.Type: GrantFiled: November 11, 2011Date of Patent: January 29, 2013Assignee: Hitachi High-Technologies CorporationInventors: Yasutaka Toyoda, Hideo Sakai, Ryoichi Matsuoka
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Patent number: RE44353Abstract: This invention provides a system and method for automating the setup of Locators and Detectors within an image view of an object on the HMI of a vision detector by determining detectable edges and best fitting the Locators and Detectors to a location on the object image view following the establishment of an user selected operating point on the image view, such as by clicking a GUI cursor. In this manner, the initial placement and sizing of the graphical elements for Locator and Detector ROIs are relatively optimized without excessive adjustment by the user. Locators can be selected for direction, including machine or line-movement direction, cross direction or angled direction transverse to cross direction and movement direction. Detectors can be selected based upon particular analysis tools, including brightness tools, contrast tools and trained templates.Type: GrantFiled: December 22, 2010Date of Patent: July 9, 2013Assignee: Cognex Technology and Investment CorporationInventors: Brian V. Mirtich, Andrew Eames, Brian S. Phillips, Robert J. Tremblay, II, John F. Keating, Steven Whitman